arm64: dts: imx8mp: reparent MEDIA_MIPI_PHY1_REF to CLK_24M

This is already done in dsi node, introduced in commit eda09fe149df4
("arm64: dts: imx8mp: Add display pipeline components").
This needs to be applied to csi nodes as well or the clock might be busy
if both csi and dsi nodes are enabled.
Fixes error:
 clk: failed to reparent media_mipi_phy1_ref to osc_24m: -16

Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index 76c73daf546bd0f64bc22e5e1176d814ad677e18..9ab9c057f41ea5692b99d874b9184e1682cdfe57 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -1636,8 +1636,10 @@
                                         <&clk IMX8MP_CLK_MEDIA_MIPI_PHY1_REF_ROOT>,
                                         <&clk IMX8MP_CLK_MEDIA_AXI_ROOT>;
                                clock-names = "pclk", "wrap", "phy", "axi";
-                               assigned-clocks = <&clk IMX8MP_CLK_MEDIA_CAM1_PIX>;
-                               assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_1000M>;
+                               assigned-clocks = <&clk IMX8MP_CLK_MEDIA_CAM1_PIX>,
+                                                 <&clk IMX8MP_CLK_MEDIA_MIPI_PHY1_REF>;
+                               assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_1000M>,
+                                                        <&clk IMX8MP_CLK_24M>;
                                assigned-clock-rates = <500000000>;
                                power-domains = <&media_blk_ctrl IMX8MP_MEDIABLK_PD_MIPI_CSI2_1>;
                                status = "disabled";
@@ -1670,8 +1672,10 @@
                                         <&clk IMX8MP_CLK_MEDIA_MIPI_PHY1_REF_ROOT>,
                                         <&clk IMX8MP_CLK_MEDIA_AXI_ROOT>;
                                clock-names = "pclk", "wrap", "phy", "axi";
-                               assigned-clocks = <&clk IMX8MP_CLK_MEDIA_CAM2_PIX>;
-                               assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_1000M>;
+                               assigned-clocks = <&clk IMX8MP_CLK_MEDIA_CAM1_PIX>,
+                                                 <&clk IMX8MP_CLK_MEDIA_MIPI_PHY1_REF>;
+                               assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_1000M>,
+                                                        <&clk IMX8MP_CLK_24M>;
                                assigned-clock-rates = <266000000>;
                                power-domains = <&media_blk_ctrl IMX8MP_MEDIABLK_PD_MIPI_CSI2_2>;
                                status = "disabled";