drm/amdgpu/jpeg: add multiple jpeg rings support

Add multiple jpeg rings support.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.c
index b07c000fc8ba39ee60540312eb8c0e6ee439d8e0..388466a5f730ee1a2e6cbb0c58f76584f0450949 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.c
@@ -45,13 +45,14 @@ int amdgpu_jpeg_sw_init(struct amdgpu_device *adev)
 
 int amdgpu_jpeg_sw_fini(struct amdgpu_device *adev)
 {
-       int i;
+       int i, j;
 
        for (i = 0; i < adev->jpeg.num_jpeg_inst; ++i) {
                if (adev->jpeg.harvest_config & (1 << i))
                        continue;
 
-               amdgpu_ring_fini(&adev->jpeg.inst[i].ring_dec);
+               for (j = 0; j < adev->jpeg.num_jpeg_rings; ++j)
+                       amdgpu_ring_fini(&adev->jpeg.inst[i].ring_dec[j]);
        }
 
        mutex_destroy(&adev->jpeg.jpeg_pg_lock);
@@ -76,13 +77,14 @@ static void amdgpu_jpeg_idle_work_handler(struct work_struct *work)
        struct amdgpu_device *adev =
                container_of(work, struct amdgpu_device, jpeg.idle_work.work);
        unsigned int fences = 0;
-       unsigned int i;
+       unsigned int i, j;
 
        for (i = 0; i < adev->jpeg.num_jpeg_inst; ++i) {
                if (adev->jpeg.harvest_config & (1 << i))
                        continue;
 
-               fences += amdgpu_fence_count_emitted(&adev->jpeg.inst[i].ring_dec);
+               for (j = 0; j < adev->jpeg.num_jpeg_rings; ++j)
+                       fences += amdgpu_fence_count_emitted(&adev->jpeg.inst[i].ring_dec[j]);
        }
 
        if (!fences && !atomic_read(&adev->jpeg.total_submission_cnt))
@@ -122,17 +124,17 @@ int amdgpu_jpeg_dec_ring_test_ring(struct amdgpu_ring *ring)
        if (amdgpu_sriov_vf(adev))
                return 0;
 
-       WREG32(adev->jpeg.inst[ring->me].external.jpeg_pitch, 0xCAFEDEAD);
+       WREG32(adev->jpeg.inst[ring->me].external.jpeg_pitch[ring->pipe], 0xCAFEDEAD);
        r = amdgpu_ring_alloc(ring, 3);
        if (r)
                return r;
 
-       amdgpu_ring_write(ring, PACKET0(adev->jpeg.internal.jpeg_pitch, 0));
+       amdgpu_ring_write(ring, PACKET0(adev->jpeg.internal.jpeg_pitch[ring->pipe], 0));
        amdgpu_ring_write(ring, 0xDEADBEEF);
        amdgpu_ring_commit(ring);
 
        for (i = 0; i < adev->usec_timeout; i++) {
-               tmp = RREG32(adev->jpeg.inst[ring->me].external.jpeg_pitch);
+               tmp = RREG32(adev->jpeg.inst[ring->me].external.jpeg_pitch[ring->pipe]);
                if (tmp == 0xDEADBEEF)
                        break;
                udelay(1);
@@ -161,8 +163,7 @@ static int amdgpu_jpeg_dec_set_reg(struct amdgpu_ring *ring, uint32_t handle,
 
        ib = &job->ibs[0];
 
-       ib->ptr[0] = PACKETJ(adev->jpeg.internal.jpeg_pitch, 0, 0,
-                            PACKETJ_TYPE0);
+       ib->ptr[0] = PACKETJ(adev->jpeg.internal.jpeg_pitch[ring->pipe], 0, 0, PACKETJ_TYPE0);
        ib->ptr[1] = 0xDEADBEEF;
        for (i = 2; i < 16; i += 2) {
                ib->ptr[i] = PACKETJ(0, 0, 0, PACKETJ_TYPE6);
@@ -208,7 +209,7 @@ int amdgpu_jpeg_dec_ring_test_ib(struct amdgpu_ring *ring, long timeout)
        }
        if (!amdgpu_sriov_vf(adev)) {
                for (i = 0; i < adev->usec_timeout; i++) {
-                       tmp = RREG32(adev->jpeg.inst[ring->me].external.jpeg_pitch);
+                       tmp = RREG32(adev->jpeg.inst[ring->me].external.jpeg_pitch[ring->pipe]);
                        if (tmp == 0xDEADBEEF)
                                break;
                        udelay(1);

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.h
index 0ca76f0f23e9c8a0b980050cfbf27afa7307ef34..cb6c127ab81d4d214ddea2806f9f17eacfec4ce8 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.h
@@ -27,16 +27,17 @@
 #include "amdgpu_ras.h"
 
 #define AMDGPU_MAX_JPEG_INSTANCES      2
+#define AMDGPU_MAX_JPEG_RINGS          8
 
 #define AMDGPU_JPEG_HARVEST_JPEG0 (1 << 0)
 #define AMDGPU_JPEG_HARVEST_JPEG1 (1 << 1)
 
 struct amdgpu_jpeg_reg{
-       unsigned jpeg_pitch;
+       unsigned jpeg_pitch[AMDGPU_MAX_JPEG_RINGS];
 };
 
 struct amdgpu_jpeg_inst {
-       struct amdgpu_ring ring_dec;
+       struct amdgpu_ring ring_dec[AMDGPU_MAX_JPEG_RINGS];
        struct amdgpu_irq_src irq;
        struct amdgpu_jpeg_reg external;
 };
@@ -48,6 +49,7 @@ struct amdgpu_jpeg_ras {
 struct amdgpu_jpeg {
        uint8_t num_jpeg_inst;
        struct amdgpu_jpeg_inst inst[AMDGPU_MAX_JPEG_INSTANCES];
+       unsigned num_jpeg_rings;
        struct amdgpu_jpeg_reg internal;
        unsigned harvest_config;
        struct delayed_work idle_work;

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
index 1d3b224b8b2894d35b50b0795a2d972332488b77..44997c7ee89d20f1d825e666c2b41787c3bff438 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
@@ -462,8 +462,9 @@ static int amdgpu_hw_ip_info(struct amdgpu_device *adev,
                        if (adev->jpeg.harvest_config & (1 << i))
                                continue;
 
-                       if (adev->jpeg.inst[i].ring_dec.sched.ready)
-                               ++num_rings;
+                       for (j = 0; j < adev->jpeg.num_jpeg_rings; j++)
+                               if (adev->jpeg.inst[i].ring_dec[j].sched.ready)
+                                       ++num_rings;
                }
                ib_start_alignment = 16;
                ib_size_alignment = 16;

diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v1_0.c b/drivers/gpu/drm/amd/amdgpu/jpeg_v1_0.c
index 71fe7f6f9889c4a5ff0613c1343cbf2c6ce2b4f4..1c5b60604a193ab98fc8481aa9b7ddf1e6ecf83c 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/jpeg_v1_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/jpeg_v1_0.c
@@ -437,7 +437,7 @@ static int jpeg_v1_0_process_interrupt(struct amdgpu_device *adev,
 
        switch (entry->src_id) {
        case 126:
-               amdgpu_fence_process(&adev->jpeg.inst->ring_dec);
+               amdgpu_fence_process(adev->jpeg.inst->ring_dec);
                break;
        default:
                DRM_ERROR("Unhandled interrupt: %d %d\n",
@@ -484,7 +484,7 @@ int jpeg_v1_0_sw_init(void *handle)
        if (r)
                return r;
 
-       ring = &adev->jpeg.inst->ring_dec;
+       ring = adev->jpeg.inst->ring_dec;
        ring->vm_hub = AMDGPU_MMHUB0(0);
        sprintf(ring->name, "jpeg_dec");
        r = amdgpu_ring_init(adev, ring, 512, &adev->jpeg.inst->irq,
@@ -492,7 +492,7 @@ int jpeg_v1_0_sw_init(void *handle)
        if (r)
                return r;
 
-       adev->jpeg.internal.jpeg_pitch = adev->jpeg.inst->external.jpeg_pitch =
+       adev->jpeg.internal.jpeg_pitch[0] = adev->jpeg.inst->external.jpeg_pitch[0] =
                SOC15_REG_OFFSET(JPEG, 0, mmUVD_JPEG_PITCH);
 
        return 0;
@@ -509,7 +509,7 @@ void jpeg_v1_0_sw_fini(void *handle)
 {
        struct amdgpu_device *adev = (struct amdgpu_device *)handle;
 
-       amdgpu_ring_fini(&adev->jpeg.inst[0].ring_dec);
+       amdgpu_ring_fini(adev->jpeg.inst->ring_dec);
 }
 
 /**
@@ -522,7 +522,7 @@ void jpeg_v1_0_sw_fini(void *handle)
  */
 void jpeg_v1_0_start(struct amdgpu_device *adev, int mode)
 {
-       struct amdgpu_ring *ring = &adev->jpeg.inst->ring_dec;
+       struct amdgpu_ring *ring = adev->jpeg.inst->ring_dec;
 
        if (mode == 0) {
                WREG32_SOC15(JPEG, 0, mmUVD_LMI_JRBC_RB_VMID, 0);
@@ -579,7 +579,7 @@ static const struct amdgpu_ring_funcs jpeg_v1_0_decode_ring_vm_funcs = {
 
 static void jpeg_v1_0_set_dec_ring_funcs(struct amdgpu_device *adev)
 {
-       adev->jpeg.inst->ring_dec.funcs = &jpeg_v1_0_decode_ring_vm_funcs;
+       adev->jpeg.inst->ring_dec->funcs = &jpeg_v1_0_decode_ring_vm_funcs;
        DRM_INFO("JPEG decode is enabled in VM mode\n");
 }
 

diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c b/drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c
index 3a43e42f4834db97db0cdb912eea39132a2a47bf..3aeeceae34a5efd82be317b08caa49b1907646d4 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c
@@ -83,7 +83,7 @@ static int jpeg_v2_0_sw_init(void *handle)
        if (r)
                return r;
 
-       ring = &adev->jpeg.inst->ring_dec;
+       ring = adev->jpeg.inst->ring_dec;
        ring->use_doorbell = true;
        ring->doorbell_index = (adev->doorbell_index.vcn.vcn_ring0_1 << 1) + 1;
        ring->vm_hub = AMDGPU_MMHUB0(0);
@@ -93,8 +93,8 @@ static int jpeg_v2_0_sw_init(void *handle)
        if (r)
                return r;
 
-       adev->jpeg.internal.jpeg_pitch = mmUVD_JPEG_PITCH_INTERNAL_OFFSET;
-       adev->jpeg.inst->external.jpeg_pitch = SOC15_REG_OFFSET(JPEG, 0, mmUVD_JPEG_PITCH);
+       adev->jpeg.internal.jpeg_pitch[0] = mmUVD_JPEG_PITCH_INTERNAL_OFFSET;
+       adev->jpeg.inst->external.jpeg_pitch[0] = SOC15_REG_OFFSET(JPEG, 0, mmUVD_JPEG_PITCH);
 
        return 0;
 }
@@ -129,7 +129,7 @@ static int jpeg_v2_0_sw_fini(void *handle)
 static int jpeg_v2_0_hw_init(void *handle)
 {
        struct amdgpu_device *adev = (struct amdgpu_device *)handle;
-       struct amdgpu_ring *ring = &adev->jpeg.inst->ring_dec;
+       struct amdgpu_ring *ring = adev->jpeg.inst->ring_dec;
        int r;
 
        adev->nbio.funcs->vcn_doorbell_range(adev, ring->use_doorbell,
@@ -312,7 +312,7 @@ static void jpeg_v2_0_enable_clock_gating(struct amdgpu_device *adev)
  */
 static int jpeg_v2_0_start(struct amdgpu_device *adev)
 {
-       struct amdgpu_ring *ring = &adev->jpeg.inst->ring_dec;
+       struct amdgpu_ring *ring = adev->jpeg.inst->ring_dec;
        int r;
 
        if (adev->pm.dpm_enabled)
@@ -729,7 +729,7 @@ static int jpeg_v2_0_process_interrupt(struct amdgpu_device *adev,
 
        switch (entry->src_id) {
        case VCN_2_0__SRCID__JPEG_DECODE:
-               amdgpu_fence_process(&adev->jpeg.inst->ring_dec);
+               amdgpu_fence_process(adev->jpeg.inst->ring_dec);
                break;
        default:
                DRM_ERROR("Unhandled interrupt: %d %d\n",
@@ -791,7 +791,7 @@ static const struct amdgpu_ring_funcs jpeg_v2_0_dec_ring_vm_funcs = {
 
 static void jpeg_v2_0_set_dec_ring_funcs(struct amdgpu_device *adev)
 {
-       adev->jpeg.inst->ring_dec.funcs = &jpeg_v2_0_dec_ring_vm_funcs;
+       adev->jpeg.inst->ring_dec->funcs = &jpeg_v2_0_dec_ring_vm_funcs;
        DRM_INFO("JPEG decode is enabled in VM mode\n");
 }
 

diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c b/drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c
index 259b7ba6a842c90e4dba032451141a38c3cb053b..b79edb12b90e8e7c20533088ece3d5087abc5880 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c
+++ b/drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c
@@ -125,7 +125,7 @@ static int jpeg_v2_5_sw_init(void *handle)
                if (adev->jpeg.harvest_config & (1 << i))
                        continue;
 
-               ring = &adev->jpeg.inst[i].ring_dec;
+               ring = adev->jpeg.inst[i].ring_dec;
                ring->use_doorbell = true;
                if (adev->ip_versions[UVD_HWIP][0] == IP_VERSION(2, 5, 0))
                        ring->vm_hub = AMDGPU_MMHUB1(0);
@@ -138,8 +138,8 @@ static int jpeg_v2_5_sw_init(void *handle)
                if (r)
                        return r;
 
-               adev->jpeg.internal.jpeg_pitch = mmUVD_JPEG_PITCH_INTERNAL_OFFSET;
-               adev->jpeg.inst[i].external.jpeg_pitch = SOC15_REG_OFFSET(JPEG, i, mmUVD_JPEG_PITCH);
+               adev->jpeg.internal.jpeg_pitch[0] = mmUVD_JPEG_PITCH_INTERNAL_OFFSET;
+               adev->jpeg.inst[i].external.jpeg_pitch[0] = SOC15_REG_OFFSET(JPEG, i, mmUVD_JPEG_PITCH);
        }
 
        r = amdgpu_jpeg_ras_sw_init(adev);
@@ -186,7 +186,7 @@ static int jpeg_v2_5_hw_init(void *handle)
                if (adev->jpeg.harvest_config & (1 << i))
                        continue;
 
-               ring = &adev->jpeg.inst[i].ring_dec;
+               ring = adev->jpeg.inst[i].ring_dec;
                adev->nbio.funcs->vcn_doorbell_range(adev, ring->use_doorbell,
                        (adev->doorbell_index.vcn.vcn_ring0_1 << 1) + 8 * i, i);
 
@@ -326,7 +326,7 @@ static int jpeg_v2_5_start(struct amdgpu_device *adev)
                if (adev->jpeg.harvest_config & (1 << i))
                        continue;
 
-               ring = &adev->jpeg.inst[i].ring_dec;
+               ring = adev->jpeg.inst[i].ring_dec;
                /* disable anti hang mechanism */
                WREG32_P(SOC15_REG_OFFSET(JPEG, i, mmUVD_JPEG_POWER_STATUS), 0,
                        ~UVD_JPEG_POWER_STATUS__JPEG_POWER_STATUS_MASK);
@@ -591,7 +591,7 @@ static int jpeg_v2_5_process_interrupt(struct amdgpu_device *adev,
 
        switch (entry->src_id) {
        case VCN_2_0__SRCID__JPEG_DECODE:
-               amdgpu_fence_process(&adev->jpeg.inst[ip_instance].ring_dec);
+               amdgpu_fence_process(adev->jpeg.inst[ip_instance].ring_dec);
                break;
        case VCN_2_6__SRCID_DJPEG0_POISON:
        case VCN_2_6__SRCID_EJPEG0_POISON:
@@ -712,10 +712,10 @@ static void jpeg_v2_5_set_dec_ring_funcs(struct amdgpu_device *adev)
                if (adev->jpeg.harvest_config & (1 << i))
                        continue;
                if (adev->asic_type == CHIP_ARCTURUS)
-                       adev->jpeg.inst[i].ring_dec.funcs = &jpeg_v2_5_dec_ring_vm_funcs;
+                       adev->jpeg.inst[i].ring_dec->funcs = &jpeg_v2_5_dec_ring_vm_funcs;
                else  /* CHIP_ALDEBARAN */
-                       adev->jpeg.inst[i].ring_dec.funcs = &jpeg_v2_6_dec_ring_vm_funcs;
-               adev->jpeg.inst[i].ring_dec.me = i;
+                       adev->jpeg.inst[i].ring_dec->funcs = &jpeg_v2_6_dec_ring_vm_funcs;
+               adev->jpeg.inst[i].ring_dec->me = i;
                DRM_INFO("JPEG(%d) JPEG decode is enabled in VM mode\n", i);
        }
 }

diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c b/drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c
index c55386c22311aabd60777665271ac31309387d26..cb5494effc0fd420d319d8ff55e550ec0b342acd 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c
@@ -98,7 +98,7 @@ static int jpeg_v3_0_sw_init(void *handle)
        if (r)
                return r;
 
-       ring = &adev->jpeg.inst->ring_dec;
+       ring = adev->jpeg.inst->ring_dec;
        ring->use_doorbell = true;
        ring->doorbell_index = (adev->doorbell_index.vcn.vcn_ring0_1 << 1) + 1;
        ring->vm_hub = AMDGPU_MMHUB0(0);
@@ -108,8 +108,8 @@ static int jpeg_v3_0_sw_init(void *handle)
        if (r)
                return r;
 
-       adev->jpeg.internal.jpeg_pitch = mmUVD_JPEG_PITCH_INTERNAL_OFFSET;
-       adev->jpeg.inst->external.jpeg_pitch = SOC15_REG_OFFSET(JPEG, 0, mmUVD_JPEG_PITCH);
+       adev->jpeg.internal.jpeg_pitch[0] = mmUVD_JPEG_PITCH_INTERNAL_OFFSET;
+       adev->jpeg.inst->external.jpeg_pitch[0] = SOC15_REG_OFFSET(JPEG, 0, mmUVD_JPEG_PITCH);
 
        return 0;
 }
@@ -144,7 +144,7 @@ static int jpeg_v3_0_sw_fini(void *handle)
 static int jpeg_v3_0_hw_init(void *handle)
 {
        struct amdgpu_device *adev = (struct amdgpu_device *)handle;
-       struct amdgpu_ring *ring = &adev->jpeg.inst->ring_dec;
+       struct amdgpu_ring *ring = adev->jpeg.inst->ring_dec;
        int r;
 
        adev->nbio.funcs->vcn_doorbell_range(adev, ring->use_doorbell,
@@ -330,7 +330,7 @@ static int jpeg_v3_0_enable_static_power_gating(struct amdgpu_device *adev)
  */
 static int jpeg_v3_0_start(struct amdgpu_device *adev)
 {
-       struct amdgpu_ring *ring = &adev->jpeg.inst->ring_dec;
+       struct amdgpu_ring *ring = adev->jpeg.inst->ring_dec;
        int r;
 
        if (adev->pm.dpm_enabled)
@@ -527,7 +527,7 @@ static int jpeg_v3_0_process_interrupt(struct amdgpu_device *adev,
 
        switch (entry->src_id) {
        case VCN_2_0__SRCID__JPEG_DECODE:
-               amdgpu_fence_process(&adev->jpeg.inst->ring_dec);
+               amdgpu_fence_process(adev->jpeg.inst->ring_dec);
                break;
        default:
                DRM_ERROR("Unhandled interrupt: %d %d\n",
@@ -589,7 +589,7 @@ static const struct amdgpu_ring_funcs jpeg_v3_0_dec_ring_vm_funcs = {
 
 static void jpeg_v3_0_set_dec_ring_funcs(struct amdgpu_device *adev)
 {
-       adev->jpeg.inst->ring_dec.funcs = &jpeg_v3_0_dec_ring_vm_funcs;
+       adev->jpeg.inst->ring_dec->funcs = &jpeg_v3_0_dec_ring_vm_funcs;
        DRM_INFO("JPEG decode is enabled in VM mode\n");
 }
 

diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c b/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c
index d7d5ffc293937c3f0962f44a3dbe7745fd3b7e5a..495facb885f4d391acfe8416588e05c43373817d 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c
@@ -105,7 +105,7 @@ static int jpeg_v4_0_sw_init(void *handle)
        if (r)
                return r;
 
-       ring = &adev->jpeg.inst->ring_dec;
+       ring = adev->jpeg.inst->ring_dec;
        ring->use_doorbell = true;
        ring->doorbell_index = amdgpu_sriov_vf(adev) ? (((adev->doorbell_index.vcn.vcn_ring0_1) << 1) + 4) : ((adev->doorbell_index.vcn.vcn_ring0_1 << 1) + 1);
        ring->vm_hub = AMDGPU_MMHUB0(0);
@@ -116,8 +116,8 @@ static int jpeg_v4_0_sw_init(void *handle)
        if (r)
                return r;
 
-       adev->jpeg.internal.jpeg_pitch = regUVD_JPEG_PITCH_INTERNAL_OFFSET;
-       adev->jpeg.inst->external.jpeg_pitch = SOC15_REG_OFFSET(JPEG, 0, regUVD_JPEG_PITCH);
+       adev->jpeg.internal.jpeg_pitch[0] = regUVD_JPEG_PITCH_INTERNAL_OFFSET;
+       adev->jpeg.inst->external.jpeg_pitch[0] = SOC15_REG_OFFSET(JPEG, 0, regUVD_JPEG_PITCH);
 
        r = amdgpu_jpeg_ras_sw_init(adev);
        if (r)
@@ -156,7 +156,7 @@ static int jpeg_v4_0_sw_fini(void *handle)
 static int jpeg_v4_0_hw_init(void *handle)
 {
        struct amdgpu_device *adev = (struct amdgpu_device *)handle;
-       struct amdgpu_ring *ring = &adev->jpeg.inst->ring_dec;
+       struct amdgpu_ring *ring = adev->jpeg.inst->ring_dec;
        int r;
 
        if (amdgpu_sriov_vf(adev)) {
@@ -363,7 +363,7 @@ static int jpeg_v4_0_enable_static_power_gating(struct amdgpu_device *adev)
  */
 static int jpeg_v4_0_start(struct amdgpu_device *adev)
 {
-       struct amdgpu_ring *ring = &adev->jpeg.inst->ring_dec;
+       struct amdgpu_ring *ring = adev->jpeg.inst->ring_dec;
        int r;
 
        if (adev->pm.dpm_enabled)
@@ -441,7 +441,7 @@ static int jpeg_v4_0_start_sriov(struct amdgpu_device *adev)
 
        table_size = 0;
 
-       ring = &adev->jpeg.inst->ring_dec;
+       ring = adev->jpeg.inst->ring_dec;
 
        MMSCH_V4_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(JPEG, 0,
                regUVD_LMI_JRBC_RB_64BIT_BAR_LOW),
@@ -678,7 +678,7 @@ static int jpeg_v4_0_process_interrupt(struct amdgpu_device *adev,
 
        switch (entry->src_id) {
        case VCN_4_0__SRCID__JPEG_DECODE:
-               amdgpu_fence_process(&adev->jpeg.inst->ring_dec);
+               amdgpu_fence_process(adev->jpeg.inst->ring_dec);
                break;
        case VCN_4_0__SRCID_DJPEG0_POISON:
        case VCN_4_0__SRCID_EJPEG0_POISON:
@@ -744,7 +744,7 @@ static const struct amdgpu_ring_funcs jpeg_v4_0_dec_ring_vm_funcs = {
 
 static void jpeg_v4_0_set_dec_ring_funcs(struct amdgpu_device *adev)
 {
-       adev->jpeg.inst->ring_dec.funcs = &jpeg_v4_0_dec_ring_vm_funcs;
+       adev->jpeg.inst->ring_dec->funcs = &jpeg_v4_0_dec_ring_vm_funcs;
        DRM_DEV_INFO(adev->dev, "JPEG decode is enabled in VM mode\n");
 }
 

diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c b/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c
index 1fc72f9b52ed3f55956cbbcbc13101956c6a0d7c..784c83994ca104c80a93181971f919bfc152a991 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c
+++ b/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c
@@ -85,7 +85,7 @@ static int jpeg_v4_0_3_sw_init(void *handle)
        if (r)
                return r;
 
-       ring = &adev->jpeg.inst->ring_dec;
+       ring = adev->jpeg.inst->ring_dec;
        ring->use_doorbell = false;
        ring->vm_hub = AMDGPU_MMHUB0(0);
        sprintf(ring->name, "jpeg_dec");
@@ -94,8 +94,8 @@ static int jpeg_v4_0_3_sw_init(void *handle)
        if (r)
                return r;
 
-       adev->jpeg.internal.jpeg_pitch = regUVD_JPEG_PITCH_INTERNAL_OFFSET;
-       adev->jpeg.inst->external.jpeg_pitch = SOC15_REG_OFFSET(JPEG, 0, regUVD_JPEG_PITCH);
+       adev->jpeg.internal.jpeg_pitch[0] = regUVD_JPEG_PITCH_INTERNAL_OFFSET;
+       adev->jpeg.inst->external.jpeg_pitch[0] = SOC15_REG_OFFSET(JPEG, 0, regUVD_JPEG_PITCH);
 
        return 0;
 }
@@ -130,7 +130,7 @@ static int jpeg_v4_0_3_sw_fini(void *handle)
 static int jpeg_v4_0_3_hw_init(void *handle)
 {
        struct amdgpu_device *adev = (struct amdgpu_device *)handle;
-       struct amdgpu_ring *ring = &adev->jpeg.inst->ring_dec;
+       struct amdgpu_ring *ring = adev->jpeg.inst->ring_dec;
        int r;
 
        r = amdgpu_ring_test_helper(ring);
@@ -254,7 +254,7 @@ static void jpeg_v4_0_3_enable_clock_gating(struct amdgpu_device *adev)
  */
 static int jpeg_v4_0_3_start(struct amdgpu_device *adev)
 {
-       struct amdgpu_ring *ring = &adev->jpeg.inst->ring_dec;
+       struct amdgpu_ring *ring = adev->jpeg.inst->ring_dec;
 
        WREG32_SOC15(JPEG, 0, regUVD_PGFSM_CONFIG,
                1 << UVD_PGFSM_CONFIG__UVDJ_PWR_CONFIG__SHIFT);
@@ -675,7 +675,7 @@ static int jpeg_v4_0_3_process_interrupt(struct amdgpu_device *adev,
 
        switch (entry->src_id) {
        case VCN_2_0__SRCID__JPEG_DECODE:
-               amdgpu_fence_process(&adev->jpeg.inst->ring_dec);
+               amdgpu_fence_process(adev->jpeg.inst->ring_dec);
                break;
        default:
                DRM_DEV_ERROR(adev->dev, "Unhandled interrupt: %d %d\n",
@@ -737,8 +737,8 @@ static const struct amdgpu_ring_funcs jpeg_v4_0_3_dec_ring_vm_funcs = {
 
 static void jpeg_v4_0_3_set_dec_ring_funcs(struct amdgpu_device *adev)
 {
-       adev->jpeg.inst->ring_dec.funcs = &jpeg_v4_0_3_dec_ring_vm_funcs;
-       adev->jpeg.inst->ring_dec.me = 0;
+       adev->jpeg.inst->ring_dec->funcs = &jpeg_v4_0_3_dec_ring_vm_funcs;
+       adev->jpeg.inst->ring_dec->me = 0;
        DRM_DEV_INFO(adev->dev, "JPEG decode is enabled in VM mode\n");
 }
 

diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
index f877c39c7cdde24d3f8c4def47630edda3ab380f..16feb491adf5de18f28b6dab2e056d61287040df 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
@@ -211,7 +211,7 @@ static int vcn_v1_0_hw_init(void *handle)
                        goto done;
        }
 
-       ring = &adev->jpeg.inst->ring_dec;
+       ring = adev->jpeg.inst->ring_dec;
        r = amdgpu_ring_test_helper(ring);
        if (r)
                goto done;
@@ -1304,7 +1304,7 @@ static int vcn_v1_0_pause_dpg_mode(struct amdgpu_device *adev,
                                                        UVD_DPG_PAUSE__JPEG_PAUSE_DPG_ACK_MASK);
 
                                /* Restore */
-                               ring = &adev->jpeg.inst->ring_dec;
+                               ring = adev->jpeg.inst->ring_dec;
                                WREG32_SOC15(UVD, 0, mmUVD_LMI_JRBC_RB_VMID, 0);
                                WREG32_SOC15(UVD, 0, mmUVD_JRBC_RB_CNTL,
                                                        UVD_JRBC_RB_CNTL__RB_NO_FETCH_MASK |
@@ -1802,7 +1802,7 @@ static void vcn_v1_0_idle_work_handler(struct work_struct *work)
                else
                        new_state.fw_based = VCN_DPG_STATE__UNPAUSE;
 
-               if (amdgpu_fence_count_emitted(&adev->jpeg.inst->ring_dec))
+               if (amdgpu_fence_count_emitted(adev->jpeg.inst->ring_dec))
                        new_state.jpeg = VCN_DPG_STATE__PAUSE;
                else
                        new_state.jpeg = VCN_DPG_STATE__UNPAUSE;
@@ -1810,7 +1810,7 @@ static void vcn_v1_0_idle_work_handler(struct work_struct *work)
                adev->vcn.pause_dpg_mode(adev, 0, &new_state);
        }
 
-       fences += amdgpu_fence_count_emitted(&adev->jpeg.inst->ring_dec);
+       fences += amdgpu_fence_count_emitted(adev->jpeg.inst->ring_dec);
        fences += amdgpu_fence_count_emitted(&adev->vcn.inst->ring_dec);
 
        if (fences == 0) {
@@ -1832,7 +1832,7 @@ static void vcn_v1_0_ring_begin_use(struct amdgpu_ring *ring)
 
        mutex_lock(&adev->vcn.vcn1_jpeg1_workaround);
 
-       if (amdgpu_fence_wait_empty(&ring->adev->jpeg.inst->ring_dec))
+       if (amdgpu_fence_wait_empty(ring->adev->jpeg.inst->ring_dec))
                DRM_ERROR("VCN dec: jpeg dec ring may not be empty\n");
 
        vcn_v1_0_set_pg_for_begin_use(ring, set_clocks);
@@ -1864,7 +1864,7 @@ void vcn_v1_0_set_pg_for_begin_use(struct amdgpu_ring *ring, bool set_clocks)
                else
                        new_state.fw_based = VCN_DPG_STATE__UNPAUSE;
 
-               if (amdgpu_fence_count_emitted(&adev->jpeg.inst->ring_dec))
+               if (amdgpu_fence_count_emitted(adev->jpeg.inst->ring_dec))
                        new_state.jpeg = VCN_DPG_STATE__PAUSE;
                else
                        new_state.jpeg = VCN_DPG_STATE__UNPAUSE;