]> git.dujemihanovic.xyz Git - linux.git/commitdiff
drm/amdgpu: save rlcv/rlcp ucode version in amdgpu_gfx
authorHawking Zhang <Hawking.Zhang@amd.com>
Tue, 13 Sep 2022 11:18:25 +0000 (19:18 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Fri, 30 Sep 2022 20:58:23 +0000 (16:58 -0400)
cache rlcv/rlcvp ucode version info in amdgpu_gfx
structure

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

index 23a696d38390d41f3584a52cf266970cb0c8f72c..de5b936b016d7cb4c0dd520a229c185f2cb984b7 100644 (file)
@@ -304,6 +304,10 @@ struct amdgpu_gfx {
        uint32_t                        rlc_srlg_feature_version;
        uint32_t                        rlc_srls_fw_version;
        uint32_t                        rlc_srls_feature_version;
+       uint32_t                        rlcp_ucode_version;
+       uint32_t                        rlcp_ucode_feature_version;
+       uint32_t                        rlcv_ucode_version;
+       uint32_t                        rlcv_ucode_feature_version;
        uint32_t                        mec_feature_version;
        uint32_t                        mec2_feature_version;
        bool                            mec_fw_write_wait;
index 96b6cf4c4d54f863488a4999058b06efaa182fe1..59edf32f775e5ef6c78ac2692d1aaa7bba496b86 100644 (file)
@@ -260,8 +260,12 @@ struct rlc_firmware_header_v2_2 {
 /* version_major=2, version_minor=3 */
 struct rlc_firmware_header_v2_3 {
     struct rlc_firmware_header_v2_2 v2_2;
+    uint32_t rlcp_ucode_version;
+    uint32_t rlcp_ucode_feature_version;
     uint32_t rlcp_ucode_size_bytes;
     uint32_t rlcp_ucode_offset_bytes;
+    uint32_t rlcv_ucode_version;
+    uint32_t rlcv_ucode_feature_version;
     uint32_t rlcv_ucode_size_bytes;
     uint32_t rlcv_ucode_offset_bytes;
 };
index fbb13c9147f8c1eb286f4373ecdeba29500029de..9174a5220bc022593f9c61112fad972670ba52f9 100644 (file)
@@ -511,8 +511,13 @@ static void gfx_v11_0_init_rlcp_rlcv_microcode(struct amdgpu_device *adev)
        const struct rlc_firmware_header_v2_3 *rlc_hdr;
 
        rlc_hdr = (const struct rlc_firmware_header_v2_3 *)adev->gfx.rlc_fw->data;
+       adev->gfx.rlcp_ucode_version = le32_to_cpu(rlc_hdr->rlcp_ucode_version);
+       adev->gfx.rlcp_ucode_feature_version = le32_to_cpu(rlc_hdr->rlcp_ucode_feature_version);
        adev->gfx.rlc.rlcp_ucode_size_bytes = le32_to_cpu(rlc_hdr->rlcp_ucode_size_bytes);
        adev->gfx.rlc.rlcp_ucode = (u8 *)rlc_hdr + le32_to_cpu(rlc_hdr->rlcp_ucode_offset_bytes);
+
+       adev->gfx.rlcv_ucode_version = le32_to_cpu(rlc_hdr->rlcv_ucode_version);
+       adev->gfx.rlcv_ucode_feature_version = le32_to_cpu(rlc_hdr->rlcv_ucode_feature_version);
        adev->gfx.rlc.rlcv_ucode_size_bytes = le32_to_cpu(rlc_hdr->rlcv_ucode_size_bytes);
        adev->gfx.rlc.rlcv_ucode = (u8 *)rlc_hdr + le32_to_cpu(rlc_hdr->rlcv_ucode_offset_bytes);
 }