drm/amdgpu: Add sdma ras function on sdma v6_0_3

Add sdma ras function on sdma v6_0_3.

Signed-off-by: YiPeng Chai <YiPeng.Chai@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c
index e9b78739b9ff789ab5d7c38ac047a917623b52b1..231ca06bc9c78ac57037e1e078c12bd7b6281c2c 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c
@@ -305,3 +305,38 @@ void amdgpu_sdma_unset_buffer_funcs_helper(struct amdgpu_device *adev)
                }
        }
 }
+
+int amdgpu_sdma_ras_sw_init(struct amdgpu_device *adev)
+{
+       int err = 0;
+       struct amdgpu_sdma_ras *ras = NULL;
+
+       /* adev->sdma.ras is NULL, which means sdma does not
+        * support ras function, then do nothing here.
+        */
+       if (!adev->sdma.ras)
+               return 0;
+
+       ras = adev->sdma.ras;
+
+       err = amdgpu_ras_register_ras_block(adev, &ras->ras_block);
+       if (err) {
+               dev_err(adev->dev, "Failed to register sdma ras block!\n");
+               return err;
+       }
+
+       strcpy(ras->ras_block.ras_comm.name, "sdma");
+       ras->ras_block.ras_comm.block = AMDGPU_RAS_BLOCK__SDMA;
+       ras->ras_block.ras_comm.type = AMDGPU_RAS_ERROR__MULTI_UNCORRECTABLE;
+       adev->sdma.ras_if = &ras->ras_block.ras_comm;
+
+       /* If not define special ras_late_init function, use default ras_late_init */
+       if (!ras->ras_block.ras_late_init)
+               ras->ras_block.ras_late_init = amdgpu_sdma_ras_late_init;
+
+       /* If not defined special ras_cb function, use default ras_cb */
+       if (!ras->ras_block.ras_cb)
+               ras->ras_block.ras_cb = amdgpu_sdma_process_ras_data_cb;
+
+       return 0;
+}

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.h
index 2d16e6d367288e20efc609e7eeca73aa87e8d74e..fc8528812598b723b929031cc1deaf8e64073af9 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.h
@@ -129,5 +129,6 @@ int amdgpu_sdma_init_microcode(struct amdgpu_device *adev, u32 instance,
 void amdgpu_sdma_destroy_inst_ctx(struct amdgpu_device *adev,
         bool duplicate);
 void amdgpu_sdma_unset_buffer_funcs_helper(struct amdgpu_device *adev);
+int amdgpu_sdma_ras_sw_init(struct amdgpu_device *adev);
 
 #endif

diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c
index 6fe292a2486b9c3ad00b864905fd0cb35d485e38..3d36329be384784188f7c276329fcf6e39e9f308 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c
@@ -1211,6 +1211,24 @@ static void sdma_v6_0_ring_emit_reg_write_reg_wait(struct amdgpu_ring *ring,
        amdgpu_ring_emit_reg_wait(ring, reg1, mask, mask);
 }
 
+static struct amdgpu_sdma_ras sdma_v6_0_3_ras = {
+       .ras_block = {
+               .ras_late_init = amdgpu_ras_block_late_init,
+       },
+};
+
+static void sdma_v6_0_set_ras_funcs(struct amdgpu_device *adev)
+{
+       switch (adev->ip_versions[SDMA0_HWIP][0]) {
+       case IP_VERSION(6, 0, 3):
+               adev->sdma.ras = &sdma_v6_0_3_ras;
+               break;
+       default:
+               break;
+       }
+
+}
+
 static int sdma_v6_0_early_init(void *handle)
 {
        struct amdgpu_device *adev = (struct amdgpu_device *)handle;
@@ -1220,6 +1238,7 @@ static int sdma_v6_0_early_init(void *handle)
        sdma_v6_0_set_vm_pte_funcs(adev);
        sdma_v6_0_set_irq_funcs(adev);
        sdma_v6_0_set_mqd_funcs(adev);
+       sdma_v6_0_set_ras_funcs(adev);
 
        return 0;
 }
@@ -1264,6 +1283,11 @@ static int sdma_v6_0_sw_init(void *handle)
                        return r;
        }
 
+       if (amdgpu_sdma_ras_sw_init(adev)) {
+               dev_err(adev->dev, "Failed to initialize sdma ras block!\n");
+               return -EINVAL;
+       }
+
        return r;
 }