]> git.dujemihanovic.xyz Git - linux.git/commitdiff
clk: mediatek: mt6797: use mtk_clk_simple_probe to simplify driver
authorMiles Chen <miles.chen@mediatek.com>
Thu, 22 Sep 2022 09:18:33 +0000 (17:18 +0800)
committerChen-Yu Tsai <wenst@chromium.org>
Mon, 26 Sep 2022 03:13:45 +0000 (11:13 +0800)
mtk_clk_simple_probe was added by Chun-Jie to simply common flow
of MediaTek clock drivers and ChenYu enhanced the error path of
mtk_clk_simple_probe and added mtk_clk_simple_remove.

Let's use mtk_clk_simple_probe and mtk_clk_simple_probe in other
MediaTek clock drivers as well.

Signed-off-by: Miles Chen <miles.chen@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220922091841.4099-6-miles.chen@mediatek.com
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
drivers/clk/mediatek/clk-mt6797-img.c
drivers/clk/mediatek/clk-mt6797-vdec.c
drivers/clk/mediatek/clk-mt6797-venc.c

index 25d17db13bac3ca4674617a4a77aa0ab6e6c2cfe..7c6a53fbb8be68211b8e23f0ad02b429e62d22fc 100644 (file)
@@ -32,33 +32,23 @@ static const struct mtk_gate img_clks[] = {
        GATE_IMG(CLK_IMG_LARB6, "img_larb6", "mm_sel", 0),
 };
 
-static const struct of_device_id of_match_clk_mt6797_img[] = {
-       { .compatible = "mediatek,mt6797-imgsys", },
-       {}
+static const struct mtk_clk_desc img_desc = {
+       .clks = img_clks,
+       .num_clks = ARRAY_SIZE(img_clks),
 };
 
-static int clk_mt6797_img_probe(struct platform_device *pdev)
-{
-       struct clk_hw_onecell_data *clk_data;
-       int r;
-       struct device_node *node = pdev->dev.of_node;
-
-       clk_data = mtk_alloc_clk_data(CLK_IMG_NR);
-
-       mtk_clk_register_gates(node, img_clks, ARRAY_SIZE(img_clks),
-                              clk_data);
-
-       r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
-       if (r)
-               dev_err(&pdev->dev,
-                       "could not register clock provider: %s: %d\n",
-                       pdev->name, r);
-
-       return r;
-}
+static const struct of_device_id of_match_clk_mt6797_img[] = {
+       {
+               .compatible = "mediatek,mt6797-imgsys",
+               .data = &img_desc,
+       }, {
+               /* sentinel */
+       }
+};
 
 static struct platform_driver clk_mt6797_img_drv = {
-       .probe = clk_mt6797_img_probe,
+       .probe = mtk_clk_simple_probe,
+       .remove = mtk_clk_simple_remove,
        .driver = {
                .name = "clk-mt6797-img",
                .of_match_table = of_match_clk_mt6797_img,
index de857894e0338fdc434e166cad8ae4c8ed68b9a4..6120fccc859f1b9fa9a7458bf43588878e3cc3cb 100644 (file)
@@ -49,33 +49,23 @@ static const struct mtk_gate vdec_clks[] = {
        GATE_VDEC1(CLK_VDEC_LARB1_CKEN, "vdec_larb1_cken", "mm_sel", 0),
 };
 
-static const struct of_device_id of_match_clk_mt6797_vdec[] = {
-       { .compatible = "mediatek,mt6797-vdecsys", },
-       {}
+static const struct mtk_clk_desc vdec_desc = {
+       .clks = vdec_clks,
+       .num_clks = ARRAY_SIZE(vdec_clks),
 };
 
-static int clk_mt6797_vdec_probe(struct platform_device *pdev)
-{
-       struct clk_hw_onecell_data *clk_data;
-       int r;
-       struct device_node *node = pdev->dev.of_node;
-
-       clk_data = mtk_alloc_clk_data(CLK_VDEC_NR);
-
-       mtk_clk_register_gates(node, vdec_clks, ARRAY_SIZE(vdec_clks),
-                              clk_data);
-
-       r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
-       if (r)
-               dev_err(&pdev->dev,
-                       "could not register clock provider: %s: %d\n",
-                       pdev->name, r);
-
-       return r;
-}
+static const struct of_device_id of_match_clk_mt6797_vdec[] = {
+       {
+               .compatible = "mediatek,mt6797-vdecsys",
+               .data = &vdec_desc,
+       }, {
+               /* sentinel */
+       }
+};
 
 static struct platform_driver clk_mt6797_vdec_drv = {
-       .probe = clk_mt6797_vdec_probe,
+       .probe = mtk_clk_simple_probe,
+       .remove = mtk_clk_simple_remove,
        .driver = {
                .name = "clk-mt6797-vdec",
                .of_match_table = of_match_clk_mt6797_vdec,
index 78b7ed55f9799d5bdb7acc35c5b10d862b8f7fd3..834d3834d2bbcccbf616bd20a5984ae0213a5d42 100644 (file)
@@ -34,33 +34,23 @@ static const struct mtk_gate venc_clks[] = {
        GATE_VENC(CLK_VENC_3, "venc_3", "venc_sel", 12),
 };
 
-static const struct of_device_id of_match_clk_mt6797_venc[] = {
-       { .compatible = "mediatek,mt6797-vencsys", },
-       {}
+static const struct mtk_clk_desc venc_desc = {
+       .clks = venc_clks,
+       .num_clks = ARRAY_SIZE(venc_clks),
 };
 
-static int clk_mt6797_venc_probe(struct platform_device *pdev)
-{
-       struct clk_hw_onecell_data *clk_data;
-       int r;
-       struct device_node *node = pdev->dev.of_node;
-
-       clk_data = mtk_alloc_clk_data(CLK_VENC_NR);
-
-       mtk_clk_register_gates(node, venc_clks, ARRAY_SIZE(venc_clks),
-                              clk_data);
-
-       r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
-       if (r)
-               dev_err(&pdev->dev,
-                       "could not register clock provider: %s: %d\n",
-                       pdev->name, r);
-
-       return r;
-}
+static const struct of_device_id of_match_clk_mt6797_venc[] = {
+       {
+               .compatible = "mediatek,mt6797-vencsys",
+               .data = &venc_desc,
+       }, {
+               /* sentinel */
+       }
+};
 
 static struct platform_driver clk_mt6797_venc_drv = {
-       .probe = clk_mt6797_venc_probe,
+       .probe = mtk_clk_simple_probe,
+       .remove = mtk_clk_simple_remove,
        .driver = {
                .name = "clk-mt6797-venc",
                .of_match_table = of_match_clk_mt6797_venc,