drm/amdgpu: Updated TCP/UTCL1 programming

Update TCP/UTCL1 thrashing control settings

v2: updated rev_id check

Signed-off-by: Mangesh Gadre <Mangesh.Gadre@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
index a60429c3e93c3ed87ff21d5524e0baf2a3c0aa3b..b4fdb269f8567e4ae5a54a1be6417b497f2cb94c 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
@@ -203,6 +203,9 @@ static void gfx_v9_4_3_init_golden_registers(struct amdgpu_device *adev)
                if (adev->rev_id == 0) {
                        WREG32_FIELD15_PREREG(GC, dev_inst, TCP_UTCL1_CNTL1,
                                              REDUCE_FIFO_DEPTH_BY_2, 2);
+               } else {
+                       WREG32_FIELD15_PREREG(GC, dev_inst, TCP_UTCL1_CNTL2,
+                                               SPARE, 0x1);
                }
        }
 }