drm/amdgpu: Add DCC GFX12 flag to enable address alignment

We require this flag AMDGPU_GEM_CREATE_GFX12_DCC or any other
kernel level GFX12 DCC flag to differentiate the DCC buffers and other
pinned display buffers(which has TTM_PL_FLAG_CONTIGUOUS enabled).

If we use the TTM_PL_FLAG_CONTIGUOUS flag for DCC buffers, we may over
allocate for all the pinned display buffers unnecessarily that leads to
memory allocation failure.

Signed-off-by: Arunpravin Paneer Selvam <Arunpravin.PaneerSelvam@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
(cherry picked from commit 46142cc1b9272d664e0258e105b537735bfeeccc)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c
index b2c94f12da9e792e72d4bcdeeee86236e4ff47be..7d26a962f811cf0bb2b2fe2ff28a5a56f0dccd81 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c
@@ -512,7 +512,8 @@ static int amdgpu_vram_mgr_new(struct ttm_resource_manager *man,
                /* Allocate blocks in desired range */
                vres->flags |= DRM_BUDDY_RANGE_ALLOCATION;
 
-       if (adev->gmc.gmc_funcs->get_dcc_alignment)
+       if (bo->flags & AMDGPU_GEM_CREATE_GFX12_DCC &&
+           adev->gmc.gmc_funcs->get_dcc_alignment)
                adjust_dcc_size = amdgpu_gmc_get_dcc_alignment(adev);
 
        remaining_size = (u64)vres->base.size;