tty: serial: samsung: Fix serial rx on Apple A7-A9

Apple's older A7-A9 SoCs seems to use bit 3 in UTRSTAT as RXTO, which is
enabled by bit 11 in UCON.

Access these bits in addition to the original RXTO and RXTO enable bits,
to allow serial rx to function on A7-A9 SoCs. This change does not
appear to affect the A10 SoC and up.

Tested-by: Janne Grunau <j@jannau.net>
Reviewed-by: Neal Gompa <neal@gompa.dev>
Signed-off-by: Nick Chan <towinchenmi@gmail.com>
Reviewed-by: Andi Shyti <andi.shyti@kernel.org>
Link: https://lore.kernel.org/r/20240911050741.14477-4-towinchenmi@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/tty/serial/samsung_tty.c b/drivers/tty/serial/samsung_tty.c
index 3fdec06322acdb00dcb717371c1c2fcda03214dc..0d184ee2f9cec0156dd3ef11e489118711c9f37a 100644 (file)
--- a/drivers/tty/serial/samsung_tty.c
+++ b/drivers/tty/serial/samsung_tty.c
@@ -550,6 +550,7 @@ static void s3c24xx_serial_stop_rx(struct uart_port *port)
                case TYPE_APPLE_S5L:
                        s3c24xx_clear_bit(port, APPLE_S5L_UCON_RXTHRESH_ENA, S3C2410_UCON);
                        s3c24xx_clear_bit(port, APPLE_S5L_UCON_RXTO_ENA, S3C2410_UCON);
+                       s3c24xx_clear_bit(port, APPLE_S5L_UCON_RXTO_LEGACY_ENA, S3C2410_UCON);
                        break;
                default:
                        disable_irq_nosync(ourport->rx_irq);
@@ -963,9 +964,11 @@ static irqreturn_t apple_serial_handle_irq(int irq, void *id)
        u32 pend = rd_regl(port, S3C2410_UTRSTAT);
        irqreturn_t ret = IRQ_NONE;
 
-       if (pend & (APPLE_S5L_UTRSTAT_RXTHRESH | APPLE_S5L_UTRSTAT_RXTO)) {
+       if (pend & (APPLE_S5L_UTRSTAT_RXTHRESH | APPLE_S5L_UTRSTAT_RXTO |
+               APPLE_S5L_UTRSTAT_RXTO_LEGACY)) {
                wr_regl(port, S3C2410_UTRSTAT,
-                       APPLE_S5L_UTRSTAT_RXTHRESH | APPLE_S5L_UTRSTAT_RXTO);
+                       APPLE_S5L_UTRSTAT_RXTHRESH | APPLE_S5L_UTRSTAT_RXTO |
+                       APPLE_S5L_UTRSTAT_RXTO_LEGACY);
                ret = s3c24xx_serial_rx_irq(ourport);
        }
        if (pend & APPLE_S5L_UTRSTAT_TXTHRESH) {
@@ -1190,7 +1193,8 @@ static void apple_s5l_serial_shutdown(struct uart_port *port)
        ucon = rd_regl(port, S3C2410_UCON);
        ucon &= ~(APPLE_S5L_UCON_TXTHRESH_ENA_MSK |
                  APPLE_S5L_UCON_RXTHRESH_ENA_MSK |
-                 APPLE_S5L_UCON_RXTO_ENA_MSK);
+                 APPLE_S5L_UCON_RXTO_ENA_MSK |
+                 APPLE_S5L_UCON_RXTO_LEGACY_ENA_MSK);
        wr_regl(port, S3C2410_UCON, ucon);
 
        wr_regl(port, S3C2410_UTRSTAT, APPLE_S5L_UTRSTAT_ALL_FLAGS);
@@ -1287,6 +1291,7 @@ static int apple_s5l_serial_startup(struct uart_port *port)
        /* Enable Rx Interrupt */
        s3c24xx_set_bit(port, APPLE_S5L_UCON_RXTHRESH_ENA, S3C2410_UCON);
        s3c24xx_set_bit(port, APPLE_S5L_UCON_RXTO_ENA, S3C2410_UCON);
+       s3c24xx_set_bit(port, APPLE_S5L_UCON_RXTO_LEGACY_ENA, S3C2410_UCON);
 
        return ret;
 }
@@ -2143,13 +2148,15 @@ static int s3c24xx_serial_resume_noirq(struct device *dev)
 
                        ucon &= ~(APPLE_S5L_UCON_TXTHRESH_ENA_MSK |
                                  APPLE_S5L_UCON_RXTHRESH_ENA_MSK |
-                                 APPLE_S5L_UCON_RXTO_ENA_MSK);
+                                 APPLE_S5L_UCON_RXTO_ENA_MSK |
+                                 APPLE_S5L_UCON_RXTO_LEGACY_ENA_MSK);
 
                        if (ourport->tx_enabled)
                                ucon |= APPLE_S5L_UCON_TXTHRESH_ENA_MSK;
                        if (ourport->rx_enabled)
                                ucon |= APPLE_S5L_UCON_RXTHRESH_ENA_MSK |
-                                       APPLE_S5L_UCON_RXTO_ENA_MSK;
+                                       APPLE_S5L_UCON_RXTO_ENA_MSK |
+                                       APPLE_S5L_UCON_RXTO_LEGACY_ENA_MSK;
 
                        wr_regl(port, S3C2410_UCON, ucon);
 

diff --git a/include/linux/serial_s3c.h b/include/linux/serial_s3c.h
index 2a934e20ca4b7583690da7116a6ee95c2e2b74f1..102aa33d956c47d4cdea28ceec07902facf9e0e6 100644 (file)
--- a/include/linux/serial_s3c.h
+++ b/include/linux/serial_s3c.h
@@ -246,24 +246,28 @@
                                 S5PV210_UFCON_TXTRIG4 |        \
                                 S5PV210_UFCON_RXTRIG4)
 
-#define APPLE_S5L_UCON_RXTO_ENA                9
-#define APPLE_S5L_UCON_RXTHRESH_ENA    12
-#define APPLE_S5L_UCON_TXTHRESH_ENA    13
-#define APPLE_S5L_UCON_RXTO_ENA_MSK    BIT(APPLE_S5L_UCON_RXTO_ENA)
-#define APPLE_S5L_UCON_RXTHRESH_ENA_MSK        BIT(APPLE_S5L_UCON_RXTHRESH_ENA)
-#define APPLE_S5L_UCON_TXTHRESH_ENA_MSK        BIT(APPLE_S5L_UCON_TXTHRESH_ENA)
+#define APPLE_S5L_UCON_RXTO_ENA                        9
+#define APPLE_S5L_UCON_RXTO_LEGACY_ENA         11
+#define APPLE_S5L_UCON_RXTHRESH_ENA            12
+#define APPLE_S5L_UCON_TXTHRESH_ENA            13
+#define APPLE_S5L_UCON_RXTO_ENA_MSK            BIT(APPLE_S5L_UCON_RXTO_ENA)
+#define APPLE_S5L_UCON_RXTO_LEGACY_ENA_MSK     BIT(APPLE_S5L_UCON_RXTO_LEGACY_ENA)
+#define APPLE_S5L_UCON_RXTHRESH_ENA_MSK                BIT(APPLE_S5L_UCON_RXTHRESH_ENA)
+#define APPLE_S5L_UCON_TXTHRESH_ENA_MSK                BIT(APPLE_S5L_UCON_TXTHRESH_ENA)
 
 #define APPLE_S5L_UCON_DEFAULT         (S3C2410_UCON_TXIRQMODE | \
                                         S3C2410_UCON_RXIRQMODE | \
                                         S3C2410_UCON_RXFIFO_TOI)
 #define APPLE_S5L_UCON_MASK            (APPLE_S5L_UCON_RXTO_ENA_MSK | \
+                                        APPLE_S5L_UCON_RXTO_LEGACY_ENA_MSK | \
                                         APPLE_S5L_UCON_RXTHRESH_ENA_MSK | \
                                         APPLE_S5L_UCON_TXTHRESH_ENA_MSK)
 
+#define APPLE_S5L_UTRSTAT_RXTO_LEGACY  BIT(3)
 #define APPLE_S5L_UTRSTAT_RXTHRESH     BIT(4)
 #define APPLE_S5L_UTRSTAT_TXTHRESH     BIT(5)
 #define APPLE_S5L_UTRSTAT_RXTO         BIT(9)
-#define APPLE_S5L_UTRSTAT_ALL_FLAGS    GENMASK(9, 4)
+#define APPLE_S5L_UTRSTAT_ALL_FLAGS    GENMASK(9, 3)
 
 #ifndef __ASSEMBLY__