]> git.dujemihanovic.xyz Git - linux.git/commitdiff
drm/amd/display: Add dmub hpd sense callback
authorRoman Li <Roman.Li@amd.com>
Wed, 21 Aug 2024 14:53:15 +0000 (10:53 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 18 Sep 2024 20:15:07 +0000 (16:15 -0400)
[WHY]
HPD sense notification has been implemented in DMUB, which
can occur during low power states and need to be
notified from firmware to driver.

[HOW]
Define callback and register new HPD sense notification.

Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Roman Li <Roman.Li@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h

index 0cff66735cfebea16bae0d9b27aefd7ca5923047..4ab329e0071476b2741ad56c75833993de1adaef 100644 (file)
@@ -807,6 +807,20 @@ static void dmub_hpd_callback(struct amdgpu_device *adev,
        }
 }
 
+/**
+ * dmub_hpd_sense_callback - DMUB HPD sense processing callback.
+ * @adev: amdgpu_device pointer
+ * @notify: dmub notification structure
+ *
+ * HPD sense changes can occur during low power states and need to be
+ * notified from firmware to driver.
+ */
+static void dmub_hpd_sense_callback(struct amdgpu_device *adev,
+                             struct dmub_notification *notify)
+{
+       DRM_DEBUG_DRIVER("DMUB HPD SENSE callback.\n");
+}
+
 /**
  * register_dmub_notify_callback - Sets callback for DMUB notify
  * @adev: amdgpu_device pointer
@@ -3808,6 +3822,12 @@ static int register_hpd_handlers(struct amdgpu_device *adev)
                        DRM_ERROR("amdgpu: fail to register dmub hpd callback");
                        return -EINVAL;
                }
+
+               if (!register_dmub_notify_callback(adev, DMUB_NOTIFICATION_HPD_SENSE_NOTIFY,
+                       dmub_hpd_sense_callback, true)) {
+                       DRM_ERROR("amdgpu: fail to register dmub hpd sense callback");
+                       return -EINVAL;
+               }
        }
 
        list_for_each_entry(connector,
index 2d7755e2b6c320460405bb10b08bffc9e3c6907b..15d4690c74d60b1453db4d5ddc28de07bd3b0c89 100644 (file)
@@ -50,7 +50,7 @@
 
 #define AMDGPU_DM_MAX_NUM_EDP 2
 
-#define AMDGPU_DMUB_NOTIFICATION_MAX 6
+#define AMDGPU_DMUB_NOTIFICATION_MAX 7
 
 #define HDMI_AMD_VENDOR_SPECIFIC_DATA_BLOCK_IEEE_REGISTRATION_ID 0x00001A
 #define AMD_VSDB_VERSION_3_FEATURECAP_REPLAYMODE 0x40