]> git.dujemihanovic.xyz Git - linux.git/commitdiff
drm/amdgpu: explicitely set the AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS flag
authorChristian König <christian.koenig@amd.com>
Wed, 5 Jun 2024 14:26:22 +0000 (16:26 +0200)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 18 Sep 2024 20:15:09 +0000 (16:15 -0400)
Instead of having that in the amdgpu_bo_pin() function applied for all
pinned BOs.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c
drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_wb.c

index 046d4c4e02990da707ba4ddcc692ddbdeb3cba6c..b119d27271c1a24e9f482a4a26b8470a8f2616ee 100644 (file)
@@ -233,6 +233,7 @@ int amdgpu_display_crtc_page_flip_target(struct drm_crtc *crtc,
        }
 
        if (!adev->enable_virtual_display) {
+               new_abo->flags |= AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS;
                r = amdgpu_bo_pin(new_abo,
                                  amdgpu_display_supported_domains(adev, new_abo->flags));
                if (unlikely(r != 0)) {
@@ -1759,6 +1760,7 @@ int amdgpu_display_resume_helper(struct amdgpu_device *adev)
 
                        r = amdgpu_bo_reserve(aobj, true);
                        if (r == 0) {
+                               aobj->flags |= AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS;
                                r = amdgpu_bo_pin(aobj, AMDGPU_GEM_DOMAIN_VRAM);
                                if (r != 0)
                                        dev_err(adev->dev, "Failed to pin cursor BO (%d)\n", r);
index a987f671b1d5350527983e9e3936aee88d0f5c13..d62df3b5a0149277b7a49be789f55e576d29507a 100644 (file)
@@ -942,7 +942,6 @@ error:
  */
 int amdgpu_bo_pin(struct amdgpu_bo *bo, u32 domain)
 {
-       bo->flags |= AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS;
        return amdgpu_bo_pin_restricted(bo, domain, 0, 0);
 }
 
index e5f508d34ed83e676fe2317044c581495ed8c7c5..d4c2afafbb73cc1f237cc175a80702136049b09a 100644 (file)
@@ -338,6 +338,7 @@ static int amdgpu_vkms_prepare_fb(struct drm_plane *plane,
        else
                domain = AMDGPU_GEM_DOMAIN_VRAM;
 
+       rbo->flags |= AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS;
        r = amdgpu_bo_pin(rbo, domain);
        if (unlikely(r != 0)) {
                if (r != -ERESTARTSYS)
index 742adbc460c9db1502a8d9294f340ecc3ff22527..70c1399f738defc91de1cb4ffb2b92dd4b134817 100644 (file)
@@ -1881,6 +1881,7 @@ static int dce_v10_0_crtc_do_set_base(struct drm_crtc *crtc,
                return r;
 
        if (!atomic) {
+               abo->flags |= AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS;
                r = amdgpu_bo_pin(abo, AMDGPU_GEM_DOMAIN_VRAM);
                if (unlikely(r != 0)) {
                        amdgpu_bo_unreserve(abo);
@@ -2401,6 +2402,7 @@ static int dce_v10_0_crtc_cursor_set2(struct drm_crtc *crtc,
                return ret;
        }
 
+       aobj->flags |= AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS;
        ret = amdgpu_bo_pin(aobj, AMDGPU_GEM_DOMAIN_VRAM);
        amdgpu_bo_unreserve(aobj);
        if (ret) {
index 8d46ebadfa4663ed940534a99766dcd53a665c1a..f154c24499c8a42b8230623c693cd34812571e66 100644 (file)
@@ -1931,6 +1931,7 @@ static int dce_v11_0_crtc_do_set_base(struct drm_crtc *crtc,
                return r;
 
        if (!atomic) {
+               abo->flags |= AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS;
                r = amdgpu_bo_pin(abo, AMDGPU_GEM_DOMAIN_VRAM);
                if (unlikely(r != 0)) {
                        amdgpu_bo_unreserve(abo);
@@ -2485,6 +2486,7 @@ static int dce_v11_0_crtc_cursor_set2(struct drm_crtc *crtc,
                return ret;
        }
 
+       aobj->flags |= AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS;
        ret = amdgpu_bo_pin(aobj, AMDGPU_GEM_DOMAIN_VRAM);
        amdgpu_bo_unreserve(aobj);
        if (ret) {
index f08dc6a3886f19c99b3941ff8eb95ffb28c18673..a7fcb135827f8bf02d2d3f25a4375e5ef3a66f97 100644 (file)
@@ -1861,6 +1861,7 @@ static int dce_v6_0_crtc_do_set_base(struct drm_crtc *crtc,
                return r;
 
        if (!atomic) {
+               abo->flags |= AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS;
                r = amdgpu_bo_pin(abo, AMDGPU_GEM_DOMAIN_VRAM);
                if (unlikely(r != 0)) {
                        amdgpu_bo_unreserve(abo);
@@ -2321,6 +2322,7 @@ static int dce_v6_0_crtc_cursor_set2(struct drm_crtc *crtc,
                return ret;
        }
 
+       aobj->flags |= AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS;
        ret = amdgpu_bo_pin(aobj, AMDGPU_GEM_DOMAIN_VRAM);
        amdgpu_bo_unreserve(aobj);
        if (ret) {
index a6a3adf2ae134f560c46bae56f1be897bea50192..77ac3f114d241117fb9cf2f070e8d316b2691c97 100644 (file)
@@ -1828,6 +1828,7 @@ static int dce_v8_0_crtc_do_set_base(struct drm_crtc *crtc,
                return r;
 
        if (!atomic) {
+               abo->flags |= AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS;
                r = amdgpu_bo_pin(abo, AMDGPU_GEM_DOMAIN_VRAM);
                if (unlikely(r != 0)) {
                        amdgpu_bo_unreserve(abo);
@@ -2320,6 +2321,7 @@ static int dce_v8_0_crtc_cursor_set2(struct drm_crtc *crtc,
                return ret;
        }
 
+       aobj->flags |= AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS;
        ret = amdgpu_bo_pin(aobj, AMDGPU_GEM_DOMAIN_VRAM);
        amdgpu_bo_unreserve(aobj);
        if (ret) {
index 25f63b2e7a8e20dfa7ede3344e08c095ead41ab5..495e3cd70426db0182cb2811bc6d5d09f52f8a4b 100644 (file)
@@ -961,6 +961,7 @@ static int amdgpu_dm_plane_helper_prepare_fb(struct drm_plane *plane,
        else
                domain = AMDGPU_GEM_DOMAIN_VRAM;
 
+       rbo->flags |= AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS;
        r = amdgpu_bo_pin(rbo, domain);
        if (unlikely(r != 0)) {
                if (r != -ERESTARTSYS)
index 08c494a7a21bad10929eb3f367a465349bc9ae5c..0d5fefb0f5917cfdca20bec6a4a5d4418eba3ae6 100644 (file)
@@ -114,6 +114,7 @@ static int amdgpu_dm_wb_prepare_job(struct drm_writeback_connector *wb_connector
 
        domain = amdgpu_display_supported_domains(adev, rbo->flags);
 
+       rbo->flags |= AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS;
        r = amdgpu_bo_pin(rbo, domain);
        if (unlikely(r != 0)) {
                if (r != -ERESTARTSYS)