]> git.dujemihanovic.xyz Git - linux.git/commitdiff
Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm
authorLinus Torvalds <torvalds@linux-foundation.org>
Fri, 12 Jul 2019 22:35:14 +0000 (15:35 -0700)
committerLinus Torvalds <torvalds@linux-foundation.org>
Fri, 12 Jul 2019 22:35:14 +0000 (15:35 -0700)
Pull KVM updates from Paolo Bonzini:
 "ARM:
   - support for chained PMU counters in guests
   - improved SError handling
   - handle Neoverse N1 erratum #1349291
   - allow side-channel mitigation status to be migrated
   - standardise most AArch64 system register accesses to msr_s/mrs_s
   - fix host MPIDR corruption on 32bit
   - selftests ckleanups

  x86:
   - PMU event {white,black}listing
   - ability for the guest to disable host-side interrupt polling
   - fixes for enlightened VMCS (Hyper-V pv nested virtualization),
   - new hypercall to yield to IPI target
   - support for passing cstate MSRs through to the guest
   - lots of cleanups and optimizations

  Generic:
   - Some txt->rST conversions for the documentation"

* tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm: (128 commits)
  Documentation: virtual: Add toctree hooks
  Documentation: kvm: Convert cpuid.txt to .rst
  Documentation: virtual: Convert paravirt_ops.txt to .rst
  KVM: x86: Unconditionally enable irqs in guest context
  KVM: x86: PMU Event Filter
  kvm: x86: Fix -Wmissing-prototypes warnings
  KVM: Properly check if "page" is valid in kvm_vcpu_unmap
  KVM: arm/arm64: Initialise host's MPIDRs by reading the actual register
  KVM: LAPIC: Retry tune per-vCPU timer_advance_ns if adaptive tuning goes insane
  kvm: LAPIC: write down valid APIC registers
  KVM: arm64: Migrate _elx sysreg accessors to msr_s/mrs_s
  KVM: doc: Add API documentation on the KVM_REG_ARM_WORKAROUNDS register
  KVM: arm/arm64: Add save/restore support for firmware workaround state
  arm64: KVM: Propagate full Spectre v2 workaround state to KVM guests
  KVM: arm/arm64: Support chained PMU counters
  KVM: arm/arm64: Remove pmc->bitmask
  KVM: arm/arm64: Re-create event when setting counter value
  KVM: arm/arm64: Extract duplicated code to own function
  KVM: arm/arm64: Rename kvm_pmu_{enable/disable}_counter functions
  KVM: LAPIC: ARBPRI is a reserved register for x2APIC
  ...

15 files changed:
1  2 
Documentation/arm64/silicon-errata.rst
Documentation/virtual/kvm/api.txt
arch/arm64/include/asm/cpufeature.h
arch/arm64/include/asm/kvm_host.h
arch/arm64/include/asm/sysreg.h
arch/arm64/kernel/traps.c
arch/arm64/kvm/hyp/switch.c
arch/s390/include/asm/kvm_host.h
arch/s390/kvm/kvm-s390.c
arch/x86/kvm/lapic.c
arch/x86/kvm/mmu.c
arch/x86/kvm/pmu.c
arch/x86/kvm/vmx/nested.c
arch/x86/kvm/x86.c
tools/testing/selftests/kvm/x86_64/evmcs_test.c

index c792774be59e625a204065ad761538ef326fa4e5,51d506a1f8dc0a18b3799ff395734d68a7b82e31..3e57d09246e668c14fb44c6b949494df273b29ae
@@@ -46,86 -42,48 +46,88 @@@ file acts as a registry of software wor
  will be updated when new workarounds are committed and backported to
  stable kernels.
  
 -| Implementor    | Component       | Erratum ID      | Kconfig                     |
  +----------------+-----------------+-----------------+-----------------------------+
 +| Implementor    | Component       | Erratum ID      | Kconfig                     |
 ++================+=================+=================+=============================+
  | Allwinner      | A64/R18         | UNKNOWN1        | SUN50I_ERRATUM_UNKNOWN1     |
 -|                |                 |                 |                             |
 ++----------------+-----------------+-----------------+-----------------------------+
 ++----------------+-----------------+-----------------+-----------------------------+
  | ARM            | Cortex-A53      | #826319         | ARM64_ERRATUM_826319        |
 ++----------------+-----------------+-----------------+-----------------------------+
  | ARM            | Cortex-A53      | #827319         | ARM64_ERRATUM_827319        |
 ++----------------+-----------------+-----------------+-----------------------------+
  | ARM            | Cortex-A53      | #824069         | ARM64_ERRATUM_824069        |
 ++----------------+-----------------+-----------------+-----------------------------+
  | ARM            | Cortex-A53      | #819472         | ARM64_ERRATUM_819472        |
 ++----------------+-----------------+-----------------+-----------------------------+
  | ARM            | Cortex-A53      | #845719         | ARM64_ERRATUM_845719        |
 ++----------------+-----------------+-----------------+-----------------------------+
  | ARM            | Cortex-A53      | #843419         | ARM64_ERRATUM_843419        |
 ++----------------+-----------------+-----------------+-----------------------------+
  | ARM            | Cortex-A57      | #832075         | ARM64_ERRATUM_832075        |
 ++----------------+-----------------+-----------------+-----------------------------+
  | ARM            | Cortex-A57      | #852523         | N/A                         |
 ++----------------+-----------------+-----------------+-----------------------------+
  | ARM            | Cortex-A57      | #834220         | ARM64_ERRATUM_834220        |
 ++----------------+-----------------+-----------------+-----------------------------+
  | ARM            | Cortex-A72      | #853709         | N/A                         |
 ++----------------+-----------------+-----------------+-----------------------------+
  | ARM            | Cortex-A73      | #858921         | ARM64_ERRATUM_858921        |
 ++----------------+-----------------+-----------------+-----------------------------+
  | ARM            | Cortex-A55      | #1024718        | ARM64_ERRATUM_1024718       |
 ++----------------+-----------------+-----------------+-----------------------------+
  | ARM            | Cortex-A76      | #1188873,1418040| ARM64_ERRATUM_1418040       |
 ++----------------+-----------------+-----------------+-----------------------------+
  | ARM            | Cortex-A76      | #1165522        | ARM64_ERRATUM_1165522       |
 ++----------------+-----------------+-----------------+-----------------------------+
  | ARM            | Cortex-A76      | #1286807        | ARM64_ERRATUM_1286807       |
 ++----------------+-----------------+-----------------+-----------------------------+
  | ARM            | Cortex-A76      | #1463225        | ARM64_ERRATUM_1463225       |
 ++----------------+-----------------+-----------------+-----------------------------+
  | ARM            | Neoverse-N1     | #1188873,1418040| ARM64_ERRATUM_1418040       |
 ++----------------+-----------------+-----------------+-----------------------------+
+ | ARM            | Neoverse-N1     | #1349291        | N/A                         |
+++----------------+-----------------+-----------------+-----------------------------+
  | ARM            | MMU-500         | #841119,826419  | N/A                         |
 -|                |                 |                 |                             |
 ++----------------+-----------------+-----------------+-----------------------------+
 ++----------------+-----------------+-----------------+-----------------------------+
  | Cavium         | ThunderX ITS    | #22375,24313    | CAVIUM_ERRATUM_22375        |
 ++----------------+-----------------+-----------------+-----------------------------+
  | Cavium         | ThunderX ITS    | #23144          | CAVIUM_ERRATUM_23144        |
 ++----------------+-----------------+-----------------+-----------------------------+
  | Cavium         | ThunderX GICv3  | #23154          | CAVIUM_ERRATUM_23154        |
 ++----------------+-----------------+-----------------+-----------------------------+
  | Cavium         | ThunderX Core   | #27456          | CAVIUM_ERRATUM_27456        |
 ++----------------+-----------------+-----------------+-----------------------------+
  | Cavium         | ThunderX Core   | #30115          | CAVIUM_ERRATUM_30115        |
 ++----------------+-----------------+-----------------+-----------------------------+
  | Cavium         | ThunderX SMMUv2 | #27704          | N/A                         |
 ++----------------+-----------------+-----------------+-----------------------------+
  | Cavium         | ThunderX2 SMMUv3| #74             | N/A                         |
 ++----------------+-----------------+-----------------+-----------------------------+
  | Cavium         | ThunderX2 SMMUv3| #126            | N/A                         |
 -|                |                 |                 |                             |
 ++----------------+-----------------+-----------------+-----------------------------+
 ++----------------+-----------------+-----------------+-----------------------------+
  | Freescale/NXP  | LS2080A/LS1043A | A-008585        | FSL_ERRATUM_A008585         |
 -|                |                 |                 |                             |
 ++----------------+-----------------+-----------------+-----------------------------+
 ++----------------+-----------------+-----------------+-----------------------------+
  | Hisilicon      | Hip0{5,6,7}     | #161010101      | HISILICON_ERRATUM_161010101 |
 ++----------------+-----------------+-----------------+-----------------------------+
  | Hisilicon      | Hip0{6,7}       | #161010701      | N/A                         |
 ++----------------+-----------------+-----------------+-----------------------------+
  | Hisilicon      | Hip07           | #161600802      | HISILICON_ERRATUM_161600802 |
 ++----------------+-----------------+-----------------+-----------------------------+
  | Hisilicon      | Hip08 SMMU PMCG | #162001800      | N/A                         |
 -|                |                 |                 |                             |
 ++----------------+-----------------+-----------------+-----------------------------+
 ++----------------+-----------------+-----------------+-----------------------------+
  | Qualcomm Tech. | Kryo/Falkor v1  | E1003           | QCOM_FALKOR_ERRATUM_1003    |
 ++----------------+-----------------+-----------------+-----------------------------+
  | Qualcomm Tech. | Falkor v1       | E1009           | QCOM_FALKOR_ERRATUM_1009    |
 ++----------------+-----------------+-----------------+-----------------------------+
  | Qualcomm Tech. | QDF2400 ITS     | E0065           | QCOM_QDF2400_ERRATUM_0065   |
 ++----------------+-----------------+-----------------+-----------------------------+
  | Qualcomm Tech. | Falkor v{1,2}   | E1041           | QCOM_FALKOR_ERRATUM_1041    |
 ++----------------+-----------------+-----------------+-----------------------------+
 ++----------------+-----------------+-----------------+-----------------------------+
  | Fujitsu        | A64FX           | E#010001        | FUJITSU_ERRATUM_010001      |
 ++----------------+-----------------+-----------------+-----------------------------+
Simple merge
index 3d8db50d9ae2f8ccff4db5722593e2f0a4a1d21d,948427f6b3d9b93518f6c0b270852a2ea7cd5631..407e2bf23676c970fbf37d4e264b39cb8f58cad5
@@@ -614,12 -614,12 +614,18 @@@ static inline bool system_uses_irq_prio
               cpus_have_const_cap(ARM64_HAS_IRQ_PRIO_MASKING);
  }
  
 +static inline bool system_has_prio_mask_debugging(void)
 +{
 +      return IS_ENABLED(CONFIG_ARM64_DEBUG_PRIORITY_MASKING) &&
 +             system_uses_irq_prio_masking();
 +}
 +
+ #define ARM64_BP_HARDEN_UNKNOWN               -1
+ #define ARM64_BP_HARDEN_WA_NEEDED     0
+ #define ARM64_BP_HARDEN_NOT_REQUIRED  1
+ int get_spectre_v2_workaround_state(void);
  #define ARM64_SSBD_UNKNOWN            -1
  #define ARM64_SSBD_FORCE_DISABLE      0
  #define ARM64_SSBD_KERNEL             1
Simple merge
Simple merge
Simple merge
Simple merge
Simple merge
Simple merge
Simple merge
Simple merge
Simple merge
Simple merge
Simple merge
index 241919ef1eaca2c0d053b96a83dcf068480d5e22,dbf82658f2ef2ffc43204501adad0d3750d14201..f95c08343b487d4a4ec2698d18b08d191a612675
@@@ -144,9 -144,8 +144,9 @@@ int main(int argc, char *argv[]
  
                /* Restore state in a new VM.  */
                kvm_vm_restart(vm, O_RDWR);
-               vm_vcpu_add(vm, VCPU_ID, 0, 0);
+               vm_vcpu_add(vm, VCPU_ID);
                vcpu_set_cpuid(vm, VCPU_ID, kvm_get_supported_cpuid());
 +              vcpu_ioctl(vm, VCPU_ID, KVM_ENABLE_CAP, &enable_evmcs_cap);
                vcpu_load_state(vm, VCPU_ID, state);
                run = vcpu_state(vm, VCPU_ID);
                free(state);