drm/i915/gem: Calculate object page offset for partial memory mapping

To enable partial memory mapping of GPU virtual memory, it's
necessary to introduce an offset to the object's memory
(obj->mm.pages) scatterlist. This adjustment compensates for
instances when userspace mappings do not start from the beginning
of the object.

Based on a patch by Chris Wilson.

Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com>
Cc: Chris Wilson <chris.p.wilson@linux.intel.com>
Cc: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Nirmoy Das <nirmoy.das@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240807100521.478266-3-andi.shyti@linux.intel.com

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.c b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
index 99fde0a05632597ddb85c43437c4127a763d8252..21274aa9bdddc161dda495887f1eb1bac01dbafd 100644 (file)
--- a/drivers/gpu/drm/i915/gem/i915_gem_mman.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
@@ -252,6 +252,7 @@ static vm_fault_t vm_fault_cpu(struct vm_fault *vmf)
        struct vm_area_struct *area = vmf->vma;
        struct i915_mmap_offset *mmo = area->vm_private_data;
        struct drm_i915_gem_object *obj = mmo->obj;
+       unsigned long obj_offset;
        resource_size_t iomap;
        int err;
 
@@ -273,10 +274,11 @@ static vm_fault_t vm_fault_cpu(struct vm_fault *vmf)
                iomap -= obj->mm.region->region.start;
        }
 
+       obj_offset = area->vm_pgoff - drm_vma_node_start(&mmo->vma_node);
        /* PTEs are revoked in obj->ops->put_pages() */
        err = remap_io_sg(area,
                          area->vm_start, area->vm_end - area->vm_start,
-                         obj->mm.pages->sgl, iomap);
+                         obj->mm.pages->sgl, obj_offset, iomap);
 
        if (area->vm_flags & VM_WRITE) {
                GEM_BUG_ON(!i915_gem_object_has_pinned_pages(obj));

diff --git a/drivers/gpu/drm/i915/i915_mm.c b/drivers/gpu/drm/i915/i915_mm.c
index 7998bc74ab49d49c5327b737286f359a9275b46c..f5c97a620962b6f9d9ba9947caad524849f739eb 100644 (file)
--- a/drivers/gpu/drm/i915/i915_mm.c
+++ b/drivers/gpu/drm/i915/i915_mm.c
@@ -122,13 +122,15 @@ int remap_io_mapping(struct vm_area_struct *vma,
  * @addr: target user address to start at
  * @size: size of map area
  * @sgl: Start sg entry
+ * @offset: offset from the start of the page
  * @iobase: Use stored dma address offset by this address or pfn if -1
  *
  *  Note: this is only safe if the mm semaphore is held when called.
  */
 int remap_io_sg(struct vm_area_struct *vma,
                unsigned long addr, unsigned long size,
-               struct scatterlist *sgl, resource_size_t iobase)
+               struct scatterlist *sgl, unsigned long offset,
+               resource_size_t iobase)
 {
        struct remap_pfn r = {
                .mm = vma->vm_mm,
@@ -141,6 +143,14 @@ int remap_io_sg(struct vm_area_struct *vma,
        /* We rely on prevalidation of the io-mapping to skip track_pfn(). */
        GEM_BUG_ON((vma->vm_flags & EXPECTED_FLAGS) != EXPECTED_FLAGS);
 
+       while (offset >= sg_dma_len(r.sgt.sgp) >> PAGE_SHIFT) {
+               offset -= sg_dma_len(r.sgt.sgp) >> PAGE_SHIFT;
+               r.sgt = __sgt_iter(__sg_next(r.sgt.sgp), use_dma(iobase));
+               if (!r.sgt.sgp)
+                       return -EINVAL;
+       }
+       r.sgt.curr = offset << PAGE_SHIFT;
+
        if (!use_dma(iobase))
                flush_cache_range(vma, addr, size);
 

diff --git a/drivers/gpu/drm/i915/i915_mm.h b/drivers/gpu/drm/i915/i915_mm.h
index 04c8974d822bd19f5324cc300065c786fb3ef8af..69f9351b1a1cd43a8dfcdec0e7181c3eaac86d08 100644 (file)
--- a/drivers/gpu/drm/i915/i915_mm.h
+++ b/drivers/gpu/drm/i915/i915_mm.h
@@ -30,6 +30,7 @@ int remap_io_mapping(struct vm_area_struct *vma,
 
 int remap_io_sg(struct vm_area_struct *vma,
                unsigned long addr, unsigned long size,
-               struct scatterlist *sgl, resource_size_t iobase);
+               struct scatterlist *sgl, unsigned long offset,
+               resource_size_t iobase);
 
 #endif /* __I915_MM_H__ */