drm/etnaviv: Expose a few more chipspecs to userspace

These ones will be needed to make use fo the NN and TP units in the NPUs
based on Vivante IP.

Also fix the number of NN cores in the VIPNano-qi.

Signed-off-by: Tomeu Vizoso <tomeu@tomeuvizoso.net>
Acked-by: Christian Gmeiner <cgmeiner@igalia.com>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>

diff --git a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c b/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
index 1dcfa23db3be441b414a9650ecb8d6c74bfc0096..18725ff5c79bbce1ce79c44bd093fef0dd004111 100644 (file)
--- a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
+++ b/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
@@ -164,6 +164,26 @@ int etnaviv_gpu_get_param(struct etnaviv_gpu *gpu, u32 param, u64 *value)
                *value = gpu->identity.eco_id;
                break;
 
+       case ETNAVIV_PARAM_GPU_NN_CORE_COUNT:
+               *value = gpu->identity.nn_core_count;
+               break;
+
+       case ETNAVIV_PARAM_GPU_NN_MAD_PER_CORE:
+               *value = gpu->identity.nn_mad_per_core;
+               break;
+
+       case ETNAVIV_PARAM_GPU_TP_CORE_COUNT:
+               *value = gpu->identity.tp_core_count;
+               break;
+
+       case ETNAVIV_PARAM_GPU_ON_CHIP_SRAM_SIZE:
+               *value = gpu->identity.on_chip_sram_size;
+               break;
+
+       case ETNAVIV_PARAM_GPU_AXI_SRAM_SIZE:
+               *value = gpu->identity.axi_sram_size;
+               break;
+
        default:
                DBG("%s: invalid param: %u", dev_name(gpu->dev), param);
                return -EINVAL;

diff --git a/drivers/gpu/drm/etnaviv/etnaviv_gpu.h b/drivers/gpu/drm/etnaviv/etnaviv_gpu.h
index 197e0037732ec84998aba60b1769a2fc305ea1bf..7d5e9158e13c1aca6df49f254b00dd72d3a27a9e 100644 (file)
--- a/drivers/gpu/drm/etnaviv/etnaviv_gpu.h
+++ b/drivers/gpu/drm/etnaviv/etnaviv_gpu.h
@@ -54,6 +54,18 @@ struct etnaviv_chip_identity {
        /* Number of Neural Network cores. */
        u32 nn_core_count;
 
+       /* Number of MAD units per Neural Network core. */
+       u32 nn_mad_per_core;
+
+       /* Number of Tensor Processing cores. */
+       u32 tp_core_count;
+
+       /* Size in bytes of the SRAM inside the NPU. */
+       u32 on_chip_sram_size;
+
+       /* Size in bytes of the SRAM across the AXI bus. */
+       u32 axi_sram_size;
+
        /* Size of the vertex cache. */
        u32 vertex_cache_size;
 

diff --git a/drivers/gpu/drm/etnaviv/etnaviv_hwdb.c b/drivers/gpu/drm/etnaviv/etnaviv_hwdb.c
index 67201242438bed9225d5abfb76eb3bac07d56edc..9eb8ca7c5034075958b08f80dbe4fa9c5704e66a 100644 (file)
--- a/drivers/gpu/drm/etnaviv/etnaviv_hwdb.c
+++ b/drivers/gpu/drm/etnaviv/etnaviv_hwdb.c
@@ -17,6 +17,10 @@ static const struct etnaviv_chip_identity etnaviv_chip_identities[] = {
                .thread_count = 128,
                .shader_core_count = 1,
                .nn_core_count = 0,
+               .nn_mad_per_core = 0,
+               .tp_core_count = 0,
+               .on_chip_sram_size = 0,
+               .axi_sram_size = 0,
                .vertex_cache_size = 8,
                .vertex_output_buffer_size = 1024,
                .pixel_pipes = 1,
@@ -48,6 +52,11 @@ static const struct etnaviv_chip_identity etnaviv_chip_identities[] = {
                .register_max = 64,
                .thread_count = 256,
                .shader_core_count = 1,
+               .nn_core_count = 0,
+               .nn_mad_per_core = 0,
+               .tp_core_count = 0,
+               .on_chip_sram_size = 0,
+               .axi_sram_size = 0,
                .vertex_cache_size = 8,
                .vertex_output_buffer_size = 512,
                .pixel_pipes = 1,
@@ -80,6 +89,10 @@ static const struct etnaviv_chip_identity etnaviv_chip_identities[] = {
                .thread_count = 512,
                .shader_core_count = 2,
                .nn_core_count = 0,
+               .nn_mad_per_core = 0,
+               .tp_core_count = 0,
+               .on_chip_sram_size = 0,
+               .axi_sram_size = 0,
                .vertex_cache_size = 16,
                .vertex_output_buffer_size = 1024,
                .pixel_pipes = 1,
@@ -112,6 +125,10 @@ static const struct etnaviv_chip_identity etnaviv_chip_identities[] = {
                .thread_count = 512,
                .shader_core_count = 2,
                .nn_core_count = 0,
+               .nn_mad_per_core = 0,
+               .tp_core_count = 0,
+               .on_chip_sram_size = 0,
+               .axi_sram_size = 0,
                .vertex_cache_size = 16,
                .vertex_output_buffer_size = 1024,
                .pixel_pipes = 1,
@@ -143,6 +160,11 @@ static const struct etnaviv_chip_identity etnaviv_chip_identities[] = {
                .register_max = 64,
                .thread_count = 512,
                .shader_core_count = 2,
+               .nn_core_count = 0,
+               .nn_mad_per_core = 0,
+               .tp_core_count = 0,
+               .on_chip_sram_size = 0,
+               .axi_sram_size = 0,
                .vertex_cache_size = 16,
                .vertex_output_buffer_size = 1024,
                .pixel_pipes = 1,
@@ -175,6 +197,10 @@ static const struct etnaviv_chip_identity etnaviv_chip_identities[] = {
                .thread_count = 1024,
                .shader_core_count = 4,
                .nn_core_count = 0,
+               .nn_mad_per_core = 0,
+               .tp_core_count = 0,
+               .on_chip_sram_size = 0,
+               .axi_sram_size = 0,
                .vertex_cache_size = 16,
                .vertex_output_buffer_size = 1024,
                .pixel_pipes = 2,
@@ -207,6 +233,10 @@ static const struct etnaviv_chip_identity etnaviv_chip_identities[] = {
                .thread_count = 256,
                .shader_core_count = 1,
                .nn_core_count = 8,
+               .nn_mad_per_core = 64,
+               .tp_core_count = 4,
+               .on_chip_sram_size = 524288,
+               .axi_sram_size = 1048576,
                .vertex_cache_size = 16,
                .vertex_output_buffer_size = 1024,
                .pixel_pipes = 1,
@@ -239,6 +269,10 @@ static const struct etnaviv_chip_identity etnaviv_chip_identities[] = {
                .thread_count = 256,
                .shader_core_count = 1,
                .nn_core_count = 6,
+               .nn_mad_per_core = 64,
+               .tp_core_count = 3,
+               .on_chip_sram_size = 262144,
+               .axi_sram_size = 0,
                .vertex_cache_size = 16,
                .vertex_output_buffer_size = 1024,
                .pixel_pipes = 1,

diff --git a/include/uapi/drm/etnaviv_drm.h b/include/uapi/drm/etnaviv_drm.h
index af024d90453ddc5376892b13efd8e6c51043e97e..d87410a8443aaeadd86966e86a8bec59c8fd9f87 100644 (file)
--- a/include/uapi/drm/etnaviv_drm.h
+++ b/include/uapi/drm/etnaviv_drm.h
@@ -77,6 +77,11 @@ struct drm_etnaviv_timespec {
 #define ETNAVIV_PARAM_GPU_PRODUCT_ID                0x1c
 #define ETNAVIV_PARAM_GPU_CUSTOMER_ID               0x1d
 #define ETNAVIV_PARAM_GPU_ECO_ID                    0x1e
+#define ETNAVIV_PARAM_GPU_NN_CORE_COUNT             0x1f
+#define ETNAVIV_PARAM_GPU_NN_MAD_PER_CORE           0x20
+#define ETNAVIV_PARAM_GPU_TP_CORE_COUNT             0x21
+#define ETNAVIV_PARAM_GPU_ON_CHIP_SRAM_SIZE         0x22
+#define ETNAVIV_PARAM_GPU_AXI_SRAM_SIZE             0x23
 
 #define ETNA_MAX_PIPES 4