]> git.dujemihanovic.xyz Git - linux.git/commit
riscv: hwprobe: export vector crypto ISA extensions
authorClément Léger <cleger@rivosinc.com>
Tue, 14 Nov 2023 14:12:43 +0000 (09:12 -0500)
committerPalmer Dabbelt <palmer@rivosinc.com>
Tue, 12 Dec 2023 23:45:04 +0000 (15:45 -0800)
commitca35b5b115856973620f425955fd0ce2505a51c4
treec388f6724e5a4fee49d4f22bd628a864ee4ff05b
parentaec3353963b8de889c3f1ab7cc8ba11e99626606
riscv: hwprobe: export vector crypto ISA extensions

Export Zv* vector crypto ISA extensions that were added in "RISC-V
Cryptography Extensions Volume II" specification[1] through hwprobe.
This adds support for the following instructions:

- Zvbb: Vector Basic Bit-manipulation
- Zvbc: Vector Carryless Multiplication
- Zvkb: Vector Cryptography Bit-manipulation
- Zvkg: Vector GCM/GMAC.
- Zvkned: NIST Suite: Vector AES Block Cipher
- Zvknh[ab]: NIST Suite: Vector SHA-2 Secure Hash
- Zvksed: ShangMi Suite: SM4 Block Cipher
- Zvksh: ShangMi Suite: SM3 Secure Hash
- Zvknc: NIST Algorithm Suite with carryless multiply
- Zvkng: NIST Algorithm Suite with GCM.
- Zvksc: ShangMi Algorithm Suite with carryless multiplication
- Zvksg: ShangMi Algorithm Suite with GCM.
- Zvkt: Vector Data-Independent Execution Latency.

Zvkn and Zvks are ommited since they are a superset of other extensions.

Link: https://drive.google.com/file/d/1gb9OLH-DhbCgWp7VwpPOVrrY6f3oSJLL/view
Signed-off-by: Clément Léger <cleger@rivosinc.com>
Reviewed-by: Evan Green <evan@rivosinc.com>
Link: https://lore.kernel.org/r/20231114141256.126749-8-cleger@rivosinc.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Documentation/arch/riscv/hwprobe.rst
arch/riscv/include/uapi/asm/hwprobe.h
arch/riscv/kernel/sys_riscv.c