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clk: mediatek: mt8195: Add reset idx for PCIe0 and PCIe1
authorAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Wed, 29 Jun 2022 10:52:05 +0000 (12:52 +0200)
committerStephen Boyd <sboyd@kernel.org>
Thu, 1 Sep 2022 01:13:53 +0000 (18:13 -0700)
commitc39da7d0b40265eb4d0e9e5a1ea460ebc3f3185e
tree3a6b69aeb6847d8d9247126b4307f7aad00e415ctree | snapshot
parent7e5073a74f60a3197773fa57b796a59ae40e6542commit | diff
clk: mediatek: mt8195: Add reset idx for PCIe0 and PCIe1

Add the reset idx for PCIe P0, P1, located in infra_ao RST2 registers.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220629105205.173471-3-angelogioacchino.delregno@collabora.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
drivers/clk/mediatek/clk-mt8195-infra_ao.c diff | blob | history
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