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(parent: 03b5038) | patch
drm/amdgpu/gfx9.4.3: set additional bits on MEC halt
authorAlex Deucher <alexander.deucher@amd.com>
Thu, 12 Sep 2024 17:08:12 +0000 (13:08 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 18 Sep 2024 20:15:06 +0000 (16:15 -0400)
commit797fb1533315571ff9e55e80154f48cd47f3dbe5
treec4714b2c8e4319e1836efab5b85fe2aac6098e9atree | snapshot
parent03b5038c0ad069380fab7e251d2bf3f1540d20f4commit | diff
drm/amdgpu/gfx9.4.3: set additional bits on MEC halt

Need to set the pipe reset and cache invalidation bits
on halt otherwise we can get stale state if the CP firmware
changes (e.g., on module unload and reload).

Tested-by: Amber Lin <Amber.Lin@amd.com>
Reviewed-by: Amber Lin <Amber.Lin@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c diff | blob | history
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