]> git.dujemihanovic.xyz Git - linux.git/commit
drivers/perf: hisi: Add support for HiSilicon UC PMU driver
authorJunhao He <hejunhao3@huawei.com>
Thu, 15 Jun 2023 12:59:25 +0000 (20:59 +0800)
committerWill Deacon <will@kernel.org>
Fri, 16 Jun 2023 11:27:38 +0000 (12:27 +0100)
commit312eca95e28d40694aee7c78a18ac0ecfd6d8159
treecdc47f79885e5bc8b54d51b0f9ecb34f703f05b1
parent1a51688474c0d395b864e98236335fba712e29bf
drivers/perf: hisi: Add support for HiSilicon UC PMU driver

On HiSilicon Hip09 platform, there are 4 UC (unified cache) modules
on each chip CCL (CPU Cluster). UC is a cache that provides
coherence between NUMA and UMA domains. It is located between L2
and Memory System. Many PMU events are supported. Let's support
the UC PMU driver using the HiSilicon uncore PMU framework.

* rd_req_en : rd_req_en is the abbreviation of read request tracetag
enable and allows user to count only read operations. Details are listed
in the hisi-pmu document at Documentation/admin-guide/perf/hisi-pmu.rst

* srcid_en & srcid: Allows users to filter statistical information based
on specific CPU/ICL by srcid.
srcid_en depends on rd_req_en being enabled.

* uring_channel: Allows users to filter statistical information based on
the specified tx request uring channel.
uring_channel only supported events: [0x47 ~ 0x59].

Signed-off-by: Junhao He <hejunhao3@huawei.com>
Reviewed-by: Yicong Yang <yangyicong@hisilicon.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Link: https://lore.kernel.org/r/20230615125926.29832-3-hejunhao3@huawei.com
Signed-off-by: Will Deacon <will@kernel.org>
drivers/perf/hisilicon/Makefile
drivers/perf/hisilicon/hisi_uncore_pmu.c
drivers/perf/hisilicon/hisi_uncore_pmu.h
drivers/perf/hisilicon/hisi_uncore_uc_pmu.c [new file with mode: 0644]