]> git.dujemihanovic.xyz Git - linux.git/commit
phy: qcom: qmp-combo: Switch from V6 to V6 N4 register offsets
authorAbel Vesa <abel.vesa@linaro.org>
Mon, 27 May 2024 07:20:37 +0000 (10:20 +0300)
committerVinod Koul <vkoul@kernel.org>
Mon, 3 Jun 2024 14:00:47 +0000 (19:30 +0530)
commit163c1a356a847ab4767200fd4a45b3f8e4ddc900
treeaf1dbbf34112845e8352838b751e94df37654034
parent99bf89626335bbec71d8461f0faec88551440850
phy: qcom: qmp-combo: Switch from V6 to V6 N4 register offsets

Currently, none of the X1E80100 supported boards upstream have enabled
DP. As for USB, the reason it is not broken when it's obvious that the
offsets are wrong is because the only difference with respect to USB is
the difference in register name. The V6 uses QPHY_V6_PCS_CDR_RESET_TIME
while V6 N4 uses QPHY_V6_N4_PCS_RX_CONFIG. Now, in order for the DP to
work, the DP serdes tables need to be added as they have different
values for V6 N4 when compared to V6 ones, even though they use the same
V6 offsets. While at it, switch swing and pre-emphasis tables to V6 as
well.

Fixes: d7b3579f84f7 ("phy: qcom-qmp-combo: Add x1e80100 USB/DP combo phys")
Co-developed-by: Kuogee Hsieh <quic_khsieh@quicinc.com>
Signed-off-by: Kuogee Hsieh <quic_khsieh@quicinc.com>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20240527-x1e80100-phy-qualcomm-combo-fix-dp-v1-3-be8a0b882117@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
drivers/phy/qualcomm/phy-qcom-qmp-combo.c
drivers/phy/qualcomm/phy-qcom-qmp.h