]> git.dujemihanovic.xyz Git - linux.git/commit
Merge tag 'riscv-soc-fixes-for-v6.11-final' of https://git.kernel.org/pub/scm/linux...
authorArnd Bergmann <arnd@arndb.de>
Wed, 11 Sep 2024 08:54:37 +0000 (08:54 +0000)
committerArnd Bergmann <arnd@arndb.de>
Wed, 11 Sep 2024 08:54:37 +0000 (08:54 +0000)
commit0e7af99aef5f58b4bae00e45fd1c2626a987f7bb
treebb0c1ad37187a7efede82e808ffa406d643cf753
parentb97acde6f9840edbac5c7ea07cba6f10308d24ee
parent61f2e8a3a94175dbbaad6a54f381b2a505324610
Merge tag 'riscv-soc-fixes-for-v6.11-final' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into arm/fixes

RISC-V soc fixes for v6.11-final

StarFive:
A fix to return one of the clocks on the JH7110 from 1 GHz to 1.5 GHz

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
* tag 'riscv-soc-fixes-for-v6.11-final' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux:
  riscv: dts: starfive: jh7110-common: Fix lower rate of CPUfreq by setting PLL0 rate to 1.5GHz

Link: https://lore.kernel.org/r/20240909-hybrid-groovy-601a33b5b309@spud
Signed-off-by: Arnd Bergmann <arnd@arndb.de>