From f3e04bdc3f360c66801a9048956e61e41a16edba Mon Sep 17 00:00:00 2001
From: Kumar Gala <galak@kernel.crashing.org>
Date: Tue, 8 Apr 2008 10:45:50 -0500
Subject: [PATCH] 85xx: Use SVR_SOC_VER instead of SVR_VER
The recent change introduced by 'Update SVR numbers to expand support'
now requires that we use SVR_SOC_VER instead of SVR_VER if we want
to compare against a particular processor id.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
---
cpu/mpc85xx/cpu_init.c | 2 +-
cpu/mpc85xx/spd_sdram.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/cpu/mpc85xx/cpu_init.c b/cpu/mpc85xx/cpu_init.c
index fce0c4805a..e3240b519e 100644
--- a/cpu/mpc85xx/cpu_init.c
+++ b/cpu/mpc85xx/cpu_init.c
@@ -272,7 +272,7 @@ int cpu_init_r(void)
uint l2srbar;
svr = get_svr();
- ver = SVR_VER(svr);
+ ver = SVR_SOC_VER(svr);
asm("msync;isync");
cache_ctl = l2cache->l2ctl;
diff --git a/cpu/mpc85xx/spd_sdram.c b/cpu/mpc85xx/spd_sdram.c
index abc63c414b..435458a189 100644
--- a/cpu/mpc85xx/spd_sdram.c
+++ b/cpu/mpc85xx/spd_sdram.c
@@ -306,7 +306,7 @@ spd_sdram(void)
* Adjust DDR II IO voltage biasing.
* Only 8548 rev 1 needs the fix
*/
- if ((SVR_VER(get_svr()) == SVR_8548_E) &&
+ if ((SVR_SOC_VER(get_svr()) == SVR_8548_E) &&
(SVR_MJREV(get_svr()) == 1) &&
(spd.mem_type == SPD_MEMTYPE_DDR2)) {
volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR);
--
2.39.5