From 92e7a6814c62c5b1cace880eab0cad9e92fbbff1 Mon Sep 17 00:00:00 2001
From: Wilson Ding <dingwei@marvell.com>
Date: Mon, 26 Mar 2018 15:57:28 +0800
Subject: [PATCH] arm64: a37xx: populate pcie memory region
This patch added a new region of 32MiB AT 0xe800.0000
to Armada37x0's memory map. This region is supposed to
be mapped in MMU in order to enable the access to the
PCI I/O or MEM resources.
Signed-off-by: Wilson Ding <dingwei@marvell.com>
Reviewed-on: http://vgitil04.il.marvell.com:8080/38724
Tested-by: iSoC Platform CI <ykjenk@marvell.com>
Reviewed-by: Victor Gu <xigu@marvell.com>
Signed-off-by: Ken Ma <make@marvell.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
---
arch/arm/mach-mvebu/armada3700/cpu.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm/mach-mvebu/armada3700/cpu.c b/arch/arm/mach-mvebu/armada3700/cpu.c
index b9214f7bd9..ab4164cbe0 100644
--- a/arch/arm/mach-mvebu/armada3700/cpu.c
+++ b/arch/arm/mach-mvebu/armada3700/cpu.c
@@ -45,6 +45,14 @@ static struct mm_region mvebu_mem_map[] = {
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
PTE_BLOCK_NON_SHARE
},
+ {
+ /* PCI regions */
+ .phys = 0xe8000000UL,
+ .virt = 0xe8000000UL,
+ .size = 0x02000000UL, /* 32MiB master PCI space */
+ .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+ PTE_BLOCK_NON_SHARE
+ },
{
/* List terminator */
0,
--
2.39.5