From: Pankaj Bharadiya <pankaj.bharadiya@ti.com>
Date: Thu, 13 Sep 2012 09:38:16 +0000 (+0000)
Subject: USB: musb_udc: Make musb_peri_rx_ep check for MUSB_RXCSR_RXPKTRDY
X-Git-Tag: v2025.01-rc5-pxa1908~16863^2~11^2~18
X-Git-Url: http://git.dujemihanovic.xyz/projects?a=commitdiff_plain;h=3f0be8ea9217311ec41156fd89e3e23a0308f3b2;p=u-boot.git

USB: musb_udc: Make musb_peri_rx_ep check for MUSB_RXCSR_RXPKTRDY

The endpoint rx count register value will be zero if it is read before
receive packet ready bit (PERI_RXCSR:RXPKTRDY) is set.

Check for the receive packet ready bit (PERI_RXCSR:RXPKTRDY) before
reading endpoint rx count register. Proceed with rx count read and
FIFO read only if RXPKTRDY bit is set.

Signed-off-by: Pankaj Bharadiya <pankaj.bharadiya@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
---

diff --git a/drivers/usb/musb/musb_udc.c b/drivers/usb/musb/musb_udc.c
index 09cdec31a9..e0b4217dc3 100644
--- a/drivers/usb/musb/musb_udc.c
+++ b/drivers/usb/musb/musb_udc.c
@@ -640,8 +640,17 @@ static void musb_peri_ep0(void)
 
 static void musb_peri_rx_ep(unsigned int ep)
 {
-	u16 peri_rxcount = readw(&musbr->ep[ep].epN.rxcount);
+	u16 peri_rxcount;
+	u8 peri_rxcsr = readw(&musbr->ep[ep].epN.rxcsr);
 
+	if (!(peri_rxcsr & MUSB_RXCSR_RXPKTRDY)) {
+		if (debug_level > 0)
+			serial_printf("ERROR : %s %d without MUSB_RXCSR_RXPKTRDY set\n",
+				      __PRETTY_FUNCTION__, ep);
+		return;
+	}
+
+	peri_rxcount = readw(&musbr->ep[ep].epN.rxcount);
 	if (peri_rxcount) {
 		struct usb_endpoint_instance *endpoint;
 		u32 length;