From ac56055c41ae56756ee07805f998eaf9bc33f332 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Pali=20Roh=C3=A1r?= <pali@kernel.org> Date: Thu, 7 Apr 2022 12:16:20 +0200 Subject: [PATCH] board: freescale: p1_p2_rdb_pc: Fix env $vscfw_addr MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Do not stringify env $vscfw_addr two times (once implicitly via string operator "" and second time explicitly via __stringify() macro) and allow to compile U-Boot without CONFIG_VSC7385_ENET (when __VSCFW_ADDR was not defined and so macro name was stringified into CONFIG_EXTRA_ENV_SETTINGS). Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> --- include/configs/p1_p2_rdb_pc.h | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index cc703309e3..c3df638183 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -325,7 +325,7 @@ /* Vsc7385 switch */ #ifdef CONFIG_VSC7385_ENET -#define __VSCFW_ADDR "vscfw_addr=ef000000" +#define __VSCFW_ADDR "vscfw_addr=ef000000\0" #define CONFIG_SYS_VSC7385_BASE 0xffb00000 #ifdef CONFIG_PHYS_64BIT @@ -344,6 +344,10 @@ #define CONFIG_VSC7385_IMAGE_SIZE 8192 #endif +#ifndef __VSCFW_ADDR +#define __VSCFW_ADDR "" +#endif + /* * Config the L2 Cache as L2 SRAM */ @@ -581,7 +585,7 @@ i2c mw 18 3 __SW_BOOT_MASK 1; reset "ramdisk_size=120000\0" \ "map_lowernorbank=i2c dev 1; i2c mw 18 1 02 1; i2c mw 18 3 fd 1\0" \ "map_uppernorbank=i2c dev 1; i2c mw 18 1 00 1; i2c mw 18 3 fd 1\0" \ -__stringify(__VSCFW_ADDR)"\0" \ +__VSCFW_ADDR \ __stringify(__NOR_RST_CMD)"\0" \ __stringify(__SPI_RST_CMD)"\0" \ __stringify(__SD_RST_CMD)"\0" \ -- 2.39.5