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11 months agomtd: spi-nor-ids: Add Infineon(Cypress) s28hs02gt ID
Takahiro Kuwano [Fri, 22 Dec 2023 05:46:06 +0000 (14:46 +0900)]
mtd: spi-nor-ids: Add Infineon(Cypress) s28hs02gt ID

Infineon(Cypress) S28HS02GT is 1.8V, 2Gb (256MB) NOR Flash memory with
Octal interface. It is a dual-die package parts and has same features
with existing S28 series.

Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Dhruva Gole <d-gole@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
11 months agomtd: spi-nor-core: Rework spi_nor_cypress_octal_dtr_enable()
Takahiro Kuwano [Fri, 22 Dec 2023 05:46:05 +0000 (14:46 +0900)]
mtd: spi-nor-core: Rework spi_nor_cypress_octal_dtr_enable()

Enabling Octal DTR mode in multi-die package parts requires reister setup
for each die. That can be done by simple for-loop. write_enable() takes
effect to all die at once so we can call it before the loop. Besides we
can replace spi_mem_exec_op() calls with spansion_read/write_any_reg().
And finally, we must mask CFR2V[7:4] when changing dummy cycles, as
CFR2V[7] indicates current addressing mode and that should be 1 (4-byte
address mode) for multi-die package parts.

Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
11 months agomtd: spi-nor-core: Consolidate post_bfpt_fixup() for Infineon(Cypress) S25 and S28
Takahiro Kuwano [Fri, 22 Dec 2023 05:46:04 +0000 (14:46 +0900)]
mtd: spi-nor-core: Consolidate post_bfpt_fixup() for Infineon(Cypress) S25 and S28

s28hx_t_post_bfpt_fixup() fixes erase opcode, erase size, and page size.
s25_post_bfpt_fixup() is doing same thing including multi-die support.
We can consolidate s28hx_t_post_bfpt_fixup() and s25_post_bfpt_fixup()
into one named s25_s28_post_bfpt_fixup().

In s25_s28_post_bfpt_fixup(), set_4byte() is called to force the device to
be 4-byte addressing mode. In S28HS02GT datasheet, the B7 opcode is missing
but it works actually (confirmed).

Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
11 months agomtd: spi-nor-core: Consolidate setup() hook for Infineon(Cypress) S25 and S28
Takahiro Kuwano [Fri, 22 Dec 2023 05:46:03 +0000 (14:46 +0900)]
mtd: spi-nor-core: Consolidate setup() hook for Infineon(Cypress) S25 and S28

s28hx_t_setup() only checks sector layout setting. To support multi-die
package parts like S28HS02GT, it needs to check device size and assign
ready() hook for multi-die package parts. These are covered in s25_setup()
so we can consolidate s28hx_t_setup() and s25_setup() into one named
s25_s28_setup().

spi_nor_wait_till_ready() at the beginning of s28hx_t_setup() can be
removed since there is no op that makes device busy state before setup.

Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
11 months agomtd: spi-nor-core: Rework s25_mdp_ready() to support Octal DTR mode
Takahiro Kuwano [Fri, 22 Dec 2023 05:46:02 +0000 (14:46 +0900)]
mtd: spi-nor-core: Rework s25_mdp_ready() to support Octal DTR mode

s25_mdp_ready() handles status polling for multi-die package parts that
requires to read and check status register for each die. To support
S28HS02GT(dual-die package with Octal DTR support), rename function and
use nor->rdsr_dummy in octal DTR mode.

Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
11 months agomtd: spi-nor-core: Use CLPEF(0x82) as alternative to CLSR(0x30) for S25 and S28
Takahiro Kuwano [Fri, 22 Dec 2023 05:46:01 +0000 (14:46 +0900)]
mtd: spi-nor-core: Use CLPEF(0x82) as alternative to CLSR(0x30) for S25 and S28

Infineon(Cypress) S28Hx-T family does not support legacy CLSR(0x30) opcode.
Instead, it supports CLPEF(0x82) which has the same functionality as CLSR.
spansion_sr_ready() is for multi-die package parts including S28HS02GT, so
we need to use CLPEF instead of CLSR.

This change does not affect to S25x02GT which uses spansion_sr_ready() as
S25Hx-T family also supports CLPEF(0x82) as well as CLSR(0x30).

Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
11 months agomtd: spi-nor-core: Rework spansion_read_any_reg() to support Octal DTR mode
Takahiro Kuwano [Fri, 22 Dec 2023 05:46:00 +0000 (14:46 +0900)]
mtd: spi-nor-core: Rework spansion_read_any_reg() to support Octal DTR mode

In Infineon multi-die package parts, we need to use Read Any Register op
to read status register in 2nd or further die. Infineon S28HS02GT is
dual-die package and supports Octal DTR interface. To support this,
spansion_read_any_reg() needs to be reworked. Implementation is similar
to existing read_sr() that already supports Octal DTR mode.

Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
11 months agomtd: spi-nor-core: Consolidate non-uniform erase helpers for S25 and S28
Takahiro Kuwano [Fri, 22 Dec 2023 05:45:59 +0000 (14:45 +0900)]
mtd: spi-nor-core: Consolidate non-uniform erase helpers for S25 and S28

s25_erase_non_uniform() and s28hx_t_erase_uniform() support hybrid sector
layout (32 x 4KB sectors overlaid at bottom address) and doing same thing.
Consolidate them into single helper named s25_s28_erase_non_uniform().

Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
11 months agomtd: spi-nor-core: Clean up macros for Infineon(Cypress) S25 and S28
Takahiro Kuwano [Fri, 22 Dec 2023 05:45:58 +0000 (14:45 +0900)]
mtd: spi-nor-core: Clean up macros for Infineon(Cypress) S25 and S28

Some macro definitions used in Infineon(Cypress) S25 and S28 series are
redundant and some have inconsistent prefix. This patch removes
redundant ones and renames some to have same prefix as others.

Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
11 months agomtd: spi: spi-nor-ids: Add more XM25Q series chips
Ssunk [Tue, 16 Jan 2024 05:38:34 +0000 (13:38 +0800)]
mtd: spi: spi-nor-ids: Add more XM25Q series chips

- XM25QH128C
- XM25QH256C
- XM25QU256C
- XM25QH512C
- XM25QU512C

Signed-off-by: Kankan Sun <ssunkkan@gmail.com>
[jagan: update the commit message]
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
11 months agospi: cadence_qspi: Address the comparison failure for 0-8 bytes of data
Tejas Bhumkar [Sun, 28 Jan 2024 06:37:46 +0000 (12:07 +0530)]
spi: cadence_qspi: Address the comparison failure for 0-8 bytes of data

The current implementation encounters issues when testing data ranging
from 0 to 8 bytes. This was confirmed through testing with both ISSI
(IS25WX256) and Micron (MT35XU02G) Flash exclusively in SDR mode.

Upon investigation, it was observed that utilizing the
"SPI_NOR_OCTAL_READ" flag and attempting to read less than 8 bytes in
STIG mode results in a read failure, leading to a compare test failure.

To resolve this issue, the CMD_4BYTE_FAST_READ opcode is now utilized
instead of CMD_4BYTE_OCTAL_READ, specifically in SDR mode.

This is based on patch series:
https://lore.kernel.org/all/cover.1701853668.git.tejas.arvind.bhumkar@amd.com/

Signed-off-by: Tejas Bhumkar <tejas.arvind.bhumkar@amd.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
11 months agomtd: spi-nor-ids: Add is25lx512 chip
Tejas Bhumkar [Wed, 27 Dec 2023 16:28:39 +0000 (21:58 +0530)]
mtd: spi-nor-ids: Add is25lx512 chip

Added support for the ISSI OSPI flash part IS25LX512M.
Initial testing was performed on the Tenzing-se1 board using
SDR mode, covering basic erase, write, and readback operations.

Signed-off-by: Tejas Bhumkar <tejas.arvind.bhumkar@amd.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
11 months agospi: dw: add check for Rx FIFO overflow
Maksim Kiselev [Thu, 21 Dec 2023 10:13:30 +0000 (13:13 +0300)]
spi: dw: add check for Rx FIFO overflow

If even one byte is lost due to Rx FIFO overflow then we will never
exit the read loop. Because the (priv->rx != priv->rx_end) condition will
be always true.

Let's check if Rx FIFO overflow occurred and exit the read loop
in this case.

Signed-off-by: Maksim Kiselev <bigunclemax@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
11 months agoMerge branch 'master-cleanup' of https://source.denx.de/u-boot/custodians/u-boot-sh
Tom Rini [Sun, 28 Jan 2024 01:43:20 +0000 (20:43 -0500)]
Merge branch 'master-cleanup' of https://source.denx.de/u-boot/custodians/u-boot-sh

- Assorted code clean-ups

11 months agoARM: renesas: whitehawk: Drop extra leading space
Marek Vasut [Sun, 21 Jan 2024 17:33:12 +0000 (18:33 +0100)]
ARM: renesas: whitehawk: Drop extra leading space

Drop leading space in front of a comment. No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
11 months agoARM: renesas: Drop include common.h
Marek Vasut [Sun, 21 Jan 2024 17:31:23 +0000 (18:31 +0100)]
ARM: renesas: Drop include common.h

The header file is not necessary in either of those files,
remove it as common.h is going away.

Include missing asm/arch/rmobile.h in board/renesas/rcar-common/v3-common.c
to prevent build failure of r8a77970_eagle r8a779a0_falcon r8a77980_v3hsk
and r8a77970_v3msk .

Include missing asm/u-boot.h in falcon.c and grpeach.c to fix build failure
due to missing definition of struct bd_info . Include errno.h in grpeach.c
to fix build error due to missing definition of EINVAL.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
11 months agopinctrl: renesas: Drop include common.h
Marek Vasut [Sun, 21 Jan 2024 17:31:22 +0000 (18:31 +0100)]
pinctrl: renesas: Drop include common.h

The header file is not necessary in either of those files,
remove it as common.h is going away.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
11 months agoclk: renesas: Drop include common.h
Marek Vasut [Sun, 21 Jan 2024 17:31:21 +0000 (18:31 +0100)]
clk: renesas: Drop include common.h

The header file is not necessary in either of those files,
remove it as common.h is going away.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
11 months agoMerge tag 'smbios-2024-04-rc1-2' of https://source.denx.de/u-boot/custodians/u-boot-efi
Tom Rini [Sat, 27 Jan 2024 12:53:29 +0000 (07:53 -0500)]
Merge tag 'smbios-2024-04-rc1-2' of https://source.denx.de/u-boot/custodians/u-boot-efi

Pull request smbios-2024-04-rc1-2

* Add missing field to SMBIOS type 2 structure definition
* Provide smbios command to display smbios table
* Enable the command on sandbox and qemu_arm64_defconfig
* Provide a python test for the smbios command
* Fix copying SMBIOS 2.1 table from QEMU
* Correct EFI TCG measurement to assume SMBIOS 3 table

11 months agolib: support SMBIOS3 table in uuid_guid_get_str()
Heinrich Schuchardt [Mon, 22 Jan 2024 13:04:35 +0000 (14:04 +0100)]
lib: support SMBIOS3 table in uuid_guid_get_str()

As we support installing SMBIOS3 tables in U-Boot we need to add this GUID
to the translation table used buy uuid_guid_get_str().

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
11 months agosmbios: use struct_table_length to get SMBIOS 2.1 total table length
Masahisa Kojima [Thu, 25 Jan 2024 01:11:28 +0000 (10:11 +0900)]
smbios: use struct_table_length to get SMBIOS 2.1 total table length

The current code convert the SMBIOS 2.1 entry point structure to
SMBIOS 3.0 entry point structure. The max_struct_size member in
SMBIOS 2.1 entry point structure indicates
"Size of the largest SMBIOS structure, in bytes".
We need to use struct_table_length instead.

Fixes: 1c5aab803c0b ("smbios: copy QEMU tables")
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
11 months agoefi_loader: migrate SMBIOS 3.0 entry point structure for measurement
Masahisa Kojima [Fri, 26 Jan 2024 00:53:42 +0000 (09:53 +0900)]
efi_loader: migrate SMBIOS 3.0 entry point structure for measurement

Current U-Boot only supports the SMBIOS 3.0 entry point structure.
TCG2 measurement code should migrate to SMBIOS 3.0 entry
point structure.

efi_selftest tcg2 test also needs to be updated, and expected
PCR[1] result is changed since guid for SMBIOS EFI system table
uses different guid SMBIOS3_TABLE_GUID instead of SMBIOS_TABLE_GUID.

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
11 months agoconfigs: enable smbios command on qemu_arm64_defconfig
Heinrich Schuchardt [Thu, 25 Jan 2024 15:54:38 +0000 (16:54 +0100)]
configs: enable smbios command on qemu_arm64_defconfig

We have a Python test the copying of SMBIOS tables from QEMU.
To make use of the test we need the smbios command.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
11 months agoconfigs: enable smbios command on sandbox
Heinrich Schuchardt [Thu, 25 Jan 2024 15:54:37 +0000 (16:54 +0100)]
configs: enable smbios command on sandbox

To make use of the Python smbios test we need the smbios command.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
11 months agotest: unit test for smbios command
Heinrich Schuchardt [Thu, 25 Jan 2024 15:54:36 +0000 (16:54 +0100)]
test: unit test for smbios command

Provide a unit test for the smbios command.

Provide different test functions for QEMU, sandbox, and other systems.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
11 months agodoc: man-page for smbios command
Heinrich Schuchardt [Thu, 25 Jan 2024 15:54:35 +0000 (16:54 +0100)]
doc: man-page for smbios command

Provide a man-page for the smbios command.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
11 months agocmd: provide command to display SMBIOS information
Heinrich Schuchardt [Thu, 25 Jan 2024 15:54:34 +0000 (16:54 +0100)]
cmd: provide command to display SMBIOS information

U-Boot can either generated an SMBIOS table or copy it from a prior boot
stage, e.g. QEMU.

Provide a command to display the SMBIOS information.

Currently only type 1 and 2 are translated to human readable text.
Other types may be added later. Currently only a hexdump and the list of
strings is provided for these.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
11 months agosmbios: type2: contained object handles
Heinrich Schuchardt [Thu, 25 Jan 2024 15:54:33 +0000 (16:54 +0100)]
smbios: type2: contained object handles

The type 2 structure must include information about the contained objects.
It is fine to set the number of contained object handles to 0.

Add the missing field.

Fixes: 721e992a8af5 ("x86: Add SMBIOS table support")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
11 months agoMerge branch '2024-01-24-assorted-fixes-and-updates'
Tom Rini [Thu, 25 Jan 2024 16:01:38 +0000 (11:01 -0500)]
Merge branch '2024-01-24-assorted-fixes-and-updates'

- Increase SYS_MAXARGS default, verdin-am62 improvements (and required
  cleanup), assorted cleanups throughout the code base.

11 months agoreset: reset-hisilicon: also handle #reset-cells = <2>
Yang Xiwen [Fri, 19 Jan 2024 12:49:17 +0000 (20:49 +0800)]
reset: reset-hisilicon: also handle #reset-cells = <2>

It's also valid to have #reset-cells = <2> while the third arg defaults
to ASSERT_SET.

Signed-off-by: Yang Xiwen <forbidden405@outlook.com>
11 months agotest: enhance unicode_test_utf8_to_utf32_stream()
Heinrich Schuchardt [Thu, 18 Jan 2024 17:57:12 +0000 (18:57 +0100)]
test: enhance unicode_test_utf8_to_utf32_stream()

Additionally test a UTF-8 string where each code point translates to three
UTF-8 bytes.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
11 months agolib: add comment in utf8_to_utf32_stream()
Heinrich Schuchardt [Thu, 18 Jan 2024 17:54:50 +0000 (18:54 +0100)]
lib: add comment in utf8_to_utf32_stream()

The logic of utf8_to_utf32_stream() is not easy to understand.
Add a comment.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
11 months agodocker: Add tools/buildman/requirements.txt to the cache
Tom Rini [Thu, 18 Jan 2024 17:10:07 +0000 (12:10 -0500)]
docker: Add tools/buildman/requirements.txt to the cache

As we have had this file for a while now, we should include installing
and populating our pip cache from here as well.

Signed-off-by: Tom Rini <trini@konsulko.com>
11 months agocommon: console: Fix print complete stdio device list
Patrice Chotard [Wed, 17 Jan 2024 12:37:13 +0000 (13:37 +0100)]
common: console: Fix print complete stdio device list

In case CONSOLE_MUX and SYS_CONSOLE_IS_IN_ENV are on and
stdin or stdout or stderr are missing in environment, as fallback, get
these either from stdio_devices[std] or stdio_devices[std]->name.

Fixes: 6b343ab38d ("console: Print out complete stdio device list")
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
11 months agocmd: bootmenu: rename U-Boot console to Exit
Svyatoslav Ryhel [Wed, 17 Jan 2024 10:55:46 +0000 (12:55 +0200)]
cmd: bootmenu: rename U-Boot console to Exit

It seems that the U-Boot console entry of the bootmenu has lost
its original meaning. Now, even if it is chosen, the probability
that you will enter the actual U-Boot console is quite low.
Boot env, bootflow, bootcommand script may appear, but not the
actual console. Hence, let's remove ambiguity and name this
entry by what it actually does: 'Exit' the bootmenu.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
11 months agoboard: verdin-am62: set cpu core voltage depending on speed grade
Max Krummenacher [Wed, 17 Jan 2024 10:16:49 +0000 (11:16 +0100)]
board: verdin-am62: set cpu core voltage depending on speed grade

Speed grade T requires the VDD_CORE voltage to be 0.85V if using
the maximum core frequency.

Speed grades G, K, S allow the VDD_CORE voltage to be 0.75V up to the
maximum core frequency but allow to run at 0.85V.

For efficiency in manufacturing and code maintenance we use 0.85V for
the PMIC defaults and device tree settings and dynamically adjust the
voltage in the PMIC and device tree to 0.75V for lower speed SKU to
gain more than 100mW power consumption reduction.

Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
11 months agoarm: mach-k3: am62: provide more soc feature info accessors
Max Krummenacher [Wed, 17 Jan 2024 10:16:48 +0000 (11:16 +0100)]
arm: mach-k3: am62: provide more soc feature info accessors

Add two functions, one which returns the SoC speed grade and one
which returns the SoC operating temperature range.

Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
11 months agoarm: mach-k3: am62: move device identification accessor functions to header
Max Krummenacher [Wed, 17 Jan 2024 10:16:47 +0000 (11:16 +0100)]
arm: mach-k3: am62: move device identification accessor functions to header

mach-k3/am625_fdt.c does fdt fixup depending on fields in the device
identification register. Move the accessors to the device identification
register as inline functions into the am62_hardware.h header, so that
they can be used for other functionality.

Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
11 months agoboard: verdin-am62: improve comment on usb phy core voltage
Max Krummenacher [Wed, 17 Jan 2024 10:16:46 +0000 (11:16 +0100)]
board: verdin-am62: improve comment on usb phy core voltage

TI recommends to clear the bit independent of the used voltage.
So the comment which claims to do it due to the core voltage
at 0.85V is bogus.

See https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1252724/am625-usb-phy-core-voltage-selection-and-vdda_core_usb-mismatch

Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
11 months agoheaders: don't depend on errno.h being available
Max Krummenacher [Thu, 18 Jan 2024 18:10:47 +0000 (19:10 +0100)]
headers: don't depend on errno.h being available

These headers follow the pattern:

| #if CONFIG_IS_ENABLED(FANCY_FEATURE)
|   void foo(void);
| #else
|   static inline void foo(void) { return -ENOSYS; }
| #endif

In the #else path ENOSYS is used, however linux/errno.h is not included.
If errno.h has not been included already the compiler errors out even
if the inline function is not referenced.

Make those headers self contained.

Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
11 months agocmd: increase default for SYS_MAXARGS
Heinrich Schuchardt [Mon, 15 Jan 2024 13:46:56 +0000 (14:46 +0100)]
cmd: increase default for SYS_MAXARGS

The value of CONFIG SYS_MAXARGS limits the usability of the 'for' command.
The current default of 16 is too low for some use case. Cf.
https://bugs.launchpad.net/snap-core18/+bug/1910094

Increase the default to 64.

Reported-by: Dave Jones <dave.jones@canonical.com>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
11 months agoboard: ti: common: board_detect: Fix EEPROM offset read for 1-byte
Prasanth Babu Mantena [Mon, 30 Oct 2023 17:04:58 +0000 (22:34 +0530)]
board: ti: common: board_detect: Fix EEPROM offset read for 1-byte

EEPROM detection logic in ti_i2c_eeprom_get() involves reading
the total size and the 1-byte size with an offset 1. The commit
9f393a2d7af8 ("board: ti: common: board_detect: Fix EEPROM read
quirk for 2-byte") that attempts to fix this uses a wrong pointer to
compare.

The value with one offset is read into offset_test, but the pointer
used to match was still ep, resulting in an invalid comparison of the
values. The intent is to identify bad 2-byte addressing eeproms that
get stuck on the successive reads.

Fixes: 9f393a2d7af8 (board: ti: common: board_detect: Fix EEPROM read quirk for 2-byte)
Signed-off-by: Prasanth Babu Mantena <p-mantena@ti.com>
Tested-by: Matwey V. Kornilov <matwey.kornilov@gmail.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
11 months agoMerge patch series "omap3: Make SPL_OMAP3_ID_NAND depend on NAND_OMAP_GPMC"
Tom Rini [Mon, 22 Jan 2024 18:30:23 +0000 (13:30 -0500)]
Merge patch series "omap3: Make SPL_OMAP3_ID_NAND depend on NAND_OMAP_GPMC"

This series results in making it such that with CONFIG_MTD disabled we
then do not prompt the user for a number of memory technology device
related options and so clean up our configuration menu / display.

11 months agomtd: Make CONFIG_MTD be the gate symbol for the menu
Tom Rini [Wed, 10 Jan 2024 18:46:10 +0000 (13:46 -0500)]
mtd: Make CONFIG_MTD be the gate symbol for the menu

The help for CONFIG_MTD explains that it needs to be enabled for various
things like NAND, etc to be available. It however then doesn't enforce
this dependency and so if you have none of these systems present you
still need to disable a number of options. Fix this by making places
that select/imply one type of flash, but did not do the same, also do
this for "MTD". Make boards which hadn't been enabling MTD already but
need it now, do so. In a few places, disable CONFIG_CMD_MTDPARTS as it
wasn't previously enabled but was now being implied.

Signed-off-by: Tom Rini <trini@konsulko.com>
11 months agocmd/flash: Make this default y for CFI and NOR only
Tom Rini [Wed, 10 Jan 2024 18:46:09 +0000 (13:46 -0500)]
cmd/flash: Make this default y for CFI and NOR only

This command is only useful on CFI and NOR type flashes and not others.
Update the dependency so that it's not enabled by default in other
cases. This will lead to a number of platforms no longer building this
command, where it was not useful.

Signed-off-by: Tom Rini <trini@konsulko.com>
11 months agoenv: Make ENV_IS_IN_SPI_FLASH depend on SPI flash being present
Tom Rini [Wed, 10 Jan 2024 18:46:08 +0000 (13:46 -0500)]
env: Make ENV_IS_IN_SPI_FLASH depend on SPI flash being present

In order for our environment to be present on SPI flash we need to
depend not on the symbol for a SPI controller but rather that SPI flash
of some sort is present. Update the dependencies.

Signed-off-by: Tom Rini <trini@konsulko.com>
11 months agocmd/mtdparts: Make this select MTD_PARTITIONS
Tom Rini [Wed, 10 Jan 2024 18:46:07 +0000 (13:46 -0500)]
cmd/mtdparts: Make this select MTD_PARTITIONS

Rather than rely on someone selecting or implying this hidden symbol
that the command requires, select it explicitly.

Signed-off-by: Tom Rini <trini@konsulko.com>
11 months agoomap3: Make SPL_OMAP3_ID_NAND depend on NAND_OMAP_GPMC
Tom Rini [Wed, 10 Jan 2024 18:46:06 +0000 (13:46 -0500)]
omap3: Make SPL_OMAP3_ID_NAND depend on NAND_OMAP_GPMC

This specific bit logic is used to determine what NAND chip is present
on a board in order to then know what revision of the board we have and
so what DDR chips are present. We can only do this if we have a NAND
chip, and so we will have NAND_OMAP_GPMC enabled.

Signed-off-by: Tom Rini <trini@konsulko.com>
11 months agocommon: usb-hub: Reset hub port before scanning
Shantur Rathore [Sat, 9 Dec 2023 18:10:56 +0000 (18:10 +0000)]
common: usb-hub: Reset hub port before scanning

Currently when a hub is turned on, all the ports are powered on.
This works well for hubs which have individual power control.

For the hubs without individual power control this has no effect.
Mostly in these scenarios the hub port is powered before the USB
controller is enabled, this can lead to some devices in unexpected
state.

With this patch, we explicitly reset the port while powering up hub
This resets the port for hubs without port power control and has
no effect on hubs with port power control as the port is still off.

Before this patch AMicro AM8180 based NVME to USB adapter won't be
detected as a USB3.0 Mass Storage device but with this it works as
expected.

Tested working after this patch:
1. AMicro AM8180 based NVME to USB Adapter
2. Kingston DataTraveler 3.0
3. GenesysLogic USB3.0 Hub

The drives were tested while connected directly and via the hub.

Signed-off-by: Shantur Rathore <i@shantur.com>
Reviewed-by: Marek Vasut <marex@denx.de>
11 months agoMerge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell
Tom Rini [Mon, 22 Jan 2024 15:59:20 +0000 (10:59 -0500)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell

- solidrun: clearfog gtr: add serdes configuration (Josua)

11 months agoMerge tag 'u-boot-imx-master-20240122' of https://gitlab.denx.de/u-boot/custodians...
Tom Rini [Mon, 22 Jan 2024 14:47:52 +0000 (09:47 -0500)]
Merge tag 'u-boot-imx-master-20240122' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

- Allow i.MX8M Plus DHCOM to operate in overdrive mode.
- Allow i.MX8M Plus eDM SBC to operate in overdrive mode.
- Enable the 'kaslrseed' command on DH i.MX8M Plus DHCOM.
- Select LTO by default on i.MX8M.
- Convert pico-dwarf/hobbit-imx6ul to CONFIG_DM_SERIAL.
- Fix 'reset' command on wandboard.

11 months agoMerge commit '3c9bb8fbdc77f6bd56e97597d875d8965db3b96c' of https://github.com/tienfon...
Tom Rini [Mon, 22 Jan 2024 14:35:38 +0000 (09:35 -0500)]
Merge commit '3c9bb8fbdc77f6bd56e97597d875d8965db3b96c' of https://github.com/tienfong/uboot_mainline

A few small SoCFPGA updates

11 months agoboard: solidrun: clearfog: fix serdes 1 / eth2 speed for clearfog gtr
Josua Mayer [Fri, 12 Jan 2024 13:35:11 +0000 (14:35 +0100)]
board: solidrun: clearfog: fix serdes 1 / eth2 speed for clearfog gtr

Clearfog GTR connects eth2 / serdes 1 to a 2.5Gbps capable ethernet
switch port. Linux already configures a fixed-link at speed 2500 from
device-tree.

Upgrade serdes 1 rate to 3.125Gbps to support a 2.5Gbps link.

Additionally add comments documenting each serdes' function of clearfog
gtr, which are shared with clearfog pro.

Signed-off-by: Josua Mayer <josua@solid-run.com>
11 months agoarm: mvebu: clearfog gtr: add config option to select serdes0 interface
Josua Mayer [Fri, 12 Jan 2024 13:35:10 +0000 (14:35 +0100)]
arm: mvebu: clearfog gtr: add config option to select serdes0 interface

Clearfog GTR has an assembly option for a SATA connector, CON18.
It shares the serdes with mini-pcie connector CON3.

Add new kconfig option to select betweenata and pci, defaulting to pci
as it was previously configured in board-file.

Clearfog GTR connects eth2 / serdes 1 to a 2.5Gbps capable ethernet
switch port. Linux already configures a fixed-link at speed 2500 from
device-tree.
Upgrade serdes 1 rate to 3.125Gbps to support a 2.5Gbps network link on
Clearfog GTR.

Signed-off-by: Josua Mayer <josua@solid-run.com>
11 months agoARM: imx: Enable kaslrseed command on DH i.MX8M Plus DHCOM
Marek Vasut [Sat, 20 Jan 2024 00:35:58 +0000 (01:35 +0100)]
ARM: imx: Enable kaslrseed command on DH i.MX8M Plus DHCOM

Linux 6.6.y with KASLR enabled would print the following message on boot:
"
KASLR disabled due to lack of seed
"
Enable the 'kaslrseed' command so a random number seed can be pulled
from CAAM and inserted into the /chosen node 'kaslr-seed' property of
Linux kernel DT before boot, thus letting KASLR work properly.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
11 months agopico-dwarf/hobbit-imx6ul: Convert to CONFIG_DM_SERIAL
Fabio Estevam [Fri, 19 Jan 2024 19:41:34 +0000 (16:41 -0300)]
pico-dwarf/hobbit-imx6ul: Convert to CONFIG_DM_SERIAL

The conversion to CONFIG_DM_SERIAL is mandatory, so select
this option.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
11 months agowandboard: Convert to watchdog driver model
Fabio Estevam [Fri, 19 Jan 2024 17:25:33 +0000 (14:25 -0300)]
wandboard: Convert to watchdog driver model

Commit 68dcbdd594d4 ("ARM: imx: Add weak default reset_cpu()") caused
the 'reset' command in U-Boot to not cause a board reset.

Fix it by switching to the watchdog driver model via sysreset, which
is the preferred method for implementing the watchdog reset.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
11 months agoARM: imx: Configure GIC clock parent on Data Modul i.MX8M Plus eDM SBC
Marek Vasut [Fri, 19 Jan 2024 16:08:32 +0000 (17:08 +0100)]
ARM: imx: Configure GIC clock parent on Data Modul i.MX8M Plus eDM SBC

The CONFIG_SPL_BOARD_INIT lets SPL common code call spl_board_init()
during the SPL start up. On this particular system, spl_board_init()
is used to reconfigure GIC clock parent to PLL2 500M, which is the
configuration expected by the Linux kernel. Enable SPL_BOARD_INIT
and fill in the GIC clock configuration code.

Set GIC clock to 500 MHz for OD VDD_SOC. Kernel driver does not
allow to change it. Should set the clock after PMIC setting done.
Default is 400 MHz (system_pll1_800m with div = 2) set by ROM for
ND VDD_SOC.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
11 months agoARM: imx: Enable SPL_BOARD_INIT on DH i.MX8M Plus DHCOM
Marek Vasut [Fri, 19 Jan 2024 16:07:54 +0000 (17:07 +0100)]
ARM: imx: Enable SPL_BOARD_INIT on DH i.MX8M Plus DHCOM

The CONFIG_SPL_BOARD_INIT lets SPL common code call spl_board_init()
during the SPL start up. On this particular system, spl_board_init()
is used to reconfigure GIC clock parent to PLL2 500M, which is the
configuration expected by the Linux kernel. Enable SPL_BOARD_INIT .

Set GIC clock to 500 MHz for OD VDD_SOC. Kernel driver does not
allow to change it. Should set the clock after PMIC setting done.
Default is 400 MHz (system_pll1_800m with div = 2) set by ROM for
ND VDD_SOC.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
11 months agoimx8m: Enable LTO by default
Fabio Estevam [Thu, 18 Jan 2024 15:06:39 +0000 (12:06 -0300)]
imx8m: Enable LTO by default

In an attempt to select ARMV8_SPL_EXCEPTION_VECTORS, the SPL size
could not fit into the internal SRAM of some imx8m targets:

   aarch64:  +   imx8mm_phg
+aarch64-linux-ld.bfd: u-boot-spl section `__u_boot_list' will not fit in region `.sram'
+aarch64-linux-ld.bfd: region `.sram' overflowed by 1824 bytes

Select LTO to prevent that.

Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Marek Vasut <marex@denx.de>
11 months agoarm: dts: agilex: Increase reserved memory size to 32MB
Dinesh Maniyam [Fri, 15 Dec 2023 07:21:51 +0000 (15:21 +0800)]
arm: dts: agilex: Increase reserved memory size to 32MB

The reserved space is extended to 32MB in Linux kernel because
additional space is needed for authorization execution of JIC/RBF file.
U-Boot required to align with Linux.

Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
11 months agoclk: altera: n5x: Fix MEMCLKMGR_EXTCNTRST_C0CNTRST to bit(0)
Dinesh Maniyam [Fri, 15 Dec 2023 07:15:19 +0000 (15:15 +0800)]
clk: altera: n5x: Fix MEMCLKMGR_EXTCNTRST_C0CNTRST to bit(0)

MEMCLKMGR_EXTCNTRST_C0CNTRST register defined as BIT[0] in documentation
but it is wrongly defined as BIT[7] in u-boot code. This register is used
to hold associated pingpong counter in reset
while PLL and 5:1 mux configuration is changed.

Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
11 months agoarm: socfpga: stratix10: SPI clock support
Dinesh Maniyam [Thu, 7 Dec 2023 07:46:02 +0000 (15:46 +0800)]
arm: socfpga: stratix10: SPI clock support

This patch is to add SPI clock support for stratix10. Get clock rate
function always returning 0 because the DW-SPI driver get the rate
from clock node in dts but Stratix10 does not support device tree
clock node.To overcome this spi will get the clock_rate directly
from spi clock controller override the weaker function.

Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
11 months agoMerge tag 'efi-2024-04-rc1-3' of https://source.denx.de/u-boot/custodians/u-boot-efi
Tom Rini [Sun, 21 Jan 2024 14:11:33 +0000 (09:11 -0500)]
Merge tag 'efi-2024-04-rc1-3' of https://source.denx.de/u-boot/custodians/u-boot-efi

Pull request efi-2024-04-rc1-3

Documentation:

* correct documentation of part_get_bootable()
* remove duplicate word "has" in UEFI documentation

UEFI:

* rename check_disk_has_default_file function
* auto-generate boot option for each blkio device
* auto-generate removable media boot option first
* avoid pointer access after calling efi_delete_handle
* create common function to free struct efi_disk_obj
* return immediately in UCLASS_EFI_LOADER removal

11 months agoefi_loader: return immediately in UCLASS_EFI_LOADER removal
Masahisa Kojima [Fri, 19 Jan 2024 00:45:46 +0000 (09:45 +0900)]
efi_loader: return immediately in UCLASS_EFI_LOADER removal

In case of UCLASS_EFI_LOADER, EFI handles are managed by
EFI application/driver, we must not delete EFI handles.

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
11 months agoefi_loader: create common function to free struct efi_disk_obj
Masahisa Kojima [Fri, 19 Jan 2024 00:45:45 +0000 (09:45 +0900)]
efi_loader: create common function to free struct efi_disk_obj

Current error handling of creating raw disk/partition has
following issues.
 - duplicate free for EFI handle, EFI handle is already freed
   in efi_delete_handle()
 - missing free for struct efi_device_path and
   struct efi_simple_file_system_protocol in some error paths

To address those issues, this commit creates the common function
to free the struct efi_disk_obj resources and calls it in case
of error.

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
11 months agoefi_loader: avoid pointer access after calling efi_delete_handle
Masahisa Kojima [Fri, 19 Jan 2024 00:45:44 +0000 (09:45 +0900)]
efi_loader: avoid pointer access after calling efi_delete_handle

efi_delete_handle() calls efi_purge_handle(), then it finally
frees the EFI handle.
Both diskobj and handle variables in efi_disk_remove() have
the same pointer, we can not access diskobj->dp after calling
efi_delete_handle().

This commit saves the struct efi_device_path pointer before
calling efi_delete_handle(). This commit also fixes the
missing free for volume member in struct efi_disk_obj.

This commit also removes the container_of() calls, and
adds the TODO comment of missing efi_close_protocol() call
for the parent EFI_BLOCK_IO_PROTOCOL.

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
11 months agoefi_loader: auto-generate removable media boot option first
Masahisa Kojima [Fri, 12 Jan 2024 00:19:23 +0000 (09:19 +0900)]
efi_loader: auto-generate removable media boot option first

This commit auto-generates the boot option for removable
block io devices followed by fixed block io devices.
This is what EDK II reference implementation does.

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
11 months agoefi_loader: auto-generate boot option for each blkio device
Masahisa Kojima [Fri, 12 Jan 2024 00:19:22 +0000 (09:19 +0900)]
efi_loader: auto-generate boot option for each blkio device

Current efibootmgr auto-generates the boot option for all
disks and partitions installing EFI_SIMPLE_FILE_SYSTEM_PROTOCOL,
while EDK II reference implementation auto-generates the boot option
for all devices installing  EFI_BLOCK_IO_PROTOCOL with
eliminating logical partitions.

This commit modifies the efibootmgr to get aligned to EDK II.

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
11 months agoefi_loader: rename check_disk_has_default_file function
Masahisa Kojima [Fri, 12 Jan 2024 00:19:21 +0000 (09:19 +0900)]
efi_loader: rename check_disk_has_default_file function

check_disk_has_default_file() function checks if the
architecture-specific default file exists on the block
device, and fills the default file device path if it exists.

Rename the function name to fill_default_file_path().

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
11 months agopart: correct documentation of part_get_bootable()
Heinrich Schuchardt [Tue, 16 Jan 2024 14:00:20 +0000 (15:00 +0100)]
part: correct documentation of part_get_bootable()

We have to use 'Return:' to render the description of the return value in
the HTML documentation.

Fixes: f55aa4454ac3 ("part: Add a fallback for part_get_bootable()")
Fixes: dcffa4428d03 ("part: Add a function to find the first bootable partition")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
11 months agodoc: uefi: remove duplicate word "has"
Wei Ming Chen [Fri, 19 Jan 2024 01:34:14 +0000 (09:34 +0800)]
doc: uefi: remove duplicate word "has"

There should be only one "has" instead of "has has"

Signed-off-by: Wei Ming Chen <jj251510319013@gmail.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
11 months agoMerge patch series "k3-j721e: beagleboneai: Fix USB"
Tom Rini [Sat, 20 Jan 2024 16:39:13 +0000 (11:39 -0500)]
Merge patch series "k3-j721e: beagleboneai: Fix USB"

Roger Quadros <rogerq@kernel.org> says:

Hi,

This series fixes USB operation on k3-j721e based boards.

11 months agoconfigs/j721e_beagleboneai64_a72_defconfig: Enable Sierra PHY
Roger Quadros [Fri, 12 Jan 2024 12:49:51 +0000 (14:49 +0200)]
configs/j721e_beagleboneai64_a72_defconfig: Enable Sierra PHY

This is required for USB Super-Speed operation.

Signed-off-by: Roger Quadros <rogerq@kernel.org>
11 months agoarm: dts: k3-j721e-beagleboneai64: Fix USB operation
Roger Quadros [Fri, 12 Jan 2024 12:49:50 +0000 (14:49 +0200)]
arm: dts: k3-j721e-beagleboneai64: Fix USB operation

Without correct SERDES MUX and Lane control settings
USB0 will be broken. Set the MUX and Lane control devices
to be auto probed so they are configured correctly.

Signed-off-by: Roger Quadros <rogerq@kernel.org>
11 months agoarm: dts: k3-j721e: Fix USB0 operation
Roger Quadros [Fri, 12 Jan 2024 12:49:49 +0000 (14:49 +0200)]
arm: dts: k3-j721e: Fix USB0 operation

Without correct SERDES MUX and Lane control settings
USB0 will be broken. Set the MUX and Lane control devices
to be auto probed so they are configured correctly.

Fixes: 69b19ca67bcb ("arm: dts: k3-j721e: Sync with v6.6-rc1")
Signed-off-by: Roger Quadros <rogerq@kernel.org>
11 months agousb: cdns3: avoid error messages if phys don't exist
Roger Quadros [Fri, 12 Jan 2024 12:49:48 +0000 (14:49 +0200)]
usb: cdns3: avoid error messages if phys don't exist

The phys property is optional so don't complain
if it doesn't exist in device tree.

Signed-off-by: Roger Quadros <rogerq@kernel.org>
11 months agoboard: ti: j721e: Drop SERDES PHY init from board file
Roger Quadros [Fri, 12 Jan 2024 12:49:47 +0000 (14:49 +0200)]
board: ti: j721e: Drop SERDES PHY init from board file

Since commit 69b19ca67bcb ("arm: dts: k3-j721e: Sync with v6.6-rc1"),
the following error message is seen at u-boot
"Sierra init failed:-19"

Probing and initializing the SERDES PHY from
board file is not a clean solution so drop it.

Proper use case should be via PHY_UCLASS APIs.

Signed-off-by: Roger Quadros <rogerq@kernel.org>
11 months agoKconfig: boot: Imply BOOTSTD_DEFAULT when BOOTSTD_FULL=y
Shantur Rathore [Sat, 23 Dec 2023 06:51:59 +0000 (06:51 +0000)]
Kconfig: boot: Imply BOOTSTD_DEFAULT when BOOTSTD_FULL=y

We need BOOTSTD_DEFAULT when BOOTSTD_FULL is selected.

Signed-off-by: Shantur Rathore <i@shantur.com>
11 months agoMerge tag 'u-boot-stm32-20240119' of https://source.denx.de/u-boot/custodians/u-boot-stm
Tom Rini [Fri, 19 Jan 2024 16:59:28 +0000 (11:59 -0500)]
Merge tag 'u-boot-stm32-20240119' of https://source.denx.de/u-boot/custodians/u-boot-stm

Add CMDLINE dependecy for CMD_STM32KEY

STM32MP1:
---------
Set stdio to serial on DH STM32MP15xx DHSOM
Fix reset for usart1 in scmi configuration

STM32MP2:
---------
Add BSEC and OTP support for STM32MP25
Fix CONFIG_STM32MP25X flag usage

11 months agostm32mp2: Fix CONFIG_STM32MP25X flag usage
Patrice Chotard [Tue, 9 Jan 2024 14:00:17 +0000 (15:00 +0100)]
stm32mp2: Fix CONFIG_STM32MP25X flag usage

"#if" was used instead of "#ifdef"

Fixes: 01a701994b05 ("stm32mp2: initial support")
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
11 months agostm32mp: Add dependencies on CMDLINE for command stm32key
Patrick Delaunay [Mon, 15 Jan 2024 13:30:54 +0000 (14:30 +0100)]
stm32mp: Add dependencies on CMDLINE for command stm32key

We cannot use stm32key commands without CONFIG_CMDLINE so add the
required condition.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
11 months agoARM: stm32: Set stdio to serial on DH STM32MP15xx DHSOM
Marek Vasut [Sat, 13 Jan 2024 17:57:27 +0000 (18:57 +0100)]
ARM: stm32: Set stdio to serial on DH STM32MP15xx DHSOM

In case CONSOLE_MUX and SYS_CONSOLE_IS_IN_ENV are enabled, the console
stdin, stdout, stderr must be defined in environment. Define the default
settings to fix the following warning on boot:

"
In:    No input devices available!
Out:   No output devices available!
Err:   No error devices available!
"

Sort the default environment as well.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
11 months agoMerge branch '2024-01-18-assorted-fixes'
Tom Rini [Fri, 19 Jan 2024 13:46:47 +0000 (08:46 -0500)]
Merge branch '2024-01-18-assorted-fixes'

- A number of OS boot related cleanups, a number of TI platform
  fixes/cleanups, SMBIOS fixes, tweak get_maintainers.pl to report me
  for more places, fix the "clean the build" pytest and add a bootstage
  pytest, fix PKCS11 URI being omitted in some valid cases, make an iommu
  problem easier to debug on new platforms, nvme and pci improvements,
  refactor image-host code a bit, fix a typo in env setting, add a missing
  dependency for CMD_LICENSE, and correct how we call getchar() in some
  places.

11 months agoarm: Rename STM32MP15x
Patrick Delaunay [Mon, 15 Jan 2024 14:05:57 +0000 (15:05 +0100)]
arm: Rename STM32MP15x

CONFIG options must not use lower-case letter. Convert this and related
ones to upper case.

Signed-off-by: Simon Glass <sjg@chromium.org
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
11 months agoarm: Rename STM32MP13x
Patrick Delaunay [Mon, 15 Jan 2024 14:05:56 +0000 (15:05 +0100)]
arm: Rename STM32MP13x

CONFIG options must not use lower-case letter. Convert this and related
ones to upper case.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@foundries.io>
11 months agoboard: st: stm32mp2: display the board identification
Patrick Delaunay [Mon, 15 Jan 2024 14:05:55 +0000 (15:05 +0100)]
board: st: stm32mp2: display the board identification

Add the display of the STMicroelectronics board identification saved in OTP
in stm32mp2 checkboard function.

Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
11 months agoboard: st: stm32mp2: add checkboard
Patrick Delaunay [Mon, 15 Jan 2024 14:05:54 +0000 (15:05 +0100)]
board: st: stm32mp2: add checkboard

Implement the weak function checkboard to identify the used board with
compatible in device tree for the support of stm32mp2 STMicroelectronics
boards.

Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
11 months agostm32mp: activate the command stboard for stm32mp25 boards
Patrick Delaunay [Mon, 15 Jan 2024 14:05:53 +0000 (15:05 +0100)]
stm32mp: activate the command stboard for stm32mp25 boards

Activate the command stboard for stm32mp25 STMicroelectronics boards,
add the default used OTP identifier and the associated board identifier:
- stm32mp25xx-ev1 = MB1936
- stm32mp25xx-dk = MB1605

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
11 months agostm32mp: stm32prog: add support of stm32mp25
Patrick Delaunay [Mon, 15 Jan 2024 14:05:52 +0000 (15:05 +0100)]
stm32mp: stm32prog: add support of stm32mp25

Change OTP number to 364 for STM32MP25 as it is done in bsec driver.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
11 months agosmt32mp: add setup_mac_address for stm32mp25
Patrick Delaunay [Mon, 15 Jan 2024 14:05:51 +0000 (15:05 +0100)]
smt32mp: add setup_mac_address for stm32mp25

Add a function setup_mac_address() to update the MAC address from the
default location in OTP for stm32mp2 platform.

The max number of OTP for MAC address is increased to 8 for STM32MP25,
defined with get_eth_nb() and checked in setup_mac_address.

The MAC address FF:FF:FF:FF:FF:FF, the broadcast ethaddr, is a invalid
value used for unused MAC address slot in OTP, for example for board
with STM32MP25x part number allows up to 5 ethernet ports but it is not
supported by the hardware, without switch; the associated variable
"enetaddr%d" is not created.

Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
11 months agostm32mp: add setup_serial_number for stm32mp25
Patrice Chotard [Mon, 15 Jan 2024 14:05:50 +0000 (15:05 +0100)]
stm32mp: add setup_serial_number for stm32mp25

Add support of serial number for stm32mp25, gets from OTP with BSEC driver.

Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@foundries.io>
11 months agostm32mp: add soc.c file
Patrick Delaunay [Mon, 15 Jan 2024 14:05:49 +0000 (15:05 +0100)]
stm32mp: add soc.c file

Add a new file soc.c for common functions between stm32mp1 and stm32mp2
family and move print_cpuinfo() in this new file.

Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@foundries.io>
11 months agoconfigs: stm32mp25: add support of fuse command
Patrick Delaunay [Mon, 15 Jan 2024 14:05:48 +0000 (15:05 +0100)]
configs: stm32mp25: add support of fuse command

Add support of the command fuse with CONFIG_CMD_FUSE to allow access
on OTP with command line.

Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
11 months agostm32mp: bsec: add support of stm32mp25
Patrick Delaunay [Mon, 15 Jan 2024 14:05:47 +0000 (15:05 +0100)]
stm32mp: bsec: add support of stm32mp25

Add support of BSEC for STM32MP25x family to access OTP.

Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
11 months agostm32mp: bsec: add driver data
Patrick Delaunay [Mon, 15 Jan 2024 14:05:46 +0000 (15:05 +0100)]
stm32mp: bsec: add driver data

Add driver data in  BSEC driver to test presence of OP-TEE TA,
mandatory for STM32MP13 family and prepare the support of new device
with more OTP than 95.

Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
11 months agoarm: stm32mp: add Rev.B support for STM32MP25
Yann Gautier [Mon, 15 Jan 2024 14:05:45 +0000 (15:05 +0100)]
arm: stm32mp: add Rev.B support for STM32MP25

Add chip revision B support for STM32MP25, for displaying it in trace.

Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
11 months agoarm64: dts: st: add bsec support to stm32mp25
Patrick Delaunay [Mon, 15 Jan 2024 14:05:44 +0000 (15:05 +0100)]
arm64: dts: st: add bsec support to stm32mp25

Add BSEC support to STM32MP25 SoC family with SoC information:
- RPN = Device part number (BSEC_OTP_DATA9)
- PKG = package data register (Bits 2:0 of BSEC_OTP_DATA122)

Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
11 months agoARM: dts: stm32: Fix reset for usart1 in scmi configuration
Patrice Chotard [Thu, 4 Jan 2024 12:37:50 +0000 (13:37 +0100)]
ARM: dts: stm32: Fix reset for usart1 in scmi configuration

In SCMI configuration, usart1 is secure, so all its resources are secured
(clock and reset) and can't be set/unset by non-secure world but by OP-TEE.

Fixes: 6cccc8d396bf ("ARM: dts: stm32: add SCMI version of STM32 boards (DK1/DK2/ED1/EV1)")
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
11 months agoMerge tag 'u-boot-rockchip-20240119' of https://source.denx.de/u-boot/custodians...
Tom Rini [Fri, 19 Jan 2024 13:02:58 +0000 (08:02 -0500)]
Merge tag 'u-boot-rockchip-20240119' of https://source.denx.de/u-boot/custodians/u-boot-rockchip

- Add board: rk3328 FriendlyARM NanoPi R2C Plus, rk3588 Turing RK1 SoM;
- Enable SPI boot for rk3588 and rk3528;
- Set boot device in SPL as common code;
- other misc fixes;