From: Michael Walle Date: Wed, 13 Oct 2021 16:14:27 +0000 (+0200) Subject: arm: dts: sl28: sync dtbs X-Git-Url: http://git.dujemihanovic.xyz/posts?a=commitdiff_plain;h=c7155d29fb041143e33e0b2d691699e614d84936;p=u-boot.git arm: dts: sl28: sync dtbs Copy the board device tree files from linux v5.14. On top of the v5.14 dtbs the changes of these two patches are included here which are needed for u-boot: https://lore.kernel.org/linux-devicetree/20210831134013.1625527-7-michael@walle.cc/ https://lore.kernel.org/linux-devicetree/20210831134013.1625527-8-michael@walle.cc/ At the time of this writing the patches were accepted and will be included in 5.15. Signed-off-by: Michael Walle Reviewed-by: Vladimir Oltean Reviewed-by: Priyanka Jain --- diff --git a/arch/arm/dts/fsl-ls1028a-kontron-sl28-u-boot.dtsi b/arch/arm/dts/fsl-ls1028a-kontron-sl28-u-boot.dtsi index 37382e09f1..d4b833284e 100644 --- a/arch/arm/dts/fsl-ls1028a-kontron-sl28-u-boot.dtsi +++ b/arch/arm/dts/fsl-ls1028a-kontron-sl28-u-boot.dtsi @@ -4,12 +4,9 @@ / { aliases { - mmc0 = &esdhc1; - mmc1 = &esdhc; i2c0 = &i2c0; i2c1 = &i2c3; i2c2 = &i2c4; - rtc0 = &rtc; ethernet2 = &enetc_port2; ethernet3 = &enetc_port3; }; @@ -265,11 +262,6 @@ }; #endif -&i2c0 { - rtc: rtc@32 { - }; -}; - &fspi { u-boot,dm-pre-reloc; flash@0 { @@ -310,6 +302,10 @@ status = "okay"; }; +&sata { + status = "okay"; +}; + &soc { u-boot,dm-pre-reloc; }; diff --git a/arch/arm/dts/fsl-ls1028a-kontron-sl28-var1.dts b/arch/arm/dts/fsl-ls1028a-kontron-sl28-var1.dts index ba2e4de96d..7cd29ab970 100644 --- a/arch/arm/dts/fsl-ls1028a-kontron-sl28-var1.dts +++ b/arch/arm/dts/fsl-ls1028a-kontron-sl28-var1.dts @@ -8,7 +8,7 @@ * None of the four SerDes lanes are used by the module, instead they are * all led out to the carrier for customer use. * - * Copyright (C) 2020 Michael Walle + * Copyright (C) 2021 Michael Walle * */ @@ -21,28 +21,17 @@ compatible = "kontron,sl28-var1", "kontron,sl28", "fsl,ls1028a"; }; -&enetc_port0 { - status = "disabled"; - /delete-property/ phy-handle; -}; - -&enetc_port1 { - phy-handle = <&phy0>; - phy-mode = "rgmii-id"; - status = "okay"; -}; - -/delete-node/ &phy0; &enetc_mdio_pf3 { + /* Delete unused phy node */ + /delete-node/ ethernet-phy@5; + phy0: ethernet-phy@4 { reg = <0x4>; eee-broken-1000t; eee-broken-100tx; - qca,clk-out-frequency = <125000000>; qca,clk-out-strength = ; qca,keep-pll-enabled; - vddio-supply = <&vddio>; vddio: vddio-regulator { @@ -56,3 +45,15 @@ }; }; }; + +&enetc_port0 { + status = "disabled"; + /* Delete the phy-handle to the old phy0 label */ + /delete-property/ phy-handle; +}; + +&enetc_port1 { + phy-handle = <&phy0>; + phy-mode = "rgmii-id"; + status = "okay"; +}; diff --git a/arch/arm/dts/fsl-ls1028a-kontron-sl28-var2-u-boot.dtsi b/arch/arm/dts/fsl-ls1028a-kontron-sl28-var2-u-boot.dtsi index 4e0ce3f77d..c010ea0dc7 100644 --- a/arch/arm/dts/fsl-ls1028a-kontron-sl28-var2-u-boot.dtsi +++ b/arch/arm/dts/fsl-ls1028a-kontron-sl28-var2-u-boot.dtsi @@ -7,3 +7,11 @@ ethernet1 = &mscc_felix_port1; }; }; + +&mscc_felix_port0 { + label = "gbe0"; +}; + +&mscc_felix_port1 { + label = "gbe1"; +}; diff --git a/arch/arm/dts/fsl-ls1028a-kontron-sl28-var2.dts b/arch/arm/dts/fsl-ls1028a-kontron-sl28-var2.dts index db80874f4e..330e34f933 100644 --- a/arch/arm/dts/fsl-ls1028a-kontron-sl28-var2.dts +++ b/arch/arm/dts/fsl-ls1028a-kontron-sl28-var2.dts @@ -2,10 +2,10 @@ /* * Device Tree file for the Kontron SMARC-sAL28 board. * - * This is for the network variant 2 which has no ethernet support in the - * bootloader. + * This is for the network variant 2 which has two ethernet ports. These + * ports are connected to the internal switch. * - * Copyright (C) 2020 Michael Walle + * Copyright (C) 2021 Michael Walle * */ @@ -17,8 +17,21 @@ compatible = "kontron,sl28-var2", "kontron,sl28", "fsl,ls1028a"; }; +&enetc_mdio_pf3 { + phy1: ethernet-phy@4 { + reg = <0x4>; + eee-broken-1000t; + eee-broken-100tx; + }; +}; + &enetc_port0 { status = "disabled"; + /* + * In the base device tree the PHY at address 5 was assigned for + * this port. On this module this PHY is connected to a switch + * port instead. Therefore, delete the phy-handle property here. + */ /delete-property/ phy-handle; }; @@ -31,14 +44,16 @@ }; &mscc_felix_port0 { - label = "gbe0"; + label = "swp0"; + managed = "in-band-status"; phy-handle = <&phy0>; phy-mode = "sgmii"; status = "okay"; }; &mscc_felix_port1 { - label = "gbe1"; + label = "swp1"; + managed = "in-band-status"; phy-handle = <&phy1>; phy-mode = "sgmii"; status = "okay"; @@ -48,18 +63,3 @@ ethernet = <&enetc_port2>; status = "okay"; }; - -/delete-node/ &phy0; -&enetc_mdio_pf3 { - phy0: ethernet-phy@5 { - reg = <0x5>; - eee-broken-1000t; - eee-broken-100tx; - }; - - phy1: ethernet-phy@4 { - reg = <0x4>; - eee-broken-1000t; - eee-broken-100tx; - }; -}; diff --git a/arch/arm/dts/fsl-ls1028a-kontron-sl28-var4.dts b/arch/arm/dts/fsl-ls1028a-kontron-sl28-var4.dts index 54d12ab992..9b5e92fb75 100644 --- a/arch/arm/dts/fsl-ls1028a-kontron-sl28-var4.dts +++ b/arch/arm/dts/fsl-ls1028a-kontron-sl28-var4.dts @@ -5,7 +5,7 @@ * This is for the network variant 4 which has two ethernet ports. It * extends the base and provides one more port connected via RGMII. * - * Copyright (C) 2019 Michael Walle + * Copyright (C) 2021 Michael Walle * */ @@ -18,22 +18,14 @@ compatible = "kontron,sl28-var4", "kontron,sl28", "fsl,ls1028a"; }; -&enetc_port1 { - phy-handle = <&phy1>; - phy-mode = "rgmii-id"; - status = "okay"; -}; - &enetc_mdio_pf3 { phy1: ethernet-phy@4 { reg = <0x4>; eee-broken-1000t; eee-broken-100tx; - qca,clk-out-frequency = <125000000>; qca,clk-out-strength = ; qca,keep-pll-enabled; - vddio-supply = <&vddio>; vddio: vddio-regulator { @@ -47,3 +39,9 @@ }; }; }; + +&enetc_port1 { + phy-handle = <&phy1>; + phy-mode = "rgmii-id"; + status = "okay"; +}; diff --git a/arch/arm/dts/fsl-ls1028a-kontron-sl28.dts b/arch/arm/dts/fsl-ls1028a-kontron-sl28.dts index 9ae70ba541..ab713b4949 100644 --- a/arch/arm/dts/fsl-ls1028a-kontron-sl28.dts +++ b/arch/arm/dts/fsl-ls1028a-kontron-sl28.dts @@ -2,23 +2,61 @@ /* * Device Tree file for the Kontron SMARC-sAL28 board. * - * Copyright (C) 2019 Michael Walle + * Copyright (C) 2021 Michael Walle * */ /dts-v1/; #include "fsl-ls1028a.dtsi" +#include +#include +#include / { model = "Kontron SMARC-sAL28"; compatible = "kontron,sl28", "fsl,ls1028a"; aliases { + crypto = &crypto; serial0 = &duart0; serial1 = &duart1; serial2 = &lpuart1; spi0 = &fspi; spi1 = &dspi2; + mmc0 = &esdhc1; + mmc1 = &esdhc; + rtc0 = &rtc; + rtc1 = &ftm_alarm0; + }; + + buttons0 { + compatible = "gpio-keys"; + + power-button { + interrupts-extended = <&sl28cpld_intc + 4 IRQ_TYPE_EDGE_BOTH>; + linux,code = ; + label = "Power"; + }; + + sleep-button { + interrupts-extended = <&sl28cpld_intc + 5 IRQ_TYPE_EDGE_BOTH>; + linux,code = ; + label = "Sleep"; + }; + }; + + buttons1 { + compatible = "gpio-keys-polled"; + poll-interval = <200>; + + lid-switch { + linux,input-type = ; + linux,code = ; + gpios = <&sl28cpld_gpio3 4 GPIO_ACTIVE_LOW>; + label = "Lid"; + }; }; chosen { @@ -26,22 +64,35 @@ }; }; +&can0 { + status = "okay"; +}; + &dspi2 { status = "okay"; }; -&enetc_port0 { - phy-handle = <&phy0>; - phy-mode = "sgmii"; +&duart0 { + status = "okay"; +}; + +&duart1 { status = "okay"; }; -&enetc_port2 { - status = "disabled"; +&enetc_mdio_pf3 { + phy0: ethernet-phy@5 { + reg = <0x5>; + eee-broken-1000t; + eee-broken-100tx; + }; }; -&enetc_port3 { - status = "disabled"; +&enetc_port0 { + phy-handle = <&phy0>; + phy-mode = "sgmii"; + managed = "in-band-status"; + status = "okay"; }; &esdhc { @@ -63,8 +114,6 @@ status = "okay"; flash@0 { - #address-cells = <1>; - #size-cells = <1>; compatible = "jedec,spi-nor"; m25p,fast-read; spi-max-frequency = <133000000>; @@ -72,17 +121,167 @@ /* The following setting enables 1-1-2 (CMD-ADDR-DATA) mode */ spi-rx-bus-width = <2>; /* 2 SPI Rx lines */ spi-tx-bus-width = <1>; /* 1 SPI Tx line */ + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + reg = <0x000000 0x010000>; + label = "rcw"; + read-only; + }; + + partition@10000 { + reg = <0x010000 0x1d0000>; + label = "failsafe bootloader"; + read-only; + }; + + partition@200000 { + reg = <0x200000 0x010000>; + label = "configuration store"; + }; + + partition@210000 { + reg = <0x210000 0x1d0000>; + label = "bootloader"; + }; + + partition@3e0000 { + reg = <0x3e0000 0x020000>; + label = "bootloader environment"; + }; + }; }; }; +&gpio1 { + gpio-line-names = + "", "", "", "", "", "", "", "", + "", "", "", "", "", "", "", "", + "", "", "", "", "", "", "TDO", "TCK", + "", "", "", "", "", "", "", ""; +}; + +&gpio2 { + gpio-line-names = + "", "", "", "", "", "", "TMS", "TDI", + "", "", "", "", "", "", "", "", + "", "", "", "", "", "", "", "", + "", "", "", "", "", "", "", ""; +}; + &i2c0 { status = "okay"; - rtc@32 { + rtc: rtc@32 { compatible = "microcrystal,rv8803"; reg = <0x32>; }; + sl28cpld@4a { + compatible = "kontron,sl28cpld"; + reg = <0x4a>; + #address-cells = <1>; + #size-cells = <0>; + + watchdog@4 { + compatible = "kontron,sl28cpld-wdt"; + reg = <0x4>; + kontron,assert-wdt-timeout-pin; + }; + + hwmon@b { + compatible = "kontron,sl28cpld-fan"; + reg = <0xb>; + }; + + sl28cpld_pwm0: pwm@c { + compatible = "kontron,sl28cpld-pwm"; + reg = <0xc>; + #pwm-cells = <2>; + }; + + sl28cpld_pwm1: pwm@e { + compatible = "kontron,sl28cpld-pwm"; + reg = <0xe>; + #pwm-cells = <2>; + }; + + sl28cpld_gpio0: gpio@10 { + compatible = "kontron,sl28cpld-gpio"; + reg = <0x10>; + interrupts-extended = <&gpio2 6 + IRQ_TYPE_EDGE_FALLING>; + + gpio-controller; + #gpio-cells = <2>; + gpio-line-names = + "GPIO0_CAM0_PWR_N", "GPIO1_CAM1_PWR_N", + "GPIO2_CAM0_RST_N", "GPIO3_CAM1_RST_N", + "GPIO4_HDA_RST_N", "GPIO5_PWM_OUT", + "GPIO6_TACHIN", "GPIO7"; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + sl28cpld_gpio1: gpio@15 { + compatible = "kontron,sl28cpld-gpio"; + reg = <0x15>; + interrupts-extended = <&gpio2 6 + IRQ_TYPE_EDGE_FALLING>; + + gpio-controller; + #gpio-cells = <2>; + gpio-line-names = + "GPIO8", "GPIO9", "GPIO10", "GPIO11", + "", "", "", ""; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + sl28cpld_gpio2: gpio@1a { + compatible = "kontron,sl28cpld-gpo"; + reg = <0x1a>; + + gpio-controller; + #gpio-cells = <2>; + gpio-line-names = + "LCD0 voltage enable", + "LCD0 backlight enable", + "eMMC reset", "LVDS bridge reset", + "LVDS bridge power-down", + "SDIO power enable", + "", ""; + }; + + sl28cpld_gpio3: gpio@1b { + compatible = "kontron,sl28cpld-gpi"; + reg = <0x1b>; + + gpio-controller; + #gpio-cells = <2>; + gpio-line-names = + "Power button", "Force recovery", "Sleep", + "Battery low", "Lid state", "Charging", + "Charger present", ""; + }; + + sl28cpld_intc: interrupt-controller@1c { + compatible = "kontron,sl28cpld-intc"; + reg = <0x1c>; + interrupts-extended = <&gpio2 6 + IRQ_TYPE_EDGE_FALLING>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + }; + eeprom@50 { compatible = "atmel,24c32"; reg = <0x50>; @@ -107,32 +306,3 @@ &lpuart1 { status = "okay"; }; - -&enetc_mdio_pf3 { - status = "okay"; - phy0: ethernet-phy@5 { - reg = <0x5>; - eee-broken-1000t; - eee-broken-100tx; - }; -}; - -&sata { - status = "okay"; -}; - -&duart0 { - status = "okay"; -}; - -&duart1 { - status = "okay"; -}; - -&usb0 { - status = "okay"; -}; - -&usb1 { - status = "okay"; -};