From e997d30be85d9e16d47e17dcc352b3c6e71966d0 Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Fri, 27 Dec 2019 11:40:55 +0800 Subject: [PATCH] imx: imx8m: add 1GHz fracpll entry 4000MTS DDR needs 1GHz fracpll, so add the entry Signed-off-by: Peng Fan --- arch/arm/mach-imx/imx8m/clock_imx8mm.c | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/mach-imx/imx8m/clock_imx8mm.c b/arch/arm/mach-imx/imx8m/clock_imx8mm.c index ee44ba75fe..68575a2bd3 100644 --- a/arch/arm/mach-imx/imx8m/clock_imx8mm.c +++ b/arch/arm/mach-imx/imx8m/clock_imx8mm.c @@ -50,6 +50,7 @@ int enable_i2c_clk(unsigned char enable, unsigned i2c_num) #ifdef CONFIG_SPL_BUILD static struct imx_int_pll_rate_table imx8mm_fracpll_tbl[] = { + PLL_1443X_RATE(1000000000U, 250, 3, 1, 0), PLL_1443X_RATE(800000000U, 300, 9, 0, 0), PLL_1443X_RATE(750000000U, 250, 8, 0, 0), PLL_1443X_RATE(650000000U, 325, 3, 2, 0), -- 2.39.5