From a9961e5acd5f918a4bf145a1f8b8df061fffe9c7 Mon Sep 17 00:00:00 2001 From: Weijie Gao Date: Tue, 23 Feb 2021 15:12:44 +0800 Subject: [PATCH] mips: mt7628: fix ddr_type for MT7688KN The MT7688KN is a multi-chip package with 8MiB DDR1 KGD. So the DDR type from bootstrap register must be ignored, and always be assumed as DDR1. This patch fixes an issue that mt7628_ddr_pad_ldo_config() may be passed with a wrong ddr_type in MT7688KN. Signed-off-by: Weijie Gao Reviewed-by: Stefan Roese --- arch/mips/mach-mtmips/mt7628/ddr.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/mips/mach-mtmips/mt7628/ddr.c b/arch/mips/mach-mtmips/mt7628/ddr.c index b091f2ecff..4e72459906 100644 --- a/arch/mips/mach-mtmips/mt7628/ddr.c +++ b/arch/mips/mach-mtmips/mt7628/ddr.c @@ -140,6 +140,9 @@ void mt7628_ddr_init(void) lspd = readl(sysc + SYSCTL_CLKCFG0_REG) & (CPU_PLL_FROM_BBP | CPU_PLL_FROM_XTAL); + if (pkg_type == PKG_ID_KN) + ddr_type = DRAM_DDR1; + mt7628_memc_reset(1); __udelay(200); @@ -152,9 +155,6 @@ void mt7628_ddr_init(void) param.memsize = 0; param.bus_width = 0; - if (pkg_type == PKG_ID_KN) - ddr_type = DRAM_DDR1; - if (ddr_type == DRAM_DDR1) { if (lspd) param.cfgs = ddr1_cfgs_160mhz; -- 2.39.5