From 76c72930f917ab348ff08d28a96b827d1626cb3a Mon Sep 17 00:00:00 2001 From: =?utf8?q?Pali=20Roh=C3=A1r?= Date: Thu, 13 Apr 2023 22:41:44 +0200 Subject: [PATCH] pci: mpc85xx: Add missing sync() after writing to PCI config space MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit On PowerPC we should use barrier after store operation to HW register. Signed-off-by: Pali Rohár Reviewed-by: Heiko Schocher Tested-by: Heiko Schocher --- drivers/pci/pci_mpc85xx.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/pci/pci_mpc85xx.c b/drivers/pci/pci_mpc85xx.c index 8a81a74067..23f14db830 100644 --- a/drivers/pci/pci_mpc85xx.c +++ b/drivers/pci/pci_mpc85xx.c @@ -41,6 +41,7 @@ static int mpc85xx_pci_dm_write_config(struct udevice *dev, pci_dev_t bdf, out_be32(priv->cfg_addr, addr); sync(); out_le32(priv->cfg_data, pci_conv_size_to_32(0, value, offset, size)); + sync(); return 0; } -- 2.39.5