From 3d3fe8b12d1973b207ee0406709ff521eec83bf7 Mon Sep 17 00:00:00 2001 From: Michael Walle Date: Mon, 1 Jun 2020 21:53:26 +0200 Subject: [PATCH] armv8: layerscape: properly use CPU_RELEASE_ADDR The generic armv8 code already has support to bring up the secondary cores. Thus, don't hardcode the jump in the layerscape lowlevel_init to the spin table code; instead just return early and let the common armv8 code handle the jump. This way we can actually use the CPU_RELEASE_ADDR feature. Signed-off-by: Michael Walle [Rebased, Removed kontron_sl28.h change as file does not exist] Signed-off-by: Priyanka Jain --- arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S | 14 ++++++++++++-- arch/arm/include/asm/arch-fsl-layerscape/mp.h | 1 - include/configs/ls1028a_common.h | 2 +- include/configs/ls1043a_common.h | 2 +- include/configs/ls1046a_common.h | 2 +- include/configs/ls1088a_common.h | 2 +- include/configs/ls2080a_common.h | 2 +- include/configs/lx2160a_common.h | 2 +- 8 files changed, 18 insertions(+), 9 deletions(-) diff --git a/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S b/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S index 2a8d592cc5..d75013eb9c 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S +++ b/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S @@ -208,8 +208,13 @@ ENTRY(lowlevel_init) branch_if_master x0, x1, 2f #if defined(CONFIG_MP) && defined(CONFIG_ARMV8_MULTIENTRY) - ldr x0, =secondary_boot_func - blr x0 + /* + * Formerly, here was a jump to secondary_boot_func, but we just + * return early here and let the generic code in start.S handle + * the jump to secondary_boot_func. + */ + mov lr, x29 /* Restore LR */ + ret #endif 2: @@ -421,6 +426,11 @@ ENDPROC(__asm_flush_l3_dcache) #endif /* CONFIG_SYS_FSL_HAS_CCN504 */ #ifdef CONFIG_MP + .align 3 + .global secondary_boot_addr +secondary_boot_addr: + .quad secondary_boot_func + /* Keep literals not used by the secondary boot code outside it */ .ltorg diff --git a/arch/arm/include/asm/arch-fsl-layerscape/mp.h b/arch/arm/include/asm/arch-fsl-layerscape/mp.h index 00aa91b0a2..623977651a 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/mp.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/mp.h @@ -43,7 +43,6 @@ static inline int fsl_layerscape_wake_seconday_cores(void) { return 0; } #endif void *get_spin_tbl_addr(void); phys_addr_t determine_mp_bootpg(void); -void secondary_boot_func(void); int is_core_online(u64 cpu_id); u32 cpu_pos_mask(void); #endif diff --git a/include/configs/ls1028a_common.h b/include/configs/ls1028a_common.h index fe4a87b697..4863fb2b64 100644 --- a/include/configs/ls1028a_common.h +++ b/include/configs/ls1028a_common.h @@ -28,7 +28,7 @@ /* * SMP Definitinos */ -#define CPU_RELEASE_ADDR secondary_boot_func +#define CPU_RELEASE_ADDR secondary_boot_addr /* Generic Timer Definitions */ #define COUNTER_FREQUENCY 25000000 /* 25MHz */ diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h index 3efac1fa78..1271d70610 100644 --- a/include/configs/ls1043a_common.h +++ b/include/configs/ls1043a_common.h @@ -47,7 +47,7 @@ #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_SYS_DDR_BLOCK2_BASE 0x880000000ULL -#define CPU_RELEASE_ADDR secondary_boot_func +#define CPU_RELEASE_ADDR secondary_boot_addr /* Generic Timer Definitions */ #define COUNTER_FREQUENCY 25000000 /* 25MHz */ diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h index 8fe6937dfb..5899e32c21 100644 --- a/include/configs/ls1046a_common.h +++ b/include/configs/ls1046a_common.h @@ -48,7 +48,7 @@ #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_SYS_DDR_BLOCK2_BASE 0x880000000ULL -#define CPU_RELEASE_ADDR secondary_boot_func +#define CPU_RELEASE_ADDR secondary_boot_addr /* Generic Timer Definitions */ #define COUNTER_FREQUENCY 25000000 /* 25MHz */ diff --git a/include/configs/ls1088a_common.h b/include/configs/ls1088a_common.h index 3ea16752de..5b83e61ab2 100644 --- a/include/configs/ls1088a_common.h +++ b/include/configs/ls1088a_common.h @@ -48,7 +48,7 @@ /* * SMP Definitinos */ -#define CPU_RELEASE_ADDR secondary_boot_func +#define CPU_RELEASE_ADDR secondary_boot_addr /* Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2048 * 1024) diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h index 410872dfd8..d93ff291bd 100644 --- a/include/configs/ls2080a_common.h +++ b/include/configs/ls2080a_common.h @@ -42,7 +42,7 @@ /* * SMP Definitinos */ -#define CPU_RELEASE_ADDR secondary_boot_func +#define CPU_RELEASE_ADDR secondary_boot_addr #define CONFIG_SYS_FSL_OTHER_DDR_NUM_CTRLS #ifdef CONFIG_SYS_FSL_HAS_DP_DDR diff --git a/include/configs/lx2160a_common.h b/include/configs/lx2160a_common.h index 9bc287f7aa..0c3d683551 100644 --- a/include/configs/lx2160a_common.h +++ b/include/configs/lx2160a_common.h @@ -52,7 +52,7 @@ #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000) /* SMP Definitinos */ -#define CPU_RELEASE_ADDR secondary_boot_func +#define CPU_RELEASE_ADDR secondary_boot_addr /* Generic Timer Definitions */ /* -- 2.39.5