From 21385adf2cdf7d21703e9e90c57e648a16ee0f57 Mon Sep 17 00:00:00 2001 From: William Zhang Date: Fri, 5 Aug 2022 18:25:13 -0700 Subject: [PATCH] arm: bcmbca: add bcm63138 SoC support BCM63138 is an ARM A9 based DSL Broadband SoC. It is part of the BCA (Broadband Carrier Access origin) chipset family so it's added under ARCH_BCMBCA platform. This initial support includes a bare-bone implementation and dts with CPU subsystem, memory, ARM A9 global timer and Broadcom uart. This SoC is supported in the linux-next git repository so the dts and dtsi files are stripped down version of linux copies with mininum blocks needed by u-boot. The u-boot image can be loaded from flash or network to the entry point address in the memory and boot from there to the console. This patch applies on top of the my previous patch [1]. [1] https://lists.denx.de/pipermail/u-boot/2022-August/490570.html Signed-off-by: William Zhang Reviewed-by: Florian Fainelli Reviewed-by: Philippe Reynes --- MAINTAINERS | 1 + arch/arm/dts/Makefile | 2 + arch/arm/dts/bcm63138.dtsi | 149 +++++++++++++++++++++++++ arch/arm/dts/bcm963138.dts | 30 +++++ arch/arm/mach-bcmbca/Kconfig | 9 ++ arch/arm/mach-bcmbca/Makefile | 1 + arch/arm/mach-bcmbca/bcm63138/Kconfig | 17 +++ arch/arm/mach-bcmbca/bcm63138/Makefile | 5 + board/broadcom/bcmbca/Kconfig | 7 ++ configs/bcm963138_defconfig | 22 ++++ include/configs/bcm963138.h | 12 ++ 11 files changed, 255 insertions(+) create mode 100644 arch/arm/dts/bcm63138.dtsi create mode 100644 arch/arm/dts/bcm963138.dts create mode 100644 arch/arm/mach-bcmbca/bcm63138/Kconfig create mode 100644 arch/arm/mach-bcmbca/bcm63138/Makefile create mode 100644 configs/bcm963138_defconfig create mode 100644 include/configs/bcm963138.h diff --git a/MAINTAINERS b/MAINTAINERS index 63d408b367..068fd4c2f3 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -218,6 +218,7 @@ F: arch/arm/mach-bcmbca/ F: board/broadcom/bcmbca/ N: bcmbca N: bcm[9]?47622 +N: bcm[9]?63138 N: bcm[9]?63148 N: bcm[9]?63178 N: bcm[9]?6756 diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 696094641b..a766fa33af 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -1182,6 +1182,8 @@ dtb-$(CONFIG_ARCH_BCMSTB) += bcm7xxx.dtb dtb-$(CONFIG_BCM47622) += \ bcm947622.dtb +dtb-$(CONFIG_BCM63138) += \ + bcm963138.dtb dtb-$(CONFIG_BCM63148) += \ bcm963148.dtb dtb-$(CONFIG_BCM63178) += \ diff --git a/arch/arm/dts/bcm63138.dtsi b/arch/arm/dts/bcm63138.dtsi new file mode 100644 index 0000000000..42b442aec9 --- /dev/null +++ b/arch/arm/dts/bcm63138.dtsi @@ -0,0 +1,149 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Broadcom BCM63138 DSL SoCs Device Tree + */ + +#include +#include + +/ { + compatible = "brcm,bcm63138", "brcm,bcmbca"; + #address-cells = <1>; + #size-cells = <1>; + + interrupt-parent = <&gic>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a9"; + next-level-cache = <&L2>; + reg = <0>; + enable-method = "brcm,bcm63138"; + }; + + cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a9"; + next-level-cache = <&L2>; + reg = <1>; + enable-method = "brcm,bcm63138"; + }; + }; + + clocks { + /* UBUS peripheral clock */ + periph_clk: periph_clk { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <50000000>; + clock-output-names = "periph"; + }; + + /* peripheral clock for system timer */ + axi_clk: axi_clk { + #clock-cells = <0>; + compatible = "fixed-factor-clock"; + clocks = <&armpll>; + clock-div = <2>; + clock-mult = <1>; + }; + + /* APB bus clock */ + apb_clk: apb_clk { + #clock-cells = <0>; + compatible = "fixed-factor-clock"; + clocks = <&armpll>; + clock-div = <4>; + clock-mult = <1>; + }; + }; + + /* ARM bus */ + axi@80000000 { + compatible = "simple-bus"; + ranges = <0 0x80000000 0x784000>; + #address-cells = <1>; + #size-cells = <1>; + + L2: cache-controller@1d000 { + compatible = "arm,pl310-cache"; + reg = <0x1d000 0x1000>; + cache-unified; + cache-level = <2>; + cache-size = <524288>; + cache-sets = <1024>; + cache-line-size = <32>; + interrupts = ; + }; + + scu: scu@1e000 { + compatible = "arm,cortex-a9-scu"; + reg = <0x1e000 0x100>; + }; + + gic: interrupt-controller@1f000 { + compatible = "arm,cortex-a9-gic"; + reg = <0x1f000 0x1000 + 0x1e100 0x100>; + #interrupt-cells = <3>; + #address-cells = <0>; + interrupt-controller; + }; + + global_timer: timer@1e200 { + compatible = "arm,cortex-a9-global-timer"; + reg = <0x1e200 0x20>; + interrupts = ; + clocks = <&axi_clk>; + }; + + local_timer: local-timer@1e600 { + compatible = "arm,cortex-a9-twd-timer"; + reg = <0x1e600 0x20>; + interrupts = ; + clocks = <&axi_clk>; + }; + + twd_watchdog: watchdog@1e620 { + compatible = "arm,cortex-a9-twd-wdt"; + reg = <0x1e620 0x20>; + interrupts = ; + }; + + armpll: armpll@20000 { + #clock-cells = <0>; + compatible = "brcm,bcm63138-armpll"; + clocks = <&periph_clk>; + reg = <0x20000 0xf00>; + }; + }; + + /* Legacy UBUS base */ + bus@fffe8000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0xfffe8000 0x8000>; + + timer0: timer@80 { + compatible = "brcm,bcmbca-periph-timer"; + reg = <0x80 0x28>; + clocks = <&periph_clk>; + }; + + uart0: serial@600 { + compatible = "brcm,bcm6345-uart"; + reg = <0x600 0x20>; + interrupts = ; + clocks = <&periph_clk>; + clock-names = "refclk"; + status = "disabled"; + }; + }; +}; diff --git a/arch/arm/dts/bcm963138.dts b/arch/arm/dts/bcm963138.dts new file mode 100644 index 0000000000..6158a87335 --- /dev/null +++ b/arch/arm/dts/bcm963138.dts @@ -0,0 +1,30 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright 2022 Broadcom Ltd. + */ + +/dts-v1/; + +#include "bcm63138.dtsi" + +/ { + model = "Broadcom BCM963138 Reference Board"; + compatible = "brcm,bcm963138", "brcm,bcm63138", "brcm,bcmbca"; + + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x08000000>; + }; +}; + +&uart0 { + status = "okay"; +}; diff --git a/arch/arm/mach-bcmbca/Kconfig b/arch/arm/mach-bcmbca/Kconfig index 9a29c4186b..785b3df5dc 100644 --- a/arch/arm/mach-bcmbca/Kconfig +++ b/arch/arm/mach-bcmbca/Kconfig @@ -12,6 +12,14 @@ config BCM47622 select DM_SERIAL select PL01X_SERIAL +config BCM63138 + bool "Support for Broadcom 63138 Family" + select TIMER + select STI_TIMER + select CPU_V7A + select DM_SERIAL + select BCM6345_SERIAL + config BCM63148 bool "Support for Broadcom 63148 Family" select SYS_ARCH_TIMER @@ -48,6 +56,7 @@ config BCM6878 select PL01X_SERIAL source "arch/arm/mach-bcmbca/bcm47622/Kconfig" +source "arch/arm/mach-bcmbca/bcm63138/Kconfig" source "arch/arm/mach-bcmbca/bcm63148/Kconfig" source "arch/arm/mach-bcmbca/bcm63178/Kconfig" source "arch/arm/mach-bcmbca/bcm6756/Kconfig" diff --git a/arch/arm/mach-bcmbca/Makefile b/arch/arm/mach-bcmbca/Makefile index 8a22f9ad97..d917615c16 100644 --- a/arch/arm/mach-bcmbca/Makefile +++ b/arch/arm/mach-bcmbca/Makefile @@ -4,6 +4,7 @@ # obj-$(CONFIG_BCM47622) += bcm47622/ +obj-$(CONFIG_BCM63138) += bcm63138/ obj-$(CONFIG_BCM63148) += bcm63148/ obj-$(CONFIG_BCM63178) += bcm63178/ obj-$(CONFIG_BCM6756) += bcm6756/ diff --git a/arch/arm/mach-bcmbca/bcm63138/Kconfig b/arch/arm/mach-bcmbca/bcm63138/Kconfig new file mode 100644 index 0000000000..a34888d231 --- /dev/null +++ b/arch/arm/mach-bcmbca/bcm63138/Kconfig @@ -0,0 +1,17 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# (C) Copyright 2022 Broadcom Ltd +# + +if BCM63138 + +config TARGET_BCM963138 + bool "Broadcom 63138 Reference Board" + depends on ARCH_BCMBCA + +config SYS_SOC + default "bcm63138" + +source "board/broadcom/bcmbca/Kconfig" + +endif diff --git a/arch/arm/mach-bcmbca/bcm63138/Makefile b/arch/arm/mach-bcmbca/bcm63138/Makefile new file mode 100644 index 0000000000..beb979af75 --- /dev/null +++ b/arch/arm/mach-bcmbca/bcm63138/Makefile @@ -0,0 +1,5 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# (C) Copyright 2022 Broadcom Ltd +# +obj- += dummy.o diff --git a/board/broadcom/bcmbca/Kconfig b/board/broadcom/bcmbca/Kconfig index d070ebab70..aefd7372d8 100644 --- a/board/broadcom/bcmbca/Kconfig +++ b/board/broadcom/bcmbca/Kconfig @@ -16,6 +16,13 @@ config SYS_CONFIG_NAME endif +if TARGET_BCM963138 + +config SYS_CONFIG_NAME + default "bcm963138" + +endif + if TARGET_BCM963148 config SYS_CONFIG_NAME diff --git a/configs/bcm963138_defconfig b/configs/bcm963138_defconfig new file mode 100644 index 0000000000..5aec7b8962 --- /dev/null +++ b/configs/bcm963138_defconfig @@ -0,0 +1,22 @@ +CONFIG_ARM=y +CONFIG_ARCH_BCMBCA=y +CONFIG_SYS_TEXT_BASE=0x01000000 +CONFIG_SYS_MALLOC_LEN=0x2000000 +CONFIG_SYS_MALLOC_F_LEN=0x8000 +CONFIG_BCM63138=y +CONFIG_TARGET_BCM963138=y +CONFIG_NR_DRAM_BANKS=1 +CONFIG_DEFAULT_DEVICE_TREE="bcm963138" +CONFIG_IDENT_STRING=" Broadcom BCM63138" +CONFIG_SYS_LOAD_ADDR=0x01000000 +CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000000 +CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_BOOTM_LEN=0x4000000 +CONFIG_CMD_CACHE=y +CONFIG_OF_EMBED=y +CONFIG_CLK=y diff --git a/include/configs/bcm963138.h b/include/configs/bcm963138.h new file mode 100644 index 0000000000..361569a8c5 --- /dev/null +++ b/include/configs/bcm963138.h @@ -0,0 +1,12 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * (C) Copyright 2022 Broadcom Ltd. + */ + +#ifndef __BCM963138_H +#define __BCM963138_H + +#define CONFIG_SYS_SDRAM_BASE 0x00000000 +#define CONFIG_SYS_HZ_CLOCK 500000000 + +#endif -- 2.39.5