From 1d0d25704345aee118a57f9d1e4d71aa21f56e35 Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Thu, 19 Sep 2024 12:01:37 +0800 Subject: [PATCH] imx93_evk: spl: update pmic settings 1. Use runtime voltage selection for LD/OD/ND mode. 2. According to latest PE/TE report, the voltages of VDD_SOC for LD and ND mode need add 50mv margin, so LD voltage is 0.75v->0.8v, ND voltage is 0.8v->0.85v. 3. Use TOFF_DEB to differentiate new trimmed pmic and old pmic Signed-off-by: Peng Fan --- board/freescale/imx93_evk/spl.c | 42 +++++++++++++++++++++++++-------- include/power/pca9450.h | 2 ++ 2 files changed, 34 insertions(+), 10 deletions(-) diff --git a/board/freescale/imx93_evk/spl.c b/board/freescale/imx93_evk/spl.c index 2ad7489ada..503286ce3a 100644 --- a/board/freescale/imx93_evk/spl.c +++ b/board/freescale/imx93_evk/spl.c @@ -62,6 +62,7 @@ int power_init_board(void) { struct udevice *dev; int ret; + unsigned int val = 0, buck_val; ret = pmic_get("pmic@25", &dev); if (ret == -ENODEV) { @@ -77,20 +78,41 @@ int power_init_board(void) /* enable DVS control through PMIC_STBY_REQ */ pmic_reg_write(dev, PCA9450_BUCK1CTRL, 0x59); - if (is_voltage_mode(VOLT_LOW_DRIVE)) - /* 0.75v for Low drive mode - */ - pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS0, 0x0c); - pmic_reg_write(dev, PCA9450_BUCK3OUT_DVS0, 0x0c); + ret = pmic_reg_read(dev, PCA9450_PWR_CTRL); + if (ret < 0) + return ret; + + val = ret; + + if (is_voltage_mode(VOLT_LOW_DRIVE)) { + buck_val = 0x0c; /* 0.8v for Low drive mode */ + printf("PMIC: Low Drive Voltage Mode\n"); + } else if (is_voltage_mode(VOLT_NOMINAL_DRIVE)) { + buck_val = 0x10; /* 0.85v for Nominal drive mode */ + printf("PMIC: Nominal Voltage Mode\n"); + } else { + buck_val = 0x14; /* 0.9v for Over drive mode */ + printf("PMIC: Over Drive Voltage Mode\n"); + } + + if (val & PCA9450_REG_PWRCTRL_TOFF_DEB) { + pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS0, buck_val); + pmic_reg_write(dev, PCA9450_BUCK3OUT_DVS0, buck_val); } else { - /* 0.9v for Over drive mode - */ - pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS0, 0x18); - pmic_reg_write(dev, PCA9450_BUCK3OUT_DVS0, 0x18); + pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS0, buck_val + 0x4); + pmic_reg_write(dev, PCA9450_BUCK3OUT_DVS0, buck_val + 0x4); + } + + if (IS_ENABLED(CONFIG_IMX93_EVK_LPDDR4X)) { + /* Set VDDQ to 1.1V from buck2 */ + pmic_reg_write(dev, PCA9450_BUCK2OUT_DVS0, 0x28); } /* set standby voltage to 0.65v */ - pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS1, 0x4); + if (val & PCA9450_REG_PWRCTRL_TOFF_DEB) + pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS1, 0x0); + else + pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS1, 0x4); /* I2C_LT_EN*/ pmic_reg_write(dev, 0xa, 0x3); diff --git a/include/power/pca9450.h b/include/power/pca9450.h index b8219d535a..f896d829d3 100644 --- a/include/power/pca9450.h +++ b/include/power/pca9450.h @@ -54,6 +54,8 @@ enum { PCA9450_REG_NUM, }; +#define PCA9450_REG_PWRCTRL_TOFF_DEB BIT(5) + int power_pca9450_init(unsigned char bus, unsigned char addr); enum { -- 2.39.5