Dhruva Gole [Fri, 7 Jun 2024 08:56:40 +0000 (14:26 +0530)]
arm: dts: k3: binman: am62a: add support for signing TIFSStub Images
Add support for signing of TIFSSTUB images for HSSE, HSFS and GP devices
and include them in tispl.bin and tispl.bin_unsigned.
This implements the same change as commit 128f81290b7d ("arm: dts: k3:
binman: am625: add support for signing TIFSSTUB Images") did for TI AM62
SK board.
- Support different RAM sizes on imx8m phycoce boards.
- Support new toradex variants.
- Support Samsung 4GB DDR and Realtek RTL8211E PHY on imx8mm-cl-iot-gate.
- Convert imx8mm-phycore and imx8mp-phycore boards to use OF_UPSTREAM.
Benjamin Hahn [Tue, 28 May 2024 13:35:15 +0000 (15:35 +0200)]
board: phycore_imx8mp: enable setting 2GHz timings without RAM size
make it possible to set the RAM timing frequency statically independent
from the RAM size. Fixed RAM timing frequency can be used while the
RAM size is still determined by the EEPROM image.
Signed-off-by: Benjamin Hahn <B.Hahn@phytec.de> Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
Teresa Remmet [Tue, 28 May 2024 13:35:13 +0000 (15:35 +0200)]
board: phytec: phycore_imx8mp: Add support for different RAM sizes
Add support for different RAM sizes and speed grades on the
phyCORE-i.MX8MP.
Add support for 1GB 1.5GHz, 1GB 2GHz, 4GB 1.5GHz,
4GB 2GHz and 8GB 2GHz RAM.
The RAM size and speed grade is detected by the information
stored in the EEPROM on the SoM.
Yannic Moog [Tue, 28 May 2024 11:25:00 +0000 (13:25 +0200)]
arm: imx8mp-phycore: move to OF_UPSTREAM
The PHYCORE_IMX8MP is used by the phyBOARD-Pollux. Migrate board to
OF_UPSTREAM. Linux kernel device tree for the board can be used as is,
corresponding U-Boot device tree files are removed. U-Boot tweaks are
kept unchanged.
Yannic Moog [Tue, 28 May 2024 11:24:59 +0000 (13:24 +0200)]
arm: imx8mm-phycore: move to OF_UPSTREAM
The PHYCORE_IMX8MM is used by the phyBOARD-Polis and the
phyGATE-Tauri-L. Migrate both boards to OF_UPSTREAM. Linux kernel device
trees for both boards can be used as is, corresponding U-Boot device
tree files are removed. U-Boot tweaks are kept unchanged.
Emanuele Ghidoli [Tue, 28 May 2024 09:59:37 +0000 (11:59 +0200)]
board: toradex: verdin-imx8mm: add 4 GB lpddr4 memory support
Add support for MT53E512M32D1ZW-046 IT:C memory.
This 4 GB memory has 17 row bits instead of 16 and requires 380 ns of
tRFC (tRFCab) instead of 280 ns due to increased channel density to 16 Gb.
Both modifications are retro-compatible with previous memories.
Marek Vasut [Sun, 26 May 2024 18:00:25 +0000 (20:00 +0200)]
ARM: dts: renesas: Switch to using upstream DT on Renesas R8A779H0 V4M
Enable OF_UPSTREAM to use upstream DT and add renesas/ prefix to the
DEFAULT_DEVICE_TREE. And thereby directly build DTB from dts/upstream/src/
including *-u-boot.dtsi files from arch/$(ARCH)/dts/ directory.
This patch finalizes OF_UPSTREAM conversion of R8A779H0 V4M which DTs
landed in Linux 6.9 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Acked-by: Sumit Garg <sumit.garg@linaro.org>
Adam Ford [Sat, 1 Jun 2024 14:55:20 +0000 (09:55 -0500)]
configs: rzg2_beacon: Realign ENV location and offset
The ENV size and offset were changed to different
values in Beacon's downstream release. Change them to the
same values as the downstream for consistent behavior.
Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Adam Ford [Sat, 1 Jun 2024 14:55:19 +0000 (09:55 -0500)]
renesas: beacon-rzg2m: Add Marek to MAINTAINER file
Since any changes to the RZ/G2 family go through Marek's tree,
update the MAINTAINER file to automatically show his name
when running get_maintainer.pl. Without this, he is not
copied.
Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 19 May 2024 20:40:07 +0000 (22:40 +0200)]
ARM: dts: renesas: Reserve space in 64bit R-Car DTs
Reserve 4 kiB of space in 64bit R-Car DTs when those DTs are compiled
to permit patching in OpTee-OS /firmware node, /reserved-memory node,
possibly also additional /memory@ nodes and RPC node by TFA.
This duplicates behavior in arch/arm/dts/Makefile with OF_UPSTREAM.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Tom Rini [Thu, 30 May 2024 13:07:51 +0000 (07:07 -0600)]
Merge patch series "omap3: igep0x00: Fix boot failure and modernize the boards support"
Javier Martinez Canillas <javier@dowhile0.org> says:
Hello,
I noticed that the IGEPv2 board did not boot anymore with mainline U-Boot.
This was caused by a driver change to allocate its platform data before
relocation and U-Boot not having enough pre-relocation heap size for this.
This series fixes this issue and also makes the board support more modern,
by enabling DM for SPL and migrating the IGEP boards to use upstream DTBs.
The IGEPv2 board boot started to fail since the commit afd4f15a39de ("spi:
omap3_spi: Read platform data in ofdata_to_platdata()"). Because this made
the OMAP3 SPI controller driver to allocate its platform data before doing
a relocation, but the igep0x00 config sets this pool size to just 1 KiB.
Increase the pre-relocation malloc heap size to 16 KiB, as is set by other
OMAP3 boards. This not only restores booting but also makes it consistent.
Leave the SPL pool size to the previous 1 KiB size since 16 KiB may not be
a possible size in that constrained environment and is also the value that
is set by other OMAP3 boards.
Signed-off-by: Javier Martinez Canillas <javierm@redhat.com> Reviewed-by: Enric Balletbo i Serra <eballetbo@gmail.com>
H Bell [Wed, 22 May 2024 19:12:51 +0000 (19:12 +0000)]
board: starfive: support Pine64 Star64 board
Add documentation files
Signed-off-by: Henry Bell <dmoo_dv@protonmail.com> Cc: ycliang@andestech.com Cc: heinrich.schuchardt@canonical.com Reviewed-by: E Shattow <lucent@gmail.com>
H Bell [Wed, 22 May 2024 19:12:48 +0000 (19:12 +0000)]
board: starfive: support Pine64 Star64 board
Similar to the Milk-V Mars, The Star64 board contains few differences to the
VisionFive 2 boards, so can be part of the same U-boot build.
Signed-off-by: Henry Bell <dmoo_dv@protonmail.com> Cc: ycliang@andestech.com Cc: heinrich.schuchardt@canonical.com Reviewed-by: E Shattow <lucent@gmail.com>
Conor Dooley [Wed, 15 May 2024 15:04:31 +0000 (16:04 +0100)]
board: microchip: icicle: make both ethernets optional
A given AMP configuration for a board may make either one, or neither
of, the ethernet ports available to U-Boot. The Icicle's init code will
fail if mac1 is not present, so move it to the optional approach taken
for mac0.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Conor Dooley [Wed, 15 May 2024 15:04:30 +0000 (16:04 +0100)]
board: microchip: icicle: correct type for node offset
Node offsets returned by libfdt can contain negative error numbers, so
the variable type should be "int". As things stand, if the ethernet
nodes are not found in the early init callback, the if (node < 0) tests
pass and the code errors out while trying to set the local-mac-address
for a non-existent node.
Quentin Schulz [Fri, 24 May 2024 11:46:36 +0000 (13:46 +0200)]
migrate Theobroma Systems mail addresses to CHERRY Embedded Solutions
See
https://embedded.cherry.de/theobroma-systems-is-now-officially-part-of-cherry-se/
While the mail addresses on the theobroma-systems.com domain should be
redirect to cherry.de, let's anticipate IT hiccups and avoid important
mails not reaching us by swapping the domain name wherever appropriate
for the newer one.
Christoph Mueller isn't working at ~Theobroma~ CHERRY Embedded Solutions
anymore, but I don't know his new mail address so mails destined to him
will keep bouncing.
Cc: Heiko Stuebner <heiko.stuebner@cherry.de> <heiko.stuebner@theobroma-systems.com> Cc: Jakob Unterwurzacher <jakob.unterwurzacher@cherry.de> Cc: Klaus Goger <klaus.goger@cherry.de> Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Bryan Brattlof [Thu, 23 May 2024 16:43:20 +0000 (11:43 -0500)]
arm: mach-k3: am62p: Fixup TF-A/OP-TEE reserved-memory node in FDT
The address we load TFA and OPTEE is configurable by the
CONFIG_K3_{ATF,OPTEE)_LOAD_ADDR, but the DT node reservations remain
static which can cause some confusion about where exactly these firmware
are exactly. Fix this by updating the reserved-memory{} nodes when the
loaded address does not match the address in DT.
Reported-by: Andrew Davis <afd@ti.com> Signed-off-by: Bryan Brattlof <bb@ti.com>
Sam Protsenko [Sat, 25 May 2024 21:51:38 +0000 (16:51 -0500)]
arm: dts: e850-96: Remove not needed bootph-all flags
Most of the nodes in e850-96 appended device tree that add bootph-all
flags are not necessary. All those nodes are instantiated as
dependencies of other nodes anyway. Remove those nodes to avoid
cluttering the appended dts. 'bdinfo' reports 768 bytes reduction for
"Early malloc usage", and 'dm tree' output doesn't change. Keep only
pmu_system_controller changes, which are actually needed for serial to
work properly.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Sam Protsenko [Sat, 25 May 2024 21:18:36 +0000 (16:18 -0500)]
arm: exynos: Migrate E850-96 board to OF_UPSTREAM
Use upstream device tree files and bindings. To do so:
- imply (enable) OF_UPSTREAM option for E850-96 target
- point DEFAULT_DEVICE_TREE in E850-96 config to upstream dts
- remove now not needed local dts files, binding docs and headers
- update MAINTAINERS and board/samsung/e850-96/MAINTAINERS
correspondingly
Upstream device tree files for Exynos850 SoC and E850-96 board are
pretty much the same as local (removed) ones, so the conversion is
rather straightforward and painless in this case. The appended dts file
(arch/arm/dts/exynos850-e850-96-u-boot.dtsi) stays unchanged.
The only remaining local dt-bindings doc for E850-96 board is
exynos-pmu.yaml. It wasn't removed as it's quite different from Linux
kernel version. Particularly U-Boot local version of exynos-pmu.yaml
describes "samsung,uart-debug-1" property, which is not present in Linux
kernel binding. Later it might be upstreamed to Linux kernel, and once
it's done the U-Boot exynos-pmu.yaml binding can be removed.
No functional change.
Acked-by: Sumit Garg <sumit.garg@linaro.org> Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Tim Harvey [Sat, 25 May 2024 20:00:49 +0000 (13:00 -0700)]
tpm-v2: allow algorithm name to be configured for pcr_read and pcr_extend
For pcr_read and pcr_extend commands allow the digest algorithm to be
specified by an additional argument. If not specified it will default to
SHA256 for backwards compatibility.
Additionally update test_tpm2.py for the changes in output in pcr_read
which now shows the algo and algo length in the output.
A follow-on to this could be to extend all PCR banks with the detected
algo when the <digest_algo> argument is 'auto'.
Tim Harvey [Wed, 15 May 2024 23:21:38 +0000 (16:21 -0700)]
tpm: display warning if using gpio reset with TPM
Instead of displaying what looks like an error message if a
gpio-reset dt prop is missing for a TPM display a warning that
having a gpio reset on a TPM should not be used for a secure production
device.
TCG TIS spec [1] says:
"The TPM_Init (LRESET#/SPI_RST#) signal MUST be connected to the
platform CPU Reset signal such that it complies with the requirements
specified in section 1.2.7 HOST Platform Reset in the PC Client
Implementation Specification for Conventional BIOS."
The reasoning is that you should not be able to toggle a GPIO and reset
the TPM without resetting the CPU as well because if an attacker can
break into your OS via an OS level security flaw they can then reset the
TPM via GPIO and replay the measurements required to unseal keys
that you have otherwise protected.
Additionally restructure the code for improved readability allowing for
removal of the init label.
Before:
- board with no reset gpio
u-boot=> tpm init && tpm info
tpm_tis_spi_probe: missing reset GPIO
tpm@1 v2.0: VendorID 0x1114, DeviceID 0x3205, RevisionID 0x01 [open]
- board with a reset gpio
u-boot=> tpm init && tpm info
tpm@1 v2.0: VendorID 0x1114, DeviceID 0x3205, RevisionID 0x01 [open]
After:
- board with no reset gpio
u-boot=> tpm init && tpm info
tpm@1 v2.0: VendorID 0x1114, DeviceID 0x3205, RevisionID 0x01 [open]
- board with a reset gpio
u-boot=> tpm init && tpm info
tpm@1: TPM gpio reset should not be used on secure production devices
tpm@1 v2.0: VendorID 0x1114, DeviceID 0x3205, RevisionID 0x01 [open]
Chris Morgan [Fri, 24 May 2024 16:48:00 +0000 (11:48 -0500)]
board: rockchip: Add Indiedroid Nova
The Indiedroid Nova is a Rockchip RK3588S based SBC from Indiedroid.
Specifications:
Rockchip RK3588S SoC
4x ARM Cortex-A76, 4x ARM Cortex-A55
4/8/16GB memory LPDDR4x
Mali G610MC4 GPU
Optional eMMC
2x USB 2.0, 2x USB 3.0, 1x USB 3.0 C port with DP Alt
1x MIPI-CSI Port (4-lane or 2x 2-lane)
1x MIPI-DSI 4-lane connector
1x Micro HDMI 2.1 output, 1x DP 1.4 output
Gigabit Ethernet
Realtek RTL8821CS WiFi
4 pin debug UART connector
40 pin GPIO header
Size: 85mm x 56mm (Raspberry Pi Form Factor)
Kernel commit: 3900160e164b ("arm64: dts: rockchip: Add Indiedroid Nova board")
Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Chris Morgan [Tue, 21 May 2024 15:25:33 +0000 (10:25 -0500)]
board: rockchip: add Powkiddy X55
The Powkiddy X55 is a Rockchip RK3566 based handheld gaming device.
UART, ADC, eMMC, and SDMMC are tested to work in U-Boot and this
successfully boots mainline Linux.
Tom Rini [Fri, 24 May 2024 19:42:07 +0000 (13:42 -0600)]
Merge patch series "FWU: Add support for FWU metadata version 2"
Sughosh Ganu <sughosh.ganu@linaro.org> says:
The following patch series adds support for version 2 of the FWU
metadata. The version 2 metadata structure is defined in the latest
revision of the FWU specification [1].
The earlier versions of these patches were migrating to a version 2
only support in U-Boot, similar to TF-A. However, based on feedback
from ST [2], this series has been updated to support both versions. A
platform would still be needed to enable one of the two versions of
metadata through a config symbol.
TF-A has code which reads the FWU metadata and boots the platform from
the active partition. TF-A has decided to migrate the FWU code to a
version 2 only support. These changes have been merged in upstream
TF-A.
These changes have been tested on the ST DK2 board, which uses the GPT
based partitioning scheme. Both V1 and V2 metadata versions have been
tested on the DK2 board.
These changes need to be tested on platforms with MTD partitioned
storage devices.
Sughosh Ganu [Fri, 22 Mar 2024 10:57:33 +0000 (16:27 +0530)]
configs: fwu: re-enable FWU configs
Now that support for FWU metadata version 2 has been added, the
feature can be enabled on platforms which had enabled it. A new config
symbol for selecting the metadata version for the platform is also
being added.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org> Tested-by: Michal Simek <michal.simek@amd.com>
Sughosh Ganu [Fri, 22 Mar 2024 10:57:29 +0000 (16:27 +0530)]
tools: mkfwumdata: add logic to append vendor data to the FWU metadata
The version 2 of the FWU metadata allows for appending opaque vendor
specific data to the metadata structure. Add support for appending
this data to the metadata. The vendor specific data needs to be
provided through a file, passed through a command-line parameter. Make
corresponding changes to the tool's manpage.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org> Tested-by: Michal Simek <michal.simek@amd.com>
Sughosh Ganu [Fri, 22 Mar 2024 10:57:28 +0000 (16:27 +0530)]
tools: mkfwumdata: add support for metadata version 2
Add support for generating the FWU metadata version 2. The tool now
requires the version to be provided as a command-line option. Make
corresponding changes to the tool's manpage.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org> Tested-by: Michal Simek <michal.simek@amd.com>
Sughosh Ganu [Fri, 22 Mar 2024 10:57:27 +0000 (16:27 +0530)]
cmd: fwu: make changes for supporting FWU metadata version 2
Add support for displaying data specific to FWU metadata version
2. Because the size of the v2 metadata structure is read from the
structure itself, allocate memory for the metadata structure by first
getting the size of the structure.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org> Tested-by: Michal Simek <michal.simek@amd.com>
Sughosh Ganu [Fri, 22 Mar 2024 10:57:26 +0000 (16:27 +0530)]
fwu: mtd: obtain image information from version agnostic structure
Make changes to the functions used for generating the DFU's alt
variable so that the FWU image information is obtained from the common
version agnostic structure instead of reading the metadata.
While here, also update the name of the field used for storing the
image GUID in the FWU metadata.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org> Tested-by: Michal Simek <michal.simek@amd.com>
Sughosh Ganu [Fri, 22 Mar 2024 10:57:25 +0000 (16:27 +0530)]
fwu: mtd: get MTD partition specific info from driver
Information about FWU images on MTD partitions is now stored with the
corresponding driver instead of a global variable. Get this
information from the driver.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org> Tested-by: Michal Simek <michal.simek@amd.com>
Sughosh Ganu [Fri, 22 Mar 2024 10:57:22 +0000 (16:27 +0530)]
capsule: fwu: transition the platform state on a successful update
Transition the platform to either Trial State or Regular State on a
successful update. Do this by calling the fwu_state_machine_updates()
API function.
For version 1 of the FWU metadata, the transition to Trial State is
done by starting the Trial State counter, while for version 2, in
addition to the counter, the bank_state field of the FWU metadata is
also updated to Valid.
For transitioning the platform to Regular State, no action is needed
with version 1 of the FWU metadata structure, while for version 2, the
bank_state field is set to Accepted.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org> Tested-by: Michal Simek <michal.simek@amd.com>
Sughosh Ganu [Fri, 22 Mar 2024 10:57:21 +0000 (16:27 +0530)]
fwu: make changes to access version agnostic structure fields
With addition of support for version 2 of the FWU metadata structure,
the metadata information is collected into a version agnostic
structure. Make changes to the FWU functions so that the information
that was earlier obtained by reading the metadata structure is now
obtained through this version agnostic structure.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org> Tested-by: Michal Simek <michal.simek@amd.com>
Sughosh Ganu [Fri, 22 Mar 2024 10:57:20 +0000 (16:27 +0530)]
fwu: metadata: add functions for handling version specific metadata fields
Support is being added in U-Boot for version 2 of the FWU
metadata. Support for this version is to co-exist with version 1
support. To achieve this, a common, version agnostic structure has
been added to keep information provided by the FWU metadata
structure.
Add API's to handle the version specific FWU metadata fields. The
version agnostic structure gets initialized at boot by reading the FWU
metadata. Updates to the FWU metadata result in the API's getting
called to populate the version specific fields of the strucure, before
the metadata gets written to the storage media.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org> Tested-by: Michal Simek <michal.simek@amd.com>
Sughosh Ganu [Fri, 22 Mar 2024 10:57:19 +0000 (16:27 +0530)]
fwu: metadata: add a version agnostic structure
The FWU specification now has two versions of the FWU metadata
structure, and both are to be supported. Introduce a version agnostic
structure for storing information about the FWU updatable images. This
allows for a split of common version agnostic FWU code and version
specific code.
The version specific code is then responsible for arranging the data
as per the corresponding metadata structure before it gets written to
the metadata partitions.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org> Tested-by: Michal Simek <michal.simek@amd.com>
Sughosh Ganu [Fri, 22 Mar 2024 10:57:18 +0000 (16:27 +0530)]
fwu: metadata: add support for version 2 of the structure
Add support for version 2 of the FWU metadata structure. The top level
structure is kept separate through a config symbol. Most of the
fields, primarily used for providing information on updatable images
are common across the two versions.
Also change a few existing structure members used for image
identification to reflect the fact that these are GUIDs, and not
UUIDs.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org> Tested-by: Michal Simek <michal.simek@amd.com>
Sughosh Ganu [Fri, 22 Mar 2024 10:57:17 +0000 (16:27 +0530)]
drivers: fwu: mtd: allocate buffer for image info dynamically
The FWU metadata access driver for MTD partitioned devices currently
uses a statically allocated array for storing the updatable image
information. This array depends on the number of banks and images per
bank. With migration of the FWU metadata to version 2, these
parameters are now obtained at runtime from the metadata.
Make changes to the FWU metadata access driver for MTD devices to
allocate memory for the image information dynamically in the driver's
probe function, after having obtained the number of banks and images
per bank by reading the metadata. Move the image information as part
of the driver's private structure, instead of using a global variable.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org> Tested-by: Michal Simek <michal.simek@amd.com>
Sughosh Ganu [Fri, 22 Mar 2024 10:57:16 +0000 (16:27 +0530)]
drivers: fwu: add the size parameter to the metadata access API's
In version 2 of the metadata structure, the size of the structure
cannot be determined statically at build time. The structure is now
broken into the top level structure which contains a field indicating
the total size of the structure.
Add a size parameter to the metadata access API functions to indicate
the number of bytes to be accessed. This is then used to either read
the entire structure, or only the top level structure.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org> Tested-by: Michal Simek <michal.simek@amd.com>
Sughosh Ganu [Fri, 22 Mar 2024 10:57:15 +0000 (16:27 +0530)]
tools: mkfwumdata: fix the size parameter to the fwrite call
The fwrite call returns the number of bytes transferred as part of the
write only when the size parameter is 1. Pass the size parameter to
the library call as 1 so that the correct number of bytes transferred
are returned.
Fixes: fdd56bfd3ad ("tools: Add mkfwumdata tool for FWU metadata image") Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org> Tested-by: Michal Simek <michal.simek@amd.com>
Sughosh Ganu [Fri, 22 Mar 2024 10:57:14 +0000 (16:27 +0530)]
configs: fwu: remove FWU configs for metadata V2 support
Support is to be added in the following commits for the FWU metadata
version 2. Disable the FWU feature on platforms that enable it for the
V2 addition work.
- Allow signing i.MX8M flash.bin via binman, which is a much more
elegant solution that using scripts.
- Improve i.MX8M HAB documentation.
- Increase PHY auto-negotiation timeout to 20s on MX8Menlo
- Add bmode support for the MX53 Menlo board.
- Update Update iMX8MM Menlo board configuration
Olaf Mandel [Tue, 21 May 2024 10:49:38 +0000 (12:49 +0200)]
ARM: imx: mx5: Simplify TFTP server layout on MX53 Menlo board
By removing the "boot" directory in the "m53menlo/boot/fitImage" path,
we simplify the TFTP server directory layout a bit. This also requires a
change to the mmcload command as it (mis-)uses the same variable as the
TFTP boot.
Signed-off-by: Olaf Mandel <o.mandel@menlosystems.com> Signed-off-by: Marek Vasut <marex@denx.de>
Synchronize Toradex Verdin iMX8MM based MX8Menlo board configuration
with Toradex Verdin iMX8MM and enable convenience commands like cat,
hexdump, xxd.
Signed-off-by: Marek Vasut <marex@denx.de> Reviewed-by: Peng Fan <peng.fan@nxp.com>
Marek Vasut [Tue, 21 May 2024 09:39:38 +0000 (11:39 +0200)]
ARM: imx: Increase PHY auto-negotiation timeout to 20s on MX8Menlo
The ethernet PHY on MX8Menlo board takes a while to come out of
reset, increase the auto-negotiation timeout to prevent it from
timing out in case the ethernet is used right after the board was
reset.
Marek Vasut [Tue, 21 May 2024 10:48:25 +0000 (12:48 +0200)]
ARM: dts: imx: Wrap i.MX8M binman SPL and FIT nodes in CST node if IMX_HAB enabled
In case CONFIG_IMX_HAB is enabled, extend the binman image description for
all of i.MX8M{Q,M,N,P} with CST wrapper node. This way, if CONFIG_IMX_HAB
is enabled, binman will be automatically used to sign SPL and fitImage.
Reviewed-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Tue, 21 May 2024 10:48:24 +0000 (12:48 +0200)]
ARM: dts: imx: Introduce SPL and FIT labels to i.MX8M DTs binman nodes
Add binman_imx_spl and binman_imx_fit labels to nxp-imx8mimage {} and fit {}
nodes respectively, so they can be referened in board DTs no matter how deep
in the top level binman image description they are. Update current board DTs
to use those labels.
Reviewed-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Tue, 21 May 2024 10:48:23 +0000 (12:48 +0200)]
binman: Add nxp_imx8mcst etype for i.MX8M flash.bin signing
Add new binman etype which allows signing both the SPL and fitImage sections
of i.MX8M flash.bin using CST. There are multiple DT properties which govern
the signing process, nxp,loader-address is the only mandatory one which sets
the SPL signature start address without the imx8mimage header, this should be
SPL text base. The key material can be configured using optional DT properties
nxp,srk-table, nxp,csf-crt, nxp,img-crt, all of which default the key material
names generated by CST tool scripts. The nxp,unlock property can be used to
unlock CAAM access in SPL section.
Reviewed-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Marek Vasut <marex@denx.de>
Quentin Schulz [Thu, 23 May 2024 16:59:36 +0000 (18:59 +0200)]
rockchip: ringneck_px30: Use common bss and stack addresses
U-Boot proper pre-reloc is currently running out of memory and it is
thus impossible to boot into U-Boot CLI.
Fix this by migrating to the common bss and stack addresses for PX30,
which drastically increases the size of the pre-reloc allocation pool (8
times bigger now). The memory layout in SPL and U-Boot proper now
match the other SoCs' using ROCKCHIP_COMMON_STACK_ADDR.
Quentin Schulz [Thu, 23 May 2024 16:59:35 +0000 (18:59 +0200)]
rockchip: Use common bss and stack addresses on PX30
See commit 008ba0d56d00 ("rockchip: Add common default bss and stack
addresses") for memory layout. This migrates PX30 to use the new layout,
except for TPL. Indeed, PX30 is extremely limited in SRAM, so we need to
be extra careful about what goes into the TPL and how much we can
allocate there, so let's keep the current value for
TPL_SYS_MALLOC_F_LEN (already present in the PX30-specific Kconfig, from
an earlier commit).
This will allow us to use the same memory layout on one more Rockchip
SoC, which is always a nice thing. Additionally, this will make it
easier to fix U-Boot proper pre-reloc running out of memory on PX30 in a
subsequent commit.
Quentin Schulz [Thu, 23 May 2024 16:59:34 +0000 (18:59 +0200)]
rockchip: px30: default TPL_SYS_MALLOC_F_LEN to 0x600 on PX30 Kconfig level
This is the kind of setting that typically doesn't need to be changed
between boards based on the same SoC, so let's make it the default in
PX30 Kconfig so we don't have to care about it in the defconfig if we
don't want to.
Heiko Stuebner [Wed, 22 May 2024 17:31:29 +0000 (19:31 +0200)]
clk: rockchip: rk3588: Set SPLL frequency during SPL stage
All parts expect the SPLL to run at 702MHz. In U-Boot it's the SPLL_HZ
declaring this rate and in the kernel it's a fixed clock definition.
While everything is expecting 702MHz, the SPLL is not running that
frequency when coming from the bootrom though, instead it's running
at 351MHz and the vendor-u-boot just sets it to the expected frequency.
The SPLL itself is located inside the secure-BUSCRU and in theory
accessible as an SCMI clock, though this requires an unknown amount
of cooperation from trusted-firmware to set at a later stage, though
during the SPL stage we can still access the relevant CRU directly.
The SPLL is for example necessary for the DSI controllers to produce
output.
As the SPLL is "just" another rk3588 pll, just set the desired rate
directly during the SPL stage.
Tested on rk3588-rock5b and rk3588-tiger by reading back the PLL rate
and also observing working DSI output with this change.
Fixes: 6737771600d4 ("rockchip: rk3588: Add support for sdmmc clocks in SPL") Suggested-by: Andy Yan <andy.yan@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de> Cc: Jonas Karlman <jonas@kwiboo.se> Cc: Quentin Schulz <quentin.schulz@cherry.de> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Fabio Estevam [Thu, 9 May 2024 16:42:25 +0000 (13:42 -0300)]
rockchip: rv1108: Remove unneeded local rv1108-cru.h
After the conversion of RV1108 to OF_UPSTREAM,
include/dt-bindings/clock/rv1108-cru.h is no longer needed because
there is dts/upstream/include/dt-bindings/clock/rv1108-cru.h from
upstream Linux.
Remove the unneeded rv1108-cru.h file.
Reported-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Raymond Mao [Thu, 16 May 2024 21:11:52 +0000 (14:11 -0700)]
include: Move snprintf to stdio.h
Move snprintf to stdio.h since it is needed by exteranl libraries.
Signed-off-by: Raymond Mao <raymond.mao@linaro.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Raymond Mao [Thu, 16 May 2024 21:11:51 +0000 (14:11 -0700)]
md5: Use typedef for MD5 context
Use of typedef is beneficial for porting with other crypto libs
without changing the API callers.
Secondly, it is for the code consistency with other digest libs.
SHA1, SHA256 and SHA512 are all using typedef for their context.
Signed-off-by: Raymond Mao <raymond.mao@linaro.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Raymond Mao [Thu, 16 May 2024 21:11:50 +0000 (14:11 -0700)]
efi_loader: remove redundant hash includes
Remove the redundant includes of u-boot/sha1.h, u-boot/sha256.h
and u-boot/sha512.h
Signed-off-by: Raymond Mao <raymond.mao@linaro.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Raymond Mao [Thu, 16 May 2024 21:11:49 +0000 (14:11 -0700)]
image: remove redundant hash includes
Remove the redundant includes of u-boot/md5.h, u-boot/sha1.h,
u-boot/sha256.h and u-boot/sha512.h
Signed-off-by: Raymond Mao <raymond.mao@linaro.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Igor Opaniuk <igor.opaniuk@gmail.com> Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
The first commit is trivial cleanup. The second syncs
scripts/setlocalversion with linux 6.9, with just a one-line change on
top to account for a Kbuild change that U-Boot has not yet adopted.
projects / u-boot.git / log