Igor Opaniuk [Mon, 22 Jul 2019 09:05:06 +0000 (12:05 +0300)]
colibri_imx7: provide proper node name to pmic_get
Implementation of pmic_get() uses uclass_find_device_by_name(), which
behaviour was changed in 4213609cc7
("drivers: core: use strcmp when find device by name"). Now we have to
supply full node name with unit address.
CPU: Freescale i.MX7D rev1.3 1000 MHz (running at 792 MHz)
CPU: Extended Commercial temperature grade (-20C to 105C) at 41C
Reset cause: POR
DRAM: 512 MiB
initcall sequence 9ffd3a4c failed at call 87803c61 (err=-19)
ERROR Please RESET the board
Fixes: 4213609cc7("drivers: core: use strcmp when find device by name") Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Sjoerd Simons [Tue, 18 Jun 2019 20:13:20 +0000 (22:13 +0200)]
spl, Makefile: Take external offset into account for fit images
When building a FIT image for SPL to load also take into account the
configured external offset. This allows the SPL to load the u-boot FIT
image correctly when configuring SECURE_BOOT on i.mx6 is enabled
(with CONFIG_FIT_EXTERNAL_OFFSET=0x3000).
Note this doesn't allow secure booting; but it does allow an unsigned
SPL/u-boot with secure boot support eanbled to boot on open device.
Ye Li [Fri, 12 Jul 2019 09:33:52 +0000 (09:33 +0000)]
imx8: Jump from alias to OCRAM address at SPL init
When running SPL on iMX8, the A core starts at address 0
which is a alias to OCRAM 0x100000.
The alias only map first 96KB of OCRAM, so this require the
SPL size can't beyond 96KB. But when using SPL DM, the size increase
significantly and may exceed 96KB.
So to fix the problem, we will change SPL linker address to OCRAM
address 0x100000. And then jump to the absolute address not the PC relative
address for entering OCRAM.
Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Lukasz Majewski [Thu, 10 Oct 2019 14:11:24 +0000 (16:11 +0200)]
imx: tpc70: Add board_boot_order() to distinguish between eMMC and SD boot
The TPC70 can boot from SD card (debug/development) and eMMC (production).
The board_boot_order() function provides a run time check for the device
from which one wants to boot (it is selected by GPIO pins setup).
Moreover, a fallback to SD card is provided if the detection is not
possible or working properly.
Adam Ford [Wed, 9 Oct 2019 17:53:57 +0000 (12:53 -0500)]
ARM: imx6q_logic: Remove legacy pinmuxing code from board file.
With the OCRAM expanded to 256KB and the SPL_PINCTRL enabled with
-u-boot.dtsi entries to include the pinmuxing in SPL, the manual
code setting up the pinmux can go away.
This patch removes the legacy pinmuxing code from the board file.
Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Fabio Estevam <festevam@gmail.com>
Adam Ford [Wed, 9 Oct 2019 17:53:56 +0000 (12:53 -0500)]
ARM: imx6q_logic: Enable Pin muxing in SPL
With the 256KB of OCRAM available to SPL now, there should be
enough room to enable the pinmuxing in SPL from the device tree.
This patch enables SPL_PINCTRL et al and adds the serial and
usdhc pin mux references to the -u-boot.dtsi file so the pins can be
configured from the device tree.
Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
Adam Ford [Wed, 9 Oct 2019 17:53:55 +0000 (12:53 -0500)]
ARM: imx6q_logic: Enable 256KB OCRAM
Since this board config only supports, the i.MX6D/i.MX6Q configurations,
256K of on-chip RAM is available which increases the space available
to SPL to help further reduce board code and further enable device tree
functions.
This patch enables 256K of RAM.
Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Fabio Estevam <festevam@gmail.com>
Sjoerd Simons [Thu, 20 Jun 2019 20:34:35 +0000 (22:34 +0200)]
mx6: mx6sabre common: Use more conventional spelling of fdtfile
Both the distro boot configuration as well as the general pxe support
standardized on fdtfile as the variable to hold the dtb filename.
Adjust to follow that such that e.g. "pxe boot" will just work.
Tom Rini [Fri, 11 Oct 2019 20:28:47 +0000 (16:28 -0400)]
sandbox: Remove sandbox_noblk build
At this point, all drivers that do not use CONFIG_BLK are past their
migration deadlines, so remove this config as it's no longer helpful and
hinders enhancing block drivers.
Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
This define indicates if DM_SPI shall be supported in SPL. This allows
proper operation of DM converted SPI drivers in SPL, which use
#if !CONFIG_IS_ENABLED(DM_SPI) to also support not yet DM/DTS converted
boards.
If an exception occurs in a loaded image and the relocation offset is
unknown, it is helpful to know the instructions pointed to by the
program counter. This patch adds the missing output.
warnings, because readl and friends are unconditionally defined
earlier in io.h. Moreover, the redefinitions lack the memory barriers
that the first definitions have. So I'm guessing this is practically
dead code.
Mans Rullgard [Tue, 3 Sep 2019 14:16:50 +0000 (16:16 +0200)]
spl: mmc: Add option to set eMMC HW boot partition
This change allows setting pre-defined eMMC boot partition for SPL eMMC
booting. It is necessary in the case when one wants to boot (through falcon
boot) from eMMC after loading SPL from other memory (like SPI-NOR).
Signed-off-by: Mans Rullgard <mans@mansr.com>
[lukma: Edit the commit message] Signed-off-by: Lukasz Majewski <lukma@denx.de> Acked-by: Andreas Dannenberg <dannenberg@ti.com>
Lokesh Vutla [Tue, 1 Oct 2019 05:11:01 +0000 (10:41 +0530)]
arm: dra7xx: Hang on any failure during IOdelay recalibration
If there is any failure during IOdelay recalibration sequence, IOs are
not guaranteed to behave as expected. So hang on any failure during the
sequence.
Lokesh Vutla [Tue, 1 Oct 2019 05:11:00 +0000 (10:41 +0530)]
arm: dra7xx: Fix error path in iodelay recalibration
When an error is reported in __recalibrate_iodelay_start(), de-isolation
of IO doesn't happen. Because of this, undefined behaviour is observed
on many peripherals without any error. So make sure io is out of isolation
at the end of iodelay recalibration.
Reported-by: Richard Woodruff <r-woodruff2@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
arm: dts: k3-j721e-common-proc-board: Mark main_uart0 as shared device
Main uart0 is used as debug console by both R5SPL and A72 bootloader and
Linux. So mark it as shared device so that power-domain request is
successful by both cores.
Tero Kristo [Fri, 27 Sep 2019 16:14:29 +0000 (19:14 +0300)]
board: ti: am335x-ice: Configure the CDCE913 clock synthesizer
AM335x-ICE boards contain the CDCE913 clock synthesizer, and their
reset crystal capacitance load value of 10pF is wrong leading into
lost packets in certain networking tests. Add DT data for this
device, and probe it from the board file to program the crystal
capacitance load value to 0pF to avoid any problems.
Tero Kristo [Fri, 27 Sep 2019 16:14:28 +0000 (19:14 +0300)]
board: ti: am43xx-idk: Configure the CDCE913 clock synthesizer
AM43xx-IDK boards contain the CDCE913 clock synthesizer, and their
reset crystal capacitance load value of 10pF is wrong leading into
lost packets in certain networking tests. Add DT data for this
device, and probe it from the board file to program the crystal
capacitance load value to 0pF to avoid any problems.
Tero Kristo [Fri, 27 Sep 2019 16:14:27 +0000 (19:14 +0300)]
board: ti: am57xx-idk: Configure the CDCE913 clock synthesizer
AM57xx-IDK boards contain the CDCE913 clock synthesizer, and their
reset crystal capacitance load value of 10pF is wrong leading into
lost packets in certain networking tests. Add DT data for this
device, and probe it from the board file to program the crystal
capacitance load value to 0pF to avoid any problems.
Tero Kristo [Fri, 27 Sep 2019 16:14:26 +0000 (19:14 +0300)]
clk: cdce9xx: add support for cdce9xx clock synthesizer
Add support for CDCE913/925/937/949 family of devices. These are modular
PLL-based low cost, high performance, programmable clock synthesizers,
multipliers and dividers. They generate up to 9 output clocks from a
single input frequency. The initial version of the driver does not
support programming of the PLLs, and thus they run in the bypass mode
only. The code is loosely based on the linux kernel cdce9xx driver.
mmc: am654_sdhci: Drop a redundant power_domain_on in probe
Power-domain is enabled by default in device_probe. am654 mmc driver
is enabling power-domain again in probe. As the second call is
redundant, drop power_domain_on from probe.
Tested-by: Suman Anna <s-anna@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
Andrew F. Davis [Tue, 17 Sep 2019 19:40:25 +0000 (15:40 -0400)]
configs: ti: Use addr_fit for run_fit environment variable
When running 'run_fit' the FIT file should have been loaded at
'addr_fit', although at this point they should be the same
use this variable instead of 'loadaddr'.
- add BOARD_LATE_INIT function calls in board.c
- add swi_status detection in board.c
- mux: add guardian interfaces to single pinmux structure
- am33xx, kconfig: add BOARD_LATE_INIT for GUARDIAN board
Signed-off-by: Moses Christopher <BollavarapuMoses.Christopher@in.bosch.com> Reviewed-by: Tom Rini <trini@konsulko.com>
cmd: ti: ddr3: Move the print statement after test
If the ECC is enabled over the entire memory region, we need to ensure
the printf/put calls do not modify the stack after ECC is disabled.
Moved the printf/put statements after ECC is enabled.
arm: omap: emif-common: Fix memory priming for ECC
Before the priming begins, we need to disable RMW (Read Modify Write)
and disable ECC verification for read accesses. By default, the EMIF
tool enables RMW and read accesses in the EMIF_ECC_CTRL_REG.
ecc_address_range registers contains the start address and end address
of the DDR address space. But the ddr cmd driver is assuming the register
contains the start address and size of the DDR address space. Because
of this some valid ecc addresses are errored out as invalid address.
Fix this calculation.
ecc_address_range registers contains the start address and end address
of the DDR address space. But the ddr driver is assuming the register
contains the start address and size of the DDR address space. Because
of this the ecc enabling is failing for the 2nd range of ecc addresses.
Fix this calculation.
Ryder Lee [Thu, 22 Aug 2019 10:26:54 +0000 (12:26 +0200)]
dt-bindings: phy: add a document for MediaTek tphy
This adds a document for tphy which supports physical layer
functionality for a number of controllers on MediaTek SoCs,
such as, USB2.0, USB3.0, PCIe, and SATA.
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com> Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Ryder Lee [Thu, 22 Aug 2019 10:26:52 +0000 (12:26 +0200)]
arm: dts: split mtk-reset.h into per-chip header
This follows the linux header rules to avoid conflict bitfields.
Tested-by: Frank Wunderlich <frank-w@public-files.de> Signed-off-by: Ryder Lee <ryder.lee@mediatek.com> Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Ryder Lee [Thu, 22 Aug 2019 10:26:51 +0000 (12:26 +0200)]
arm: dts: add PCIe controller for MT7623 SoC
This adds PCIe and its PHY nodes for MT7623.
Tested-by: Frank Wunderlich <frank-w@public-files.de> Signed-off-by: Ryder Lee <ryder.lee@mediatek.com> Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Ryder Lee [Thu, 22 Aug 2019 10:26:50 +0000 (12:26 +0200)]
phy: mediatek: add MediaTek T-PHY support for PCIe
The driver provides PHY for USB2, USB3.0, PCIe and SATA, and now
we just enable PCIe. As for the other functionalities will be
added gradually in upcoming days.
This is adapted from the Linux version.
Tested-by: Frank Wunderlich <frank-w@public-files.de> Signed-off-by: Ryder Lee <ryder.lee@mediatek.com> Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Ryder Lee [Thu, 22 Aug 2019 10:26:49 +0000 (12:26 +0200)]
pci: mediatek: add PCIe controller support for MT7623
This adds PCIe controller support for MT7623.
This is adapted from the Linux version.
Tested-by: Frank Wunderlich <frank-w@public-files.de> Signed-off-by: Ryder Lee <ryder.lee@mediatek.com> Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Philippe Reynes [Thu, 19 Sep 2019 14:18:39 +0000 (16:18 +0200)]
spl: add a generic function board_init_f
This commit add a generic function board_init_f that
only initialize some device (for example serial). It
avoid to define a board function only to launch the
serial configuration.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Kursad Oney [Wed, 14 Aug 2019 13:18:35 +0000 (15:18 +0200)]
spi: bcm63xx_hsspi: Continue init when using no reset and fixed-clock.
The Broadcom ARM implementations do not yet have a clock framework so
one can use a fixed clock as the root clock of the hsspi block. The
fixed clock does not have an "enable" routine, since it's always
enabled. So when we hit this issue, getting an ENOSYS return, do not
bail but continue initialization.
Similarly the block might already have been out of reset, say, when
we are booting from a SPI device. So if the reset signal is not configured
in the device tree, do not bail out and instead skip deasserting the reset.
Signed-off-by: Kursad Oney <kursad.oney@broadcom.com> Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com>
Kursad Oney [Wed, 14 Aug 2019 13:18:34 +0000 (15:18 +0200)]
spi: bcm63xx_hsspi: switch to raw I/O functions.
Make the driver compatible with both big and little endian SOCs.
Replace big-endian calls with their raw equivalents, expect for
writing the command to FIFO. That still has to be in big-endian
format.
Signed-off-by: Kursad Oney <kursad.oney@broadcom.com> Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Kursad Oney [Wed, 14 Aug 2019 13:18:33 +0000 (15:18 +0200)]
waitbit: Add the generic wait_for_bit macros for 16 and 32 bits.
wait_for_bit_le32 and wait_for_bit_le16 use the raw I/O functions
which would default to big-endian on BE systems. Create the generic
equivalents to use the native endianness.
Signed-off-by: Kursad Oney <kursad.oney@broadcom.com> Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
armv8: K3: j721e: Updated ddr address regions in MMU table
The A72 U-Boot code loads and boots a number of remote processors
including the C71x DSP, both the C66_0 and C66_1 DSPs, and the various
Main R5FSS Cores. In order to view the code loaded by the U-Boot by
remote cores, U-Boot should configure the memory region with right
memory attributes. Right now U-Boot carves out a memory region which
is not sufficient for all the images to be loaded. So, increase this
carve out region by 256MB.
Suman Anna [Wed, 4 Sep 2019 10:31:49 +0000 (16:01 +0530)]
armv8: K3: am65x: Update DDR address regions in MMU table
The A53 U-Boot code can load and boot the MCU domain R5F cores (either a
single core in LockStep mode or 2 cores in Split mode) to achieve various
early system functionalities. Change the memory attributes for the DDR
regions used by the remote processors so that the cores can see and
execute the proper code loaded by U-Boot.
These regions are currently limited to 0xa0000000 to 0xa2100000 as per
the DDR carveouts assigned for these R5F cores in the overall DDR memory
map.
Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Suman Anna [Wed, 4 Sep 2019 10:31:48 +0000 (16:01 +0530)]
configs: am65x_evm_a53: Enhance bootcmd to start remoteprocs
The A53 U-boot can support early booting of the MCU R5F remote processor(s)
from U-boot prompt to achieve various system usecases before booting the
Linux kernel. Update the default BOOTCOMMAND to provide an automatic and
easier way to start the MCU R5F cores through added environment variables.
Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Suman Anna [Wed, 4 Sep 2019 10:31:46 +0000 (16:01 +0530)]
configs: j721e_evm_a72: Enhance bootcmd to start remoteprocs
The A72 U-boot can support early booting of any of the R5F or C66x
or C71x remote processors from U-boot prompt to achieve various system
usecases before booting the Linux kernel. Update the default BOOTCOMMAND
to provide an automatic and easier way to start various remote processors
through added environment variables.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Signed-off-by: Suman Anna <s-anna@ti.com>
Suman Anna [Wed, 4 Sep 2019 10:31:44 +0000 (16:01 +0530)]
env: ti: am65x_evm: Add env support to boot the MCU R5F rprocs
Add support to boot the MCU domain R5F Core0 remoteproc at U-boot prompt
on the AM65x EVM boards by using the 'boot_rprocs' and other env variables
defined in the common environment file k3_rproc.h, and updating the
'DEFAULT_RPROCS' macro.
The default configuration is to use the MCU R5F in Split mode, so both
the R5F Core0 and Core1 are started before loading and booting the Linux
kernel using the following firmware:
MCU R5FSS0 Core0 (Split) : 0 /lib/firmware/am65x-mcu-r5f0_0-fw
MCU R5FSS0 Core1 (Split) : 1 /lib/firmware/am65x-mcu-r5f0_1-fw
The MCU R5FSS was initially running the R5 SPL in LockStep mode with ATCM
disabled, and is actually shutdown to enable it to be reconfigured and
booted by either A53 U-Boot or Linux kernel in remoteproc mode and using
ATCM.
The MCU R5FSS would need to be reconfigured for Lockstep mode through
DT if a fault-tolerant/safety application were to be run on the cluster
with the DEFAULT_RPROCS macro updated to remove the Core1 firmware.
Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
projects / u-boot.git / log