Nick Spence [Thu, 28 Aug 2008 21:09:25 +0000 (14:09 -0700)]
mpc83xx: clean up cache operations and unlock_ram_in_cache() functions
Cleans up some latent issues with the data cache control so that
dcache_enable() and dcache_disable() will work reliably (after
unlock_ram_in_cache() has been called)
Signed-off-by: Nick Spence <nick.spence@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Nick Spence [Thu, 28 Aug 2008 21:09:19 +0000 (14:09 -0700)]
mpc83xx: Store and display Arbiter Event Register values
Record the Arbiter Event Register values and optionally display them.
The Arbiter Event Register can record the type and effective address of
an arbiter error, even through an HRESET. This patch stores the values in
the global data structure.
Display of the Arbiter Event registers immediately after the RSR value
can be enabled with defines. The Arbiter values will only be displayed
if an arbiter event has occured since the last Power On Reset, and either
of the following defines exist:
#define CONFIG_DISPLAY_AER_BRIEF - display only the arbiter address and
and type register values
#define CONFIG_DISPLAY_AER_FULL - display and interpret the arbiter
event register values
Address Only transactions are one of the trapped events that can register
as an arbiter event. They occur with some cache manipulation instructions
if the HID0_ABE (Address Broadcast Enable) is set and the memory region
has the MEMORY_COHERENCE WIMG bit set. Setting:
#define CONFIG_MASK_AER_AO - prevents the arbiter from recording address
only events, so that it can still capture
other real problems.
Signed-off-by: Nick Spence <nick.spence@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Nick Spence [Sat, 23 Aug 2008 06:52:50 +0000 (23:52 -0700)]
MPC83XX: Fix GPIO configuration - set gpio level before direction
Set DAT value before DIR values to avoid creating glitches on the
GPIO signals.
Set gpio level register before direction register to inhibit
glitches on high level output pins.
Dir and data gets cleared at powerup, so high level output lines see
a short low pulse between setting the direction and level registers.
Issue was seen on a new board with the nReset line of the NOR flash
connected to a GPIO. Setting the direction register puts the NOR flash
in reset so the next instruction to set the level cannot get executed.
Signed-off-by: Nick Spence <nick.spence@freescale.com> Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Stefan Roese [Mon, 1 Sep 2008 06:35:37 +0000 (08:35 +0200)]
ppc4xx: Remove reference to common/lists.o from some esd linker scripts
This patch removes some direct references to common/lists.o from some
esd linker scripts. This is necessary because the lists source was moved
and is not in the "common" directory anymore.
ppc4xx: Remove obsolete or unused functions from some esd boards
This patch removes initdram() and testdram() from most esd 405 platforms.
Some boards also have an empty dummy implementation of
misc_init_f(). This is also removed.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com> Signed-off-by: Stefan Roese <sr@denx.de>
If a board has a variable number of flash banks, there are empty entries
in flash_info[] and CFG_DIRECT_FLASH_TFTP is set, tftp boot fails with
"Outside available Flash". This patch skips flash banks with unknown
flash ids.
Signed-off-by: Jochen Friedrich <jochen@scram.de> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
net: smc911x: Add pkt_data_pull and pkt_data_push function
The RSK7203 board has the SMSC9118 wired up 'incorrectly'.
Byte-swapping is necessary, and so poor performance is inevitable.
This problem cannot evade by the swap function of CHIP, this can
evade by software Byte-swapping.
And this has problem by FIFO access only. pkt_data_pull/pkt_data_push
functions necessary to solve this problem.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Andy Fleming [Sun, 31 Aug 2008 21:33:30 +0000 (16:33 -0500)]
Add pixis_set_sgmii command
The 8544DS and 8572DS platforms support an optional SGMII riser card to
expose ethernet over an SGMII interface. Once the card is in, it is also
necessary to configure the board such that it uses the card, rather than
the on-board ethernet ports. This can either be done by flipping dip switches
on the motherboard, or by modifying registers in the pixis. Either way
requires a reboot.
This adds a command to allow users to choose which ports are routed through
the SGMII card, and which through the onboard ports. It also allows users
to revert to the current switch settings.
This code does not work on the 8572, as the PIXIS is different.
Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Andy Fleming [Sun, 31 Aug 2008 21:33:29 +0000 (16:33 -0500)]
Add SGMII support for the 8544 DS
The 8544 DS has an optional SGMII Riser card, which uses different PHY
addresses. Check if we are in SGMII mode, and invoke the SGMII Riser
setup code if so.
Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Andy Fleming [Sun, 31 Aug 2008 21:33:28 +0000 (16:33 -0500)]
Add support for Freescale SGMII Riser Card
The 8544DS and 8572DS systems have an optional SGMII riser card which
exposes new ethernet ports which are connected to the eTSECs via an
SGMII interface. The SGMII PHYs for this board are offset from the standard
PHY addresses, so this code modifies the passed in tsec_info structure to
use the SGMII PHYs on the card, instead.
Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Andy Fleming [Sun, 31 Aug 2008 21:33:26 +0000 (16:33 -0500)]
Pass in tsec_info struct through tsec_initialize
The tsec driver contains a hard-coded array of configuration information
for the tsec ethernet controllers. We create a default function that works
for most tsecs, and allow that to be overridden by board code. It creates
an array of tsec_info structures, which are then parsed by the corresponding
driver instance to determine configuration. Also, add regs, miiregs, and
devname fields to the tsec_info structure, so that we don't need the kludgy
"index" parameter.
Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
AP325RXA is SH7723's reference board.
This has SCIF, NOR Flash, Ethernet, USB host, LCDC, SD Host, Camera and other.
In this patch, support SCIF, NOR Flash, and Ethernet.
SMDK6400 can only boot U-Boot from NAND-flash. This patch adds a nand_spl
driver for it too. The board can also boot from the NOR flash, but due to
hardware limitations it can only address 64KiB on it, which is not enough
for U-Boot. Based on the original sources by Samsung for U-Boot 1.1.6.
Notice: USB on S3C6400 currently works _only_ with switched off MMU. One could
try to enable the MMU, but map addresses 1-to-1, and disable data cache, then
it should work too and we could still profit from instruction cache.
Sandeep Paulraj [Sat, 30 Aug 2008 22:39:46 +0000 (00:39 +0200)]
ARM DaVinci: Changing function names for EMAC driver
DM644x is just one of a series of DaVinci chips that use the EMAC driver.
By replacing all the function names that start with dm644x_* to davinci_*
we make these function more portable. I have tested this change on my EVM.
DM6467 is another DaVinci SOC which uses the EMAC driver and i will
be sending patches that add DaVinci DM6467 support to the list soon.
- memsetup.s is changed/merged to lowlevel_init.S
memsetup.S has a global label memsetup that just returns back to caller
- memsetup global label is changed/merged to lowlevel_init
This label is not called from anywhere.
Prodyut Hazarika [Wed, 27 Aug 2008 23:39:00 +0000 (16:39 -0700)]
ppc4xx: Optimizations/Cleanups for IBM DDR2 Memory Controller
Removed Magic numbers from Initialization preload registers
Tested with Kilauea, Glacier, Canyonlands and Katmai boards
About 5-7% improvement seen for LMBench memtests
Signed-off-by: Prodyut Hazarika <phazarika@amcc.com> Signed-off-by: Stefan Roese <sr@denx.de>
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