Simon Glass [Sun, 1 May 2016 19:52:30 +0000 (13:52 -0600)]
dm: blk: Add functions to select a hardware partition
The block device uclass does not currently support selecting a particular
hardware partition but this is needed for MMC. Add it so that the blk API
can support MMC properly.
Simon Glass [Sun, 1 May 2016 19:52:27 +0000 (13:52 -0600)]
dm: mmc: Add a function to obtain the block device
The MMC block device is contained within struct mmc. But with driver model
this will not be the case. Add a function to obtain the block device. We
can later implement this for CONFIG_BLK.
Simon Glass [Sun, 1 May 2016 19:52:25 +0000 (13:52 -0600)]
dm: mmc: Move mmc_switch_part() above its callers
This function is defined after it is used. In preparation for making it
static, move it up a little. Also drop the printf() which should not appear
in a driver.
Simon Glass [Sun, 1 May 2016 17:36:29 +0000 (11:36 -0600)]
dm: blk: Add a easier way to create a named block device
Add a function that automatically builds the device name given the parent
and a supplied string. Most callers will want to do this, so putting this
functionality in one place makes more sense.
Simon Glass [Sun, 1 May 2016 17:36:28 +0000 (11:36 -0600)]
dm: blk: Allow blk_create_device() to allocate the device number
Allow a devnum parameter of -1 to indicate that the device number should be
alocated automatically. The next highest available device number for that
interface type is used.
Simon Glass [Sun, 1 May 2016 17:36:26 +0000 (11:36 -0600)]
dm: sata: Add support for driver-model block devices
Add driver-model block-device support to the SATA implementation. This is
just a dummy implementation for now, since the SATA low-level API uses
numbered devices and that doesn't fit with driver model.
Simon Glass [Sun, 1 May 2016 17:36:11 +0000 (11:36 -0600)]
dm: sata: Separate the non-command code into its own file
At present the SATA command code includes both the command-processing code
and the core SATA functions and data structures.
Separate the latter into its own file, adding functions as needed to avoid
the command code accessing data structures directly.
With this commit:
- All CONFIG option are referenced from the non-command code
- The concept of a 'current SATA device' is confined to the command code
This will make it easier to convert this code to driver model.
Simon Glass [Sun, 1 May 2016 17:36:10 +0000 (11:36 -0600)]
dm: ide: Separate the non-command code into its own file
At present the IDE command code includes both the command-processing code
and the core IDE functions and data structures.
Separate the latter into its own file, adding functions as needed to avoid
the command code accessing data structures directly.
With this commit:
- Most CONFIG option are referenced from the non-command code
- The concept of a 'current IDE device' is confined to the command code
This will make it easier to convert this code to driver model.
Simon Glass [Sun, 1 May 2016 17:36:09 +0000 (11:36 -0600)]
dm: scsi: Separate the non-command code into its own file
At present the SCSI command code includes both the command-processing code
and the core SCSI functions and data structures.
Separate the latter into its own file, adding functions as needed to avoid
the command code accessing data structures directly. This functions use the
new legacy block functions.
With this commit:
- There is no CONFIG option referenced from the command code
- The concept of a 'current SCSI device' is confined to the command code
This will make it easier to convert this code to driver model.
Simon Glass [Sun, 1 May 2016 17:36:08 +0000 (11:36 -0600)]
dm: mmc: Add an implementation of the 'devnum' functions
Now that the MMC code accesses devices by number, we can implement this same
interface for driver model, allowing MMC to support using driver model for
block devices.
Simon Glass [Sun, 1 May 2016 17:36:02 +0000 (11:36 -0600)]
dm: scsi: Rename CONFIG_CMD_SCSI to CONFIG_SCSI
This option currently enables both the command and the SCSI functionality.
Rename the existing option to CONFIG_SCSI since most of the code relates
to the feature.
Simon Glass [Sun, 1 May 2016 17:35:54 +0000 (11:35 -0600)]
sandbox: Add string and 16-bit I/O functions
Add outsw() and insw() functions for sandbox, as these are needed by the IDE
code. The functions will not do anything useful if called, but allow the
code to be compiled.
Also add out16() and in16(), required by systemace.
Simon Glass [Sun, 1 May 2016 17:35:53 +0000 (11:35 -0600)]
Allow iotrace byte access to use an address of any size
If an address is used with readb() and writeb() which is smaller than the
expected size (e.g. 32-bit value on a machine with 64-bit addresses), a
warning results. Fix this by adding a cast.
Simon Glass [Sun, 1 May 2016 17:35:52 +0000 (11:35 -0600)]
dm: Rename disk uclass to ahci
This started as 'ahci' and was renamed to 'disk' during code review. But it
seems that this is too generic. Now that we have a 'blk' uclass, we can use
that as the generic piece, and revert to ahci for this.
Simon Glass [Sun, 1 May 2016 17:35:50 +0000 (11:35 -0600)]
dm: sandbox: Add a board for sandbox without CONFIG_BLK
While the driver-model block device support is in progress, it is useful to
build sandbox both with and without CONFIG_BLK. Add a separate board for
the latter.
Simon Glass [Sun, 1 May 2016 17:35:49 +0000 (11:35 -0600)]
Revert "dm: sandbox: Drop the pre-DM host implementation"
Bring this support back so that sandbox can be compiled with CONFIG_BLK. This
allows sandbox to have greater build coverage during the block-device
transition. This can be removed again later.
Peng Fan [Tue, 3 May 2016 02:02:23 +0000 (10:02 +0800)]
dm: gpio: introduce 74x164 driver
Introduce driver to support "fairchild,74hc595" devices.
1. Take linux drivers/drivers/gpio/gpio-74x164.c as reference.
2. Following the naming used in Linux driver with gen_7x164 as the prefix.
3. Enable CONFIG_DM_74X164 to use this driver.
4. Follow Documentation/devicetree/bindings/gpio/gpio-74x164.txt to add device
nodes
5. Tested on i.MX6 UltraLite with 74LV595 using gpio command and oscillograph.
Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Simon Glass <sjg@chromium.org> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Chin Liang See <clsee@altera.com> Cc: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
Peng Fan [Tue, 3 May 2016 02:02:22 +0000 (10:02 +0800)]
dm: spi: introduce dm api
Introduce dm_spi_claim_bus, dm_spi_release_bus and dm_spi_xfer
Convert spi_claim_bus, spi_release_bus and spi_xfer to use
the new API.
Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Simon Glass <sjg@chromium.org> Cc: Jagan Teki <jteki@openedev.com> Acked-by: Simon Glass <sjg@chromium.org>
Peng Fan [Tue, 3 May 2016 02:02:21 +0000 (10:02 +0800)]
dm: spi: soft_spi: switch to use linux compatible string
1. Support compatible string "spi-gpio" which is used by Linux
Linux use different bindings, so use UBOOT_COMPAT and
LINUX_COMPAT to differentiate them.
2. Introduce SPI_MASTER_NO_RX and SPI_MASTER_NO_TX to handle
no rx or no tx case.
3. Tested on i.MX6 UltraLite board with 74LV595 spi-gpio chip.
Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Simon Glass <sjg@chromium.org> Cc: Przemyslaw Marczak <p.marczak@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Peng Fan [Tue, 3 May 2016 02:02:20 +0000 (10:02 +0800)]
dm: spi: soft_spi bug fix
When doing xfer, should use device->parent, but not device
When doing bit xfer, should use "!!(tmpdout & 0x80)", but not
"(tmpdout & 0x80)"
Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Simon Glass <sjg@chromium.org> Cc: Jagan Teki <jteki@openedev.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Stephen Warren [Tue, 19 Apr 2016 22:19:30 +0000 (16:19 -0600)]
video: tegra: refuse to bind to disabled dcs
This prevents the following boot-time message on any board where only the
first DC is in use, yet the DC's DT node is enabled:
stdio_add_devices: Video device failed (ret=-22)
(This happens on at least Harmony, Ventana, and likely any other Tegra20
board with display enabled other than Seaboard).
The Tegra DC's DT node represents a display controller. It may itself
drive an integrated RGB display output, or be used by some other display
controller such as HDMI. For this reason the DC node itself is not
enabled/disabled in DT; the DC itself is considered a shared resource, not
the final (board-specific) display output. The node should instantiate a
display output driver only if the rgb subnode is enabled. Other output
drivers are free to use the DC if they are enabled and their DT node
references the DC's DT node. Adapt the Tegra display drivers' bind()
routine to only bind to the DC's DT node if the RGB subnode is enabled.
Now that the display driver does the right thing, remove the workaround
for this issue from Seaboard's DT file.
Cc: Thierry Reding <treding@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Stephen Warren [Tue, 19 Apr 2016 22:19:29 +0000 (16:19 -0600)]
dm: core: allow drivers to refuse to bind
In some cases, drivers may not want to bind to a device. Allow bind() to
return -ENODEV in this case, and don't treat this as an error. This can
be useful in situations where some information source other than the DT
node's main status property indicates whether the device should be
enabled, for example other DT properties might indicate this, or the
driver might query non-DT sources such as system fuses or a version number
register.
Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Stephen Warren [Mon, 11 Apr 2016 16:48:44 +0000 (10:48 -0600)]
buildman: allow more incremental building
One use-case for buildman is to continually run it interactively after
each small step in a large refactoring operation. This gives more
immediate feedback than making a number of commits and then going back and
testing them. For this to work well, buildman needs to be extremely fast.
At present, a couple issues prevent it being as fast as it could be:
1) Each time buildman runs "make %_defconfig", it runs "make mrproper"
first. This throws away all previous build results, requiring a
from-scratch build. Optionally avoiding this would speed up the build, at
the cost of potentially causing or missing some build issues.
2) A build tree is created per thread rather than per board. When a thread
switches between building different boards, this often causes many files
to be rebuilt due to changing config options. Using a separate build tree
for each board would avoid this. This does put more strain on the system's
disk cache, but it is worth it on my system at least.
This commit adds two command-line options to implement the changes
described above; -I ("--incremental") turns of "make mrproper" and -P
("--per-board-out-dir") creats a build directory per board rather than per
thread.
... each once after deleting the buildman result/work directory, and once
"incrementally" after a previous identical invocation.
Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Simon Glass <sjg@chromium.org> # v1 Tested-by: Simon Glass <sjg@chromium.org> # v1 Acked-by: Simon Glass <sjg@chromium.org>
To use serial uclass and DM, CONFIG_SYS_MALLOC_F must be used.
So CONFIG_SYS_GENERIC_GLOBAL_DATA has been undefined and
call to board_init_f_mem() is added for all cpu's.
Signed-off-by: Angelo Dureghello <angelo@sysam.it> Acked-by: Simon Glass <sjg@chromium.org>
Peng Fan [Thu, 14 Apr 2016 13:45:06 +0000 (21:45 +0800)]
dm: gpio: pca953x: introduce driver model support for pca953x
Introduce a new driver that supports driver model for pca953x.
The pca953x chips are used as I2C I/O expanders.
This driver is designed to support the following chips:
"
4 bits: pca9536, pca9537
8 bits: max7310, max7315, pca6107, pca9534, pca9538, pca9554,
pca9556, pca9557, pca9574, tca6408, xra1202
16 bits: max7312, max7313, pca9535, pca9539, pca9555, pca9575,
tca6416
24 bits: tca6424
40 bits: pca9505, pca9698
"
But for now this driver only supports max 24 bits and pca953x compatible
chips. pca957x compatible chips are not supported now.
These can be addressed when we need to add such support for the different
chips.
This driver has been tested on i.MX6 SoloX Sabreauto board with max7310
i2c expander using gpio command as following:
=>gpio status -a
Bank gpio@30_:
gpio@30_0: input: 1 [ ]
Hans de Goede [Thu, 12 May 2016 17:23:47 +0000 (19:23 +0200)]
sunxi: Enable USB host in CHIP defconfig
Reported-and-tested-by: Dennis Gilmore <dennis@ausil.us> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
Andre Przywara [Thu, 12 May 2016 11:14:41 +0000 (12:14 +0100)]
arm/arm64: Move barrier instructions into separate header
Commit bfb33f0bc45b ("sunxi: mctl_mem_matches: Add missing memory
barrier") broke compilation for the Pine64, as dram_helper.c now
includes <asm/armv7.h>, which does not compile on arm64.
Fix this by moving all barrier instructions into a separate header
file, which can easily be shared between arm and arm64.
Also extend the inline assembly to take the "sy" argument, which is
optional for ARMv7, but mandatory for v8.
This fixes compilation for 64-bit sunxi boards (Pine64).
Acked-by: Ian Campbell <ijc@hellion.org.uk> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Fabio Estevam [Tue, 10 May 2016 16:31:40 +0000 (13:31 -0300)]
warp7: Fix boot by selecting CONFIG_OF_LIBFDT
CONFIG_OF_LIBFDT needs to be selected to avoid the following
boot problem:
reading zImage 6346216 bytes read in 118 ms (51.3 MiB/s)
Booting from mmc ...
reading imx7d-warp.dtb
32593 bytes read in 11 ms (2.8 MiB/s)
Kernel image @ 0x80800000 [ 0x000000 - 0x60d5e8 ]
FDT and ATAGS support not compiled in - hanging
### ERROR ### Please RESET the board ###
Stefan Roese [Fri, 6 May 2016 11:53:37 +0000 (13:53 +0200)]
usb: dwc2: Add delay to fix the USB detection problem on SoCFPGA
With patch c998da0d (usb: Change power-on / scanning timeout handling),
the USB scanning is started earlier and with a smaller timeout. This
resulted on SoCFPGA (using the DWC2 driver) in some USB sticks not
getting detected any more. This patch now adds a 1 second delay (in
the host mode only) to the DWC2 driver before the scanning is started.
With this delay, now all problematic USB keys are detected successfully
again. And there is no need any more to change the delay / timeout
in the common USB code (usb_hub.c).
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Hans de Goede <hdegoede@redhat.com> Cc: Stephen Warren <swarren@nvidia.com> Cc: Marek Vasut <marex@denx.de>
Marek Vasut [Tue, 3 May 2016 20:22:59 +0000 (22:22 +0200)]
usb: hub: Don't continue on get_port_status failure
The code shouldn't continue probing the port if get_port_status() failed.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Hans de Goede <hdegoede@redhat.com> Cc: Stefan Roese <sr@denx.de> Cc: Stephen Warren <swarren@nvidia.com>
Marek Vasut [Wed, 27 Apr 2016 01:32:56 +0000 (03:32 +0200)]
usb: Assure Get Descriptor request is in separate microframe
The Kingston DT Ultimate USB 3.0 stick is sensitive to this first
Get Descriptor request and if the request is not in a separate
microframe, the stick refuses to operate. Add slight delay, which
is enough for one microframe to pass on any USB spec revision.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Hans de Goede <hdegoede@redhat.com> Cc: Stefan Roese <sr@denx.de> Cc: Stephen Warren <swarren@nvidia.com>
Marek Vasut [Wed, 27 Apr 2016 01:08:12 +0000 (03:08 +0200)]
usb: Wait after sending Set Configuration request
Some devices, like the SanDisk Cruzer Pop need some time to process
the Set Configuration request, so wait a little until they are ready.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Hans de Goede <hdegoede@redhat.com> Cc: Stefan Roese <sr@denx.de> Cc: Stephen Warren <swarren@nvidia.com>
Marek Vasut [Wed, 27 Apr 2016 21:38:05 +0000 (23:38 +0200)]
mtd: cqspi: Simplify indirect read code
The indirect read code is a pile of nastiness. This patch replaces
the whole unmaintainable indirect read implementation with the one
from upcoming Linux CQSPI driver, which went through multiple rounds
of thorough review and testing. All the patch does is it plucks out
duplicate ad-hoc code distributed across the driver and replaces it
with more compact code doing exactly the same thing. There is no
speed change of the read operation.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Anatolij Gustschin <agust@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Jagan Teki <jteki@openedev.com> Cc: Pavel Machek <pavel@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Vignesh R <vigneshr@ti.com>
Marek Vasut [Wed, 27 Apr 2016 21:18:55 +0000 (23:18 +0200)]
mtd: cqspi: Simplify indirect write code
The indirect write code is buggy pile of nastiness which fails horribly
when the system runs fast enough to saturate the controller. The failure
results in some pages (256B) not being written to the flash. This can be
observed on systems which run with Dcache enabled and L2 cache enabled,
like the Altera SoCFPGA.
This patch replaces the whole unmaintainable indirect write implementation
with the one from upcoming Linux CQSPI driver, which went through multiple
rounds of thorough review and testing. While this makes the patch look
terrifying and violates all best-practices of software development, all
the patch does is it plucks out duplicate ad-hoc code distributed across
the driver and replaces it with more compact code doing exactly the same
thing.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Anatolij Gustschin <agust@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Jagan Teki <jteki@openedev.com> Cc: Pavel Machek <pavel@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Vignesh R <vigneshr@ti.com>
Marek Vasut [Tue, 26 Apr 2016 23:55:10 +0000 (01:55 +0200)]
usb: Don't init pointer to zero, but NULL
The pointer should always be inited to NULL, not zero (0). These are
two different things and not necessarily equal.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Hans de Goede <hdegoede@redhat.com> Cc: Stefan Roese <sr@denx.de> Cc: Stephen Warren <swarren@nvidia.com>
Stefan Agner [Thu, 5 May 2016 23:59:12 +0000 (16:59 -0700)]
usb: ehci-mx6: allow board_ehci_hcd_init to fail
There could be runtime determined board specific reason why a EHCI
initialization fails (e.g. ENODEV if a Port is not available). In
this case, properly return the error code.
While at it, that function (board_ehci_hcd_init) has actually two
documentation blocks... Use the correct function name for the
documentation block of board_usb_phy_mode.
Peng Fan [Wed, 4 May 2016 07:27:50 +0000 (15:27 +0800)]
imx6: cache: disable L2 before touching Auxiliary Control Register
According PL310 TRM, Auxiliary Control Register
"
The register must be written to using a secure access, and it can be
read using either a secure or a NS access. If you write to this register
with a NS access, it results in a write response with a DECERR response,
and the register is not updated. Writing to this register with the L2
cache enabled, that is, bit[0] of L2 Control Register set to 1,
results in a SLVERR.
"
So If L2 cache is already enabled by ROM, chaning value of ACR
will cause SLVERR and uboot hang.
Stephen Warren [Thu, 5 May 2016 23:02:06 +0000 (17:02 -0600)]
test/py: dfu: wait for USB device to go away at boot
It can take a while for a host machine to notice that a USB device has
disconnected, and process the change. At the end of the DFU test, we wait
up to 10 seconds for this to happen. This change makes the test wait the
same (up to) 10 seconds at the start of the test for any previously active
USB device-mode session to be cleaned up. Such as session might have been
used to download U-Boot into memory for example; this is certainly true
on my Tegra test systems. This changes should solve the DFU test
intermittency issues I've been seeing on some Tegra devices.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Russ Dill [Thu, 5 May 2016 13:52:10 +0000 (08:52 -0500)]
ARM: am33xx: Fix DDR initialization delays
The current delays in the DDR initialization routines for am33xx
architectures are sometimes not running long enough leading to DDR
init errors. On am437x, this shows up as an L3 NOC error after the
kernel boots. This is due to the timer not being initialized
properly, but instead still containing the timer init values from
the boot ROM which cause timers to expire in 1/4th the time
required.
timer_init is typically not called until board_init_r, however on
am33xx/am43xx udelay is required in sdram_init which is called
from board_init_f, so a call to timer_init is required earlier.
Note that this issue introduced in v2015.01 by:
b352dde "am33xx: Drop timer_init call from s_init".
Although this could instead fixed by reverting said commit, it
would cause timer_init to be called twice in both SPL and non-SPL
cases. This gives a little more fine grained control and also
matches what is being done on omap-command and fsl-layerscape.
projects / u-boot.git / log