Peng Ma [Wed, 4 Dec 2019 10:36:45 +0000 (10:36 +0000)]
ata: fsl_sata: Continue probing other sata port when failed current port.
In the initialization of sata driver, we want to initialize all port
probes, Therefore, any detection failure between of them should continue
initialization by skipping the current port instead of exit.
Peng Ma [Wed, 4 Dec 2019 10:36:42 +0000 (10:36 +0000)]
ata: sata_sil: Continue probing other sata port when failed current port.
In the initialization of sata driver, we want to initialize all port
probes, Therefore, any detection failure between of them should continue
initialization by skipping the current port instead of exit.
Patrice Chotard [Fri, 6 Dec 2019 14:01:49 +0000 (15:01 +0100)]
treewide: Remove CONFIG_SYS_UBOOT_START from configs board files
As previous CONFIG_SYS_UBOOT_START is now set by default to
CONFIG_SYS_TEXT_BASE when not defined, CONFIG_SYS_UBOOT_START
can be removed from include/configs board files.
Philippe Reynes [Tue, 17 Dec 2019 18:07:04 +0000 (19:07 +0100)]
cmd_ut: add a parameter prefix to the function cmd_ut_category
There is black magic in the file conftest.py that list
all the test unit. Then, all those test unit are called
in pytest. This call is done with the end of the name
(for example checksum if the full name is bloblist_test_checksum).
The result is that only test for dm are really executed.
by pytest, all others tests are listed but never executed.
This behaviour happens because the dm test unit only check
the end of the name and others tests checks the full name.
To fix this issue, I've added a prefix to the function
cmd_ut_category, and this prefix is removed when looking
for the unit test.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com> Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Fabien Dessenne [Wed, 30 Oct 2019 13:38:31 +0000 (14:38 +0100)]
remoteproc: stm32: track the coprocessor state in a backup register
Update the dedicated backup register to track the coprocessor state and
rely on that register to compute the .is_running() value (which expects
a return value of 0 -not 1- if the processor is running).
Signed-off-by: Fabien Dessenne <fabien.dessenne@st.com> Acked-by: Patrick Delaunay <patrick.delaunay@st.com>
Fabien Dessenne [Wed, 30 Oct 2019 13:38:28 +0000 (14:38 +0100)]
remoteproc: elf_loader: Add elf resource table load support
Add rproc_elf_load_rsc_table(), which searches for a resource table in
an elf64/elf32 image, and if found, copies it to device memory.
Add also the elf32 and elf64 variants of this API.
Add a test for this.
spl: fit: Allow the board to tell if more images must be loaded from FIT
spl_fit_get_image_name() is used to get the names of the images that the
SPL must load from the FIT. It relies on the content of a property present
in the FIT. The list of images is thus statically defined in the FIT.
With this scheme, it quickly becomes hard to manage combinations of more
than a handful of images.
To address this problem, give the board driver code the opportunity to
add to the list of images. The images from the FIT property are loaded
first, and then the board_get_fit_loadable() is called to get more image
names.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
This function will be used by the SPL to get the names of images to load
from the FIT. This allows to load different images based on runtime HW
detection.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
drivers: board: Make the board drivers available in SPL
Make the board driver available in the SPL too. The board driver is a way
to provide useful information about the board and that can be useful in
the SPL too.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
spl: fit: be more verbose when an error occurs when applying the overlays
There are many ways the overlay application can fail.
2 of them are probably the most common:
- the application itself failed. Usually this is comes from an unresolved
reference
- DTBO not available in FIT (could be because of a typo)
In both case it is good to be more explicit about the error and at least
show which overlay is failing.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
spl: fit: Do not fail immediately if an overlay is not available
If one overlay that must be applied cannot be found in the FIT, the current
implementation stops applying the overlays. Let's make it skip only the
failing overlay instead.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
spl: fit: allocate a temporary buffer to load the overlays
If the node describing an overlay does not specify a load address, it will
be loaded at the address previously used.
Fixing it by allocating a temporary buffer that will be used as a
default load address. By default, the size of the buffer is 64kB which
should be plenty for most use cases.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
spl: fit: Make room in the FDT before applying overlays
Make room in the FDT before applying the overlay, otherwise it may fail if
the overlay is big. As the exact added size is not known in advance, just
add the size of the overlay.
Move after the end of the application of the overlays, the resize of the
FDT for the injection of the details on the loadables.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Michal Simek [Tue, 22 Oct 2019 14:39:11 +0000 (16:39 +0200)]
spl: fit: Add support for applying DT overlay
doc/uImage.FIT/overlay-fdt-boot.txt is describing how to create FIT
image with DT overlays in it.
Add support for this feature to SPL.
Here is the ZynqMP fragment where dtb points to full DT and dtbo is
overlay which should be applied on the top of dtb.
config {
description = "ATF with full u-boot overlay";
firmware = "atf";
loadables = "uboot";
fdt = "dtb", "dtbo";
};
The whole feature depends on OF_LIBFDT_OVERLAY which is adding +4kB code
and 0 for platforms which are not enabling this feature.
Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
When u-boot.img is a FIT image generated automatically by mkimage, the
configuration node has the following structure:
conf-1 {
description = "k3-am654-base-board";
firmware = "firmware-1";
loadables = "firmware-1";
fdt = "fdt-1";
};
The firmware is referenced twice. Once by the 'firmware' property and
once by the 'loadables' property. Currently this result in the firmware
being loaded twice. This is not a big problem but has an impact on the
boot time.
Fixing it by not loading a loadable image if it is also the firmware image.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Andreas Dannenberg <dannenberg@ti.com>
Andrew F. Davis [Tue, 17 Sep 2019 21:09:34 +0000 (17:09 -0400)]
tools: fit_image: Use fit_image_get_data_and_size for getting offset/size
This is very similar to fit_image_get_data but has the benefit of working
on FIT images with external data unlike fit_image_get_data. This is
useful for extracting sub-images from type of FIT image as this would
previously just silently fail. Add an error message also so if this
still fails it is easier to find out why.
Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Andrew F. Davis [Tue, 17 Sep 2019 21:09:33 +0000 (17:09 -0400)]
tools: dumpimage: Provide more feedback on internal errors
The dumpimage utility errors out in a number of places without providing
sufficient feedback to allow the user to easily determine what has gone
wrong. Add additional error messages to make the cause of the failure
more obvious.
Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Anand Moon [Thu, 26 Dec 2019 11:33:53 +0000 (11:33 +0000)]
board: amlogic: select PWRSEQ for all amlogic platform
commit a10388dc6982 ("mmc: meson-gx: add support for mmc-pwrseq-emmc")
introduce CONFIG_PWRSEQ for power sequence for eMMC module on
amlogic platform, so enable this to all amlogic boards.
Signed-off-by: Anand Moon <linux.amoon@gmail.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Christian Hewitt [Wed, 11 Dec 2019 09:20:54 +0000 (13:20 +0400)]
boards: amlogic: add Khadas VIM3L support
Khadas VIM3L uses the same board layout as VIM3, but with an S905D3 chip
instead of A311D. Board config is derived from khadas-vim3_defconfig and
sei610_defconfig. README is based on README.khadas-vim3; the difference
is that VIM3L uses FIP files from the g12a folder in vendor sources not
the g12b folder.
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
[narmstrong: added vim3l readme into w400 MAINTAINERS]
Tom Rini [Tue, 7 Jan 2020 13:44:56 +0000 (08:44 -0500)]
Merge tag 'u-boot-atmel-2020.04-a' of https://gitlab.denx.de/u-boot/custodians/u-boot-atmel
First set of u-boot-atmel features for 2020.04 cycle
This feature set is a patch series from Tudor Ambarus which includes
parsing of the spi flash SFDP parser for SST flashes, and using those
tables to retrieve unique saved per device MAC address. This is then
used as base mac address on the SAMA5D2 Wireless SOM EK board.
The ECC registers in the SDRAM HMC Adapter should always
be accessible (both when ECC is enabled and disabled).
Currently, the registers are accessible only when ECC is enabled.
The ECC Enabled bit is used to determine the status of
ECC by later OSes so always allow access.
Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com> Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
Ley Foon Tan [Wed, 27 Nov 2019 07:55:27 +0000 (15:55 +0800)]
ddr: altera: agilex: Add SDRAM driver for Agilex
Add SDRAM driver for Agilex SoC.
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Ley Foon Tan [Wed, 27 Nov 2019 07:55:22 +0000 (15:55 +0800)]
clk: agilex: Add clock driver for Agilex
Add clock manager driver for Agilex. Provides clock initialization
and get_rate functions.
agilex-clock.h is from Linux commit ID cd2e1ad12247.
Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Ley Foon Tan [Fri, 11 Oct 2019 05:48:33 +0000 (13:48 +0800)]
spl: Allow cache drivers to be used in SPL
Add an option for building cache drivers in SPL.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
ARM: mxs: spl_boot.c: make early_delay more robust
It's true that booting normally doesn't take long enough for the
register to roll (which actually happens in a little over an hour, not
just a few seconds). However, the counter starts at power-on, and if
the board is held in reset to be booted over USB, one actually risks
hitting wrap-around during boot, which can both result in too short
delays (if the "st += delay" calculation makes st small) and
theoretically also unbound delays (if st ends up being UINT_MAX and
one just misses sampling digctl_microseconds at that point).
It doesn't take more code to DTRT, and once bitten, twice shy.
Jagan Teki [Mon, 30 Dec 2019 12:04:07 +0000 (17:34 +0530)]
ARM: dts: imx6q-icore-mipi: Use 1.5 version of i.Core MX6DL
The EDIMM STARTER KIT i.Core 1.5 MIPI Evaluation is based on
the 1.5 version of the i.Core MX6 cpu module. The 1.5 version
differs from the original one for a few details, including the
ethernet PHY interface clock provider.
With this commit, the ethernet interface works properly:
SMSC LAN8710/LAN8720 2188000.ethernet-1:00: attached PHY driver
While before using the 1.5 version, ethernet failed to startup
do to un-clocked PHY interface:
fec 2188000.ethernet eth0: could not attach to PHY
Similar fix has merged for i.Core MX6Q but missed to update for DL.
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
board: engicam: Fix the ethernet clock initialization
According to the SOM and reference board the clock
can be taken from the external pin or provided from
ENET_REF_CLK. Add a new function that make the proper
set according the board type.
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
The data sheet says that the DIV field cannot change while the CLKGATE
bit is set or modified. So do it a little more carefully, by first
clearing the bit, waiting for that to appear, then setting the DIV
field.
arm: mxs: fix comments in arch_cpu_init to match the code
The comment says to clear the bypass bit, but in fact it sets it, thus
selecting ref_xtal. And the next line of code does not set the divider
to 12, but to (the reset value of) 1.
arm: mxs: fix register definitions for clkctrl_gpmi and clkctrl_sspX
I tried clearing a bit by writing to hw_clkctrl_gpmi_clr, then
busy-waiting for it to actually clear. My board hung. The data sheet
agrees, these registers do not have _set, _clr, _tog, so fix up the
definitions. git grep -E 'clkctrl_(gpmi|ssp[0-9])_' says that nobody
uses those non-existing ops registers.
Frieder Schrempf [Wed, 11 Dec 2019 10:01:19 +0000 (10:01 +0000)]
ddr: imx8m: Return error values from LPDDR4 training
In cases when the same SPL should run on boards with i.MX8MM, that
differ in DDR configuration, it is necessary to try different
parameters and check if the training done by the firmware suceeds or
not.
Therefore we return the DDR training/initialization success to the
upper layer in order to be able to retry with different settings if
necessary.
Frieder Schrempf [Wed, 11 Dec 2019 10:06:06 +0000 (10:06 +0000)]
tools: imx8m_image: Change source path for DDR firmware to build dir
The DDR firmware binaries are not part of the U-Boot source code, so
we should look for them in the build directory, where they need to be
copied to before building U-Boot.
The ATF binary is already fetched from the build directory, but the
README files for the i.MX8M EVKs claim that it needs to be copied to
the source directory (which is still true for in-tree builds, but not
in general). Therefore we also fix the READMEs to use the build
directory as the correct location for all additional binary files.
Igor Opaniuk [Mon, 30 Dec 2019 11:56:44 +0000 (13:56 +0200)]
mach-imx: bootaux: elf firmware support
Currently imx-specific bootaux command doesn't support ELF format
firmware for Cortex-M4 core.
This patches introduces a PoC implementation of handling elf firmware
(load_elf_image_phdr() was copy-pasted from elf.c just for PoC).
ELF64 binaries isn't supported yet.
This has the advantage that the user does not need to know to which
address the binary has been linked to. However, in order to handle
and load the elf sections to the right address, we need to translate the
Cortex-M4 core memory addresses to primary/host CPU memory
addresses (Cortex A7/A9 cores).
This allows to boot firmwares from any location with just using
bootaux, e.g.:
> tftp ${loadaddr} hello_world.elf && bootaux ${loadaddr}
Similar translation table can be found in the Linux remoteproc
driver [1].
Take over maintainership for colibri_imx6/imx6ull/t30/vf modules.
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com> Acked-by: Max Krummenacher <max.krummenacher@toradex.com> Acked-by: Stefan Agner <stefan.agner@toradex.com>
projects / u-boot.git / log