Andre Przywara [Tue, 29 Jan 2019 15:54:13 +0000 (15:54 +0000)]
mmc: sunxi: Add DM clk and reset support
Now that we have the gate clocks and the reset gates in our new
Allwinner clock driver, let's make use of them in the MMC driver, when
DM_MMC is defined.
We treat the reset device as optional now, as the older SoCs don't
implement it.
Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
Jagan Teki [Tue, 29 Jan 2019 15:54:12 +0000 (15:54 +0000)]
mmc: sunxi: Add DM_MMC support for H6
Unlike other Allwinner SoC's, H6 uses a different MMC mod clock offset.
Connect that with the respective compatible string.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Jagan Teki [Tue, 29 Jan 2019 15:54:11 +0000 (15:54 +0000)]
mmc: sunxi: Add remaining compatible strings
Add MMC compatible strings for A83T, A64, H5.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Andre Przywara [Tue, 29 Jan 2019 15:54:10 +0000 (15:54 +0000)]
sunxi: clk: A80: add MMC clock support
The A80 handles resets and clock gates for the MMC devices differently,
outside of the CCU IP block. Consequently we have a separate clock
device with a separate binding for that.
Implement that with the respective clock gates and resets to allow the
A80 taking part in the DM_MMC game.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
[jagan: fix a80 mmc clock config compatible] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
Tom Rini [Tue, 22 Jan 2019 22:09:26 +0000 (17:09 -0500)]
linker: Modify linker scripts to be more generic
Make use of "IMAGE_MAX_SIZE" and "IMAGE_TEXT_BASE" rather than
CONFIG_SPL_MAX_SIZE and CONFIG_SPL_TEXT_BASE. This lets us re-use the
same script for both SPL and TPL. Add logic to scripts/Makefile.spl to
pass in the right value when preprocessing the script.
Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Jagan Teki <jagan@openedev.com> Cc: Maxime Ripard <maxime.ripard@bootlin.com> Cc: Andreas Bießmann <andreas@biessmann.org> Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Cc: Michal Simek <monstr@monstr.eu> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: York Sun <york.sun@nxp.com> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Heiko Schocher <hs@denx.de> Cc: Adam Ford <aford173@gmail.com> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Tested-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Tested-by: Adam Ford <aford173@gmail.com> #da850evm & omap3_logic_somlv Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Tom Rini [Tue, 22 Jan 2019 22:09:25 +0000 (17:09 -0500)]
rockchip: Add TPL_MAX_SIZE for RK3288
Per Kever Yang, 32768 is a reasonable max size for TPL on RK3288.
Cc: Kever Yang <kever.yang@rock-chips.com> Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Tom Rini [Tue, 22 Jan 2019 22:09:24 +0000 (17:09 -0500)]
PowerPC: Stop re-using CONFIG_SPL_TEXT_BASE for TPL
Rather than checking for CONFIG_TPL_BUILD and then re-defining
CONFIG_SPL_TEXT_BASE make use of CONFIG_TPL_TEXT_BASE directly.
Cc: York Sun <york.sun@nxp.com> Cc: Po Liu <po.liu@nxp.com> Cc: Qiang Zhao <qiang.zhao@nxp.com> Cc: Timur Tabi <timur@tabi.org> Signed-off-by: Tom Rini <trini@konsulko.com>
Michal Simek [Mon, 21 Jan 2019 12:54:57 +0000 (13:54 +0100)]
misc: i2c_eeprom: Add atmel,24c08 to the list
Linux kernel binding is using atmel,24c08 compatible string. On the
other hand there is atmel,24c08a which is not listed in the kernel.
Add compatible string without "a" suffix to be compatible with Linux
kernel binding.
These eeproms are available on several ZynqMP development boards.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
The dtoc tests need to be adapted to dtoc being changed to output platdata
structs as const, which has been introduced in commit 7d05d3a8e35f ("dtoc:
make generated platdata structs const").
Fixes: 7d05d3a8e35f ("dtoc: make generated platdata structs const") Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
Greg Czerniak [Mon, 21 Jan 2019 04:51:26 +0000 (23:51 -0500)]
atmel: add CMD_FS_GENERIC to SAMA5D3 for EFI boot
I'm working on getting OpenBSD to run on the Atmel SAMA5D3 Xplained.
OpenBSD uses an EFI bootloader, which requires the "load" command to
work, since "fatload" doesn't initialize the EFI memory addresses
properly. To get "load" on the SAMA5D3 version of U-Boot, I propose
adding the CONFIG_CMD_FS_GENERIC option.
Sam Protsenko [Fri, 18 Jan 2019 19:19:04 +0000 (21:19 +0200)]
env: Fix saving environment to "bad CRC" location
In case when the environment on some location is malformed (CRC isn't
matching), there is a chance we won't be able to save the environment to
that location. For example, consider the case when we only have the
environment on eMMC, but it's zeroed out. In that case, we won't be able
to "env save" to it, because of "bad CRC" error. That's happening
because in env_load() function we consider malformed environment as
incorrect one, and defaulting to the location with highest (0)
priority, which can be different from one we are dealing with right now
(e.g., highest priority can be ENV_FAT on SD card, which is not
inserted, but we want to use ENV_MMC on eMMC, where we were booted
from).
This issue began to reproduce after commit d30ba2315ae3 ("u-boot: remove
driver lookup loop from env_save()") on BeagleBone Black, but that
commit didn't introduce the wrong logic, it just changed the behavior
for default location to use, merely revealing this issue.
To fix that, let's implement next logic in env_load():
1. Try to find out correct environment; if found -- use it
2. If working environment wasn't found, but we found malformed one
(with bad CRC), let's use it for further "env save". But make sure
to use malformed environment location with highest priority.
3. If neither correct nor malformed environment was found, let's
default to environment location with highest priority (0)
Steps to reproduce mentioned issue on BeagleBone Black (fixed in this
patch):
1. Boot from SD card and erase eMMC in U-Boot shell:
=> mmc dev 1
=> mmc erase 0 100000
=> gpt write mmc 1 $partitions
2. Write new SPL and U-Boot to eMMC; the rest of eMMC will stay filled
with zeroes
3. Boot from eMMC; try to do:
=> env save
4. Observe the error (incorrect behavior). Correct behavior: environment
should be stored correctly on eMMC, in spite of it has "bad CRC"
Fixes: d30ba2315ae3 ("u-boot: remove driver lookup loop from env_save()") Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Sam Protsenko [Fri, 18 Jan 2019 19:19:03 +0000 (21:19 +0200)]
env: common: Return specific error code on bad CRC
Callers of env_import*() functions might want to check the case when we
have incorrect environment (with bad CRC). For example, when environment
location is being defined in env_load(), call chain may look like this:
Return code will be passed from env_import() all way up to env_load().
Right now both env_mmc_load() and env_import() return -EIO error code,
so env_load() can't differentiate between two cases:
1. Driver reports the error, because device is not accessible
2. Device is actually accessible, but environment is broken
Let's return -ENOMSG in env_import(), so we can distinguish two cases
mentioned above. It will make it possible to continue working with "bad
CRC" environment (like doing "env save"), instead of considering it not
functional (implemented in subsequent patch).
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Andrew F. Davis [Thu, 17 Jan 2019 19:43:05 +0000 (13:43 -0600)]
ARM: mach-omap2: Kconfig: Allow OMAP5 devices to set entry point
Like AM33xx and AM43xx, DRA7xx and AM57xx devices may need to
have an non-standard boot address in memory. This may be due
to the device being a high security variant, which place the
Initial SoftWare (ISW) after certificates and secure software.
Andrew F. Davis [Thu, 17 Jan 2019 19:43:04 +0000 (13:43 -0600)]
dfu: Remove dependency on HUSH parser in SPL
CLI support with the HUSH parser is not currently SPL safe due to it's
use of realloc. That function is not defined for SPLs that use
SYS_MALLOC_SIMPLE. CLI support can be built in to SPL and some functions
do work, but use of some like run_command() will cause build to fail.
When no SPL code calls this function build works as the compiler removes
this unreachable code so the unresolved symbols are ignored.
If DFU support is enabled in SPL then MMU DFU support may get brought in
also, this code does make a call to run_command() causing build to fail
if the HUSH parser is not built-in. To break this odd and unneeded
dependency chain we use CONFIG_IS_ENABLED where appropriate to prevent
calls into HUSH code from SPL. This also removes our need to pull in the
rather unrelated source file when SPL_DFU is defined.
Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Andrew F. Davis [Thu, 17 Jan 2019 19:43:03 +0000 (13:43 -0600)]
dfu: Make DFU support more SPL friendly
Do this by using $(SPL_) in Makefiles and CONFIG_IS_ENABLED in C code.
This ensures the files and features are only built into the right build
for which they are enabled. Using the macros to simplify this patch was
made possible by the config symbol rename done in the last patch.
Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Lukasz Majewski <lukma@denx.de>
Andrew F. Davis [Thu, 17 Jan 2019 19:43:02 +0000 (13:43 -0600)]
spl: Kconfig: Drop the _SUPPORT postfix from SPL_DFU
The symbol CONFIG_SPL_DFU_SUPPORT in SPL build has the same
meaning as CONFIG_DFU in regular U-Boot. Drop the _SUPPORT
to allow for cleaner use in code.
Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Lukasz Majewski <lukma@denx.de>
Fabien Parent [Thu, 17 Jan 2019 17:06:01 +0000 (18:06 +0100)]
mmc: mtk-sd: fix SPL compilation when GPIO=y and SPL_GPIO=n
It is not possible to link the SPL image when CONFIG_GPIO is enabled
but CONFIG_SPL_GPIO is not. Use the IS_ENABLED macro instead to
correctly check whether CONFIG_{SPL_}GPIO is enabled.
This commit fixes the following errors:
* undefined reference to `dm_gpio_get_value
* undefined reference to `gpio_request_by_name'
Signed-off-by: Fabien Parent <fparent@baylibre.com>
[trini: Move guard to fix warning in msdc_ops_get_wp()] Signed-off-by: Tom Rini <trini@konsulko.com>
Fabien Parent [Thu, 17 Jan 2019 17:06:00 +0000 (18:06 +0100)]
mmc: mtk-sd: fix possible incomplete read ops
The code is checking for incomplete read when it see the INT_XFER_COMPL
flag, but it forget to first check whether there is anything left in the
FIFO to copy to the RX buffer. This means that sometimes we will get
errors because of erroneous incomplete read operation.
This commit fixes the driver re-ordering the code so that we first
check for data inside the RX fifo and only after check the status
of the INT_XFER_COMPL flag.
Igor Opaniuk [Thu, 17 Jan 2019 14:37:40 +0000 (16:37 +0200)]
arm64: dt: poplar: add optee node
As Poplar supports running TF-A with OP-TEE as BL32
payload, add op-tee node in DT, which enables usage of
OP-TEE driver (which provides an interface for requesting services
from OP-TEE).
Signed-off-by: Igor Opaniuk <igor.opaniuk@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org>
Stefan Theil [Mon, 7 Jan 2019 09:25:52 +0000 (10:25 +0100)]
cmd: ximg: Invert check for fit image compression
The imgextract command runs a number of checks of
the specified fit. Where it checks for a load address
for compressed images the logic in the expression
is inverted as fit_image_check_comp returns 1 on
success and not 0.
Sean Nyekjær [Fri, 4 Jan 2019 11:37:24 +0000 (11:37 +0000)]
arm: stm32mp1: deploy spl in root folder
Deploy u-boot-spl.stm32 binary in u-boot root folder like
the rest of the boards.
This makes it more streamlined when building in Yocto, Buildroot etc..
Signed-off-by: Sean Nyekjaer <sean.nyekjaer@prevas.dk>
Tom Rini [Fri, 25 Jan 2019 15:41:24 +0000 (10:41 -0500)]
Merge tag 'arc-fixes-for-2019.04-rc1' of git://git.denx.de/u-boot-arc
A couple of trivial fixes and improvements for ARC
Most notable are:
* Move of ENV_SIZE/ENV_OFFSET to Kconfig
* Fix with private structure allocation for arc_uart
* Definition of CONFIG_SYS_CACHELINE_SIZE useful for building drivers
Alexey Brodkin [Tue, 22 Jan 2019 15:18:51 +0000 (18:18 +0300)]
serial_arc: Allocate buffer for private data
Apparently we never allocated buffer for arc_serial_platdata
which for some reason never caused problems when executed in nSIM.
But in Qemu this causes expected problems.
Alexey Brodkin [Wed, 9 Jan 2019 08:22:40 +0000 (11:22 +0300)]
serial: Get rid of CONFIG_DW_SERIAL
CONFIG_DW_SERIAL is no longer used anywhere so let's forget about it.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: Tom Rini <trini@konsulko.com> Cc: Adam Ford <aford173@gmail.com> Cc: Mario Six <mario.six@gdsys.cc> Cc: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi> Cc: Alex Kiernan <alex.kiernan@gmail.com> Cc: "Jorg Krause" <joerg.krause@embedded.rocks> Cc: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Chris Packham [Mon, 26 Nov 2018 08:00:29 +0000 (21:00 +1300)]
net: remove CONFIG_MCAST_TFTP
No mainline board enables CONFIG_MCAST_TFTP and there have been
compilation issues with the code for some time. Additionally, it has a
potential buffer underrun issue (reported as a side note in
CVE-2018-18439).
Remove the multicast TFTP code but keep the driver API for the future
addition of IPv6.
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Signed-off-by: Chris Packham <judge.packham@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Chris Packham [Mon, 26 Nov 2018 08:00:28 +0000 (21:00 +1300)]
net: move ether_crc to tsec driver
ether_crc was added to the core net code in commit 53a5c424bf86
("multicast tftp: RFC2090") so that other drivers could use it. However
the only current user of it is tsec.c so move it there.
Signed-off-by: Chris Packham <judge.packham@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Carlo Caione [Wed, 16 Jan 2019 11:34:50 +0000 (11:34 +0000)]
net: phy: realtek: Add functions to read PHY's extended registers
According to the datasheet to access the extended registers we have to:
1. Write Register 31 Data = 0x0XYZ (Page 0xXYZ)
2. Read/Write the target Register Data
3. Write Register 31 Data = 0x0000 or 0xa42 (switch back to IEEE
Standard Registers)
Hook the missing functions so that we can use the `mdio rx/wx` command to
easily access the extended registers.
Signed-off-by: Carlo Caione <ccaione@baylibre.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
For KSZ9021, all skew register fields are 4-bit wide.
For KSZ9031, the clock skew register fields are 5-bit wide.
The common code in ksz90x1_of_config_group calculating the combined
register value checks if the requested value is above the maximum
and uses this maximum if so. The calculation of this maximum uses
the register width, but the check itself does not. It uses a hardcoded
value of 0xf, which is too low in case of the 5-bit clock (0x1f).
This detail was probably lost during driver unification.
Effect (only for KSZ9031 clock skews): For values greater 900 (== 0ps),
this silently results in 1860 (== +960ps) instead of the requested one.
Fix the check by using the bit width instead of hardcoded value(s).
Signed-off-by: Andreas Pretzsch <apr@cn-eng.de> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Thomas RIENOESSL [Wed, 21 Nov 2018 14:56:07 +0000 (15:56 +0100)]
net: explicitly assign errno to return code in case of network failure
When dealing with two ethernet ports and having "netretry" set
to "once", it could occur that the connection (e.g. an ARP
request) failed, hence the status of the netloop was
"NETLOOP_FAIL". Due to the setting of "netretry", the network
logic would then switch to the other network interface,
assigning "ret" with the return value of "net_start_again()".
If this call succeeded we would return 0 (i.e. success) to
the caller when in reality the network action failed.
Signed-off-by: Thomas RIENOESSL <thomas.rienoessl@bachmann.info> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Baruch Siach [Wed, 21 Nov 2018 11:05:34 +0000 (13:05 +0200)]
net: mvpp2: mdio device per port
Current code forces all ports on a given Ethernet device to use the same
mdio device. In practice different ports might be wired to separate mdio
devices. Move the mdio device from the container struct mvpp2 to the per
port struct mvpp2_port.
Cc: Ken Ma <make@marvell.com> Cc: Stefan Chulski <stefanc@marvell.com> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Stefan Roese <sr@denx.de> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Baruch Siach [Wed, 21 Nov 2018 11:05:33 +0000 (13:05 +0200)]
net: mvpp2: fix lookup of mdio registers base address
Current mdio base lookup code relies on a 'reg' property at the upper CP
node. There is no 'reg' property there in current DT files of Armada
CP110. Use ofnode_get_addr() instead since it provides proper DT address
translation.
Cc: Ken Ma <make@marvell.com> Cc: Stefan Chulski <stefanc@marvell.com> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Stefan Roese <sr@denx.de> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Short frames are padded to the minimum allowed size of 60 bytes.
However, the designware driver sends old data in these padding bytes.
It is common practice to zero out these padding bytes ro prevent
leaking memory contents to other hosts.
Fix the padding code to zero out the padded bytes at the end.
Tested on socfpga gen5.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
The designware driver has a bug in setting the tx length into the dma
descriptor: it always or's the length into the descriptor without
zeroing out the length mask before.
This results in occasional packets being transmitted with a length
greater than they should be (trailer). Due to the nature of Ethernet
allowing such a trailer, most packets seem to be parsed fine by remote
hosts, which is probably why this hasn't been noticed.
Fix this by correctly clearing the size mask before setting the new
length.
Tested on socfpga gen5.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Pankaj Bansal [Fri, 16 Nov 2018 06:26:18 +0000 (06:26 +0000)]
net: phy: Add clause 45 identifier to phy_device
The phy devices can be accessed via clause 22 or via clause 45.
This information can be deduced when we read phy id. if the phy id
is read without giving any MDIO Manageable Device Address (MMD), then
it conforms to clause 22. otherwise it conforms to clause 45.
Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Mike Looijmans [Fri, 18 Jan 2019 08:02:48 +0000 (09:02 +0100)]
board: topic-miamiplus: Run IO PLL at 1000 MHz
The miamiplus can use GEM0 through MIO pins, which requires a 125 MHz TX
clock to be generated. With the IO PLL at 1200 MHz this isn't possible, so
change it to run at 1000 and adjust the divisors accordingly. Also set the
GEM0 clock source to MIO instead of EMIO.
Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Mike Looijmans [Fri, 18 Jan 2019 08:02:47 +0000 (09:02 +0100)]
topic-miamiplus: Run CPU at 800MHz for speedgrade-2
The miamiplus contains a speedgrade-2 device, which may run the CPU at 800MHz.
Change the PLL setting to 800MHz, and adapt the setpoints in the devicetree.
Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Fri, 18 Jan 2019 09:43:39 +0000 (10:43 +0100)]
i2c: cdns: Convert to livetree function
Update cadence i2c driver to support livetree
Similar changes were done by:
"net: zynq_gem: convert to use livetree"
(sha1: 26026e695afa794ac018a09e79a48120d322b60d)
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch enables CONFIG_REMAKE_ELF for Zynq platform
so that it generates u-boot.elf from binary which works
for all Zynq boards with OF_SEPARATE option enabled.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Wed, 16 Jan 2019 11:14:00 +0000 (12:14 +0100)]
arm64: zynqmp: Align u-boot-spl.bin for boot.bin creation
Bootrom is not capable to work with non align bootloader partition
that's why it is necessary to align it before boot.bin creation.
The patch is creating new spl/u-boot-spl-align.bin which is used only
for boot.bin.
Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Bootrom is not capable to work with non aligned bootloader sizes.
SPL with OF_SEPARATE generates non-align images quite often that's
why this change is required before OF_SEPARATE enableding.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Tue, 15 Jan 2019 09:45:41 +0000 (10:45 +0100)]
arm64: zynqmp: Enable ISSI flash for some platforms
Enable ISSI flash for platforms. Xilinx reference boards are also used
internally with different flash part to increase coverage that's why
enable also ISSI parts for all these boards even if that board is
released only with one part.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
arm64: zynqmp: Fix mmc node names to be in sync with kernel
This patches renames sd nodes in dts to be in line with
kernel. This patch also modifies the references for the same
in code.
It checks mmc first to have no time penalty for new DT node names based
on left-to-right expression evaluation.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Stefan Theil [Mon, 17 Dec 2018 08:12:30 +0000 (09:12 +0100)]
zynq-gem: Use appropriate cache flush/invalidate for RX and TX
The cache was only flushed before *transmitting* packets, but not
when receiving them, leading to an issue where new packets were
handed to the receive handler with old contents in cache. This
only happens when a lot of packets are received without sending
packages every now and then. Also flushing the receive buffers
in the transmit function makes no sense and can be removed.
Signed-off-by: Stefan Theil <stefan.theil@mixed-mode.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
projects / u-boot.git / log