Simon Glass [Tue, 18 Oct 2022 12:24:16 +0000 (06:24 -0600)]
video: Split SPLASH_SCREEN_ALIGN from bmp command
The bmp command already has a way to centre the image. Using this CONFIG
option to also centre it makes it impossible to control where images are
placed on the screen. Drop the extra check.
Simon Glass [Thu, 6 Oct 2022 14:36:11 +0000 (08:36 -0600)]
video: Refactor to allow more than one font size
At present the truetype console supports only a single font and size. It
is useful to be able to support different combinations. As a first step,
move the metrics into there own structure and allow having multiple
metrics.
Simon Glass [Thu, 6 Oct 2022 14:36:03 +0000 (08:36 -0600)]
video: Move console colours to the video uclass
At present these are attached to vidconsole which means that the video
uclass requires that a console is enabled. This is not the intention.
The colours are a reasonable way of indexing common colours in any case,
so move them to the video uclass instead.
Rename vid_console_color() to video_index_to_colour() now that it is more
generic. Also fix the inconsistent spelling in these functions.
John Keeping [Wed, 7 Sep 2022 11:06:32 +0000 (12:06 +0100)]
video: dw_mipi_dsi: fix [hv]sync active vs back porch
The wrong fields are pulled out of the timings here so the values
programmed into the DSI_VID_HSA_LINES/DSI_VID_HBP_LINES and
DSI_VID_VSA_LINES/DSI_VID_VBP_LINES registers are swapped.
Use the right fields so that the correct values are programmed.
There are two problems with both strcmp and strncmp:
(1) The C standard is clear that the contents should be compared as
"unsigned char":
The sign of a nonzero value returned by the comparison functions
memcmp, strcmp, and strncmp is determined by the sign of the
difference between the values of the first pair of characters (both
interpreted as unsigned char) that differ in the objects being
compared.
(2) The difference between two char (or unsigned char) values can
range from -255 to +255; so that's (due to integer promotion) the
range of values we could get in the *cs-*ct expressions, but when that
is then shoe-horned into an 8-bit quantity the sign may of course
change.
The impact is somewhat limited by the way these functions
are used in practice:
- Most of the time, one is only interested in equality (or for
strncmp, "starts with"), and the existing functions do correctly
return 0 if and only if the strings are equal [for strncmp, up to
the given bound].
- Also most of the time, the strings being compared only consist of
ASCII characters, i.e. have values in the range [0, 127], and in
that case it doesn't matter if they are interpreted as signed or
unsigned char, and the possible difference range is bounded to
[-127, 127] which does fit the signed char.
For size, one could implement strcmp() in terms of strncmp() - just
make it "return strncmp(a, b, (size_t)-1);". However, performance of
strcmp() does matter somewhat, since it is used all over when parsing
and matching DT nodes and properties, so let's find some other place
to save those ~30 bytes.
- Reduce memory usage in SPL in some cases, clarify some standalone API
license issues, fix a Kconfig dependency, pin to a specific version of
python setuptools for now, fix a signing problem in mkimage and add a
memory uclass.
Roger Quadros [Thu, 20 Oct 2022 13:30:49 +0000 (16:30 +0300)]
memory: Add TI GPMC driver
The GPMC is a unified memory controller dedicated for interfacing
with external memory devices like
- Asynchronous SRAM-like memories and ASICs
- Asynchronous, synchronous, and page mode burst NOR flash
- NAND flash
- Pseudo-SRAM devices
This driver will take care of setting up the GPMC based on
the settings specified in the Device tree and then
probe its children.
Roger Quadros [Thu, 20 Oct 2022 13:30:48 +0000 (16:30 +0300)]
dt/bindings: memory: Add bindings for TI GPMC driver
GPMC stands for General Purpose Memory Controller and it is
present on many Texas Instruments SoCs.
It supports a number of Asynchronous and Synchronous interfaces
and has various settings to configure the bus interface.
The DT bindings define all the various GPMC settings.
As the GPMC supports multiple devices on the bus, each
device is represented as a child and the respective
GPMC settings are situated there. (see ti,gpmc-child.yaml)
These binding docs are picked up from the Linux kernel.
Simon Glass [Sat, 22 Oct 2022 01:30:43 +0000 (19:30 -0600)]
test: Move to a working version of setuptools
The version used on Ubuntu 2022.04 produces a number of warnings:
/usr/lib/python3/dist-packages/pkg_resources/__init__.py:116:
PkgResourcesDeprecationWarning: 1.16.0-unknown is an invalid version
and will not be supported in a future release
Same with: 0.1.43ubuntu1 11.4.1ubuntu1 2.22.1ubuntu1 1.1build1
According to [1] this is a bug in setuptools. Employ the workaround for
now.
Paul Barker [Thu, 5 May 2022 15:32:41 +0000 (15:32 +0000)]
examples: hello_world: Drop inclusion of common header
The "common.h" header is not covered by the licensing exception for
standalone applications. Let's drop inclusion of this header from the
hello_world example to prove that a standalone app can be built without
it.
Signed-off-by: Paul Barker <paul.barker@sancloud.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Paul Barker [Thu, 5 May 2022 15:32:40 +0000 (15:32 +0000)]
Licenses: Clarify exceptions for standalone apps
On 2010-01-27, an email [1] was sent to the mailing list by Wolfgang
Denk which clarified the intended licensing exceptions for standalone
applications. As the "export.h" header and the "stubs.c" source files
are required to implement a standalone application, the intention was
that these files be covered by the licensing exception. This is made
clear in the following quotes from that email:
"exports.h" should be added to the "allowed" file list; there should
be no need to include "common.h". Eventually this needs fixing.
Patches are welcome.
"examples/standalone/stubs.c" should be added to the "allowed" file
list (the ppc_*jmp.S files are LGPLed).
There should be no doubts - the intention is clear, the current state
may need improvement. Help (read: patches) welcome.
Roger Quadros [Thu, 29 Sep 2022 10:11:28 +0000 (13:11 +0300)]
spl: spl_legacy: Fix NAND boot on OMAP3 BeagleBoard
OMAP3 BeagleBoard NAND boot hangs when spl_load_legacy_img() tries
to read the header into 'struct hdr' which is allocated on the
stack.
As the header has already been read once before by spl_nand.c,
we can avoid the extra header allocation and read here by
simply passing around the pointer to the header.
This fixes NAND boot on OMAP3 BeagleBoard.
Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com>
Sean Anderson [Thu, 20 Oct 2022 19:41:10 +0000 (15:41 -0400)]
mkimage: fit: Fix signing of configs with external data
Just like we exclude data-size, data-position, and data-offset from
fit_config_check_sig, we must exclude them while signing as well.
While we're at it, use the FIT_DATA_* defines for fit_config_check_sig
as welll.
Fixes: 8edecd3110e ("fit: Fix verification of images with external data") Fixes: c522949a29d ("rsa: sig: fix config signature check for fit with padding") Signed-off-by: Sean Anderson <sean.anderson@seco.com> Reviewed-by: Simon Glass <sjg@chromium.org>
- nuvoton: add expire function for generic reset (Jim)
- handle watchdogs during keyed autoboot (Rasmus)
- cyclic: Don't disable cylic function upon exceeding CPU time (Stefan)
- ulp wdog: Updates to support iMX93 and DM (Alice)
John Keeping [Thu, 8 Sep 2022 11:38:35 +0000 (12:38 +0100)]
power: regulator: fix autoset error handling
If a regulator does not support .set_suspend_enable or
.set_suspend_value then ret is set to ENOSYS early in the function.
The most serious impact of this is that when no automatic setting of
voltage is needed then the final regulator_set_enable() is skipped
because ret has not been cleared.
It seems that the error handling for regulator_set_suspend_value() is
also wrong as if this succeeds then the normal boot-on checks are still
required, and again ENOSYS needs special treatment here.
Fixes: 11406b8f7e ("dm: regulator: support regulator more state") Signed-off-by: John Keeping <john@metanate.com>
Marek Vasut [Wed, 28 Sep 2022 16:45:04 +0000 (18:45 +0200)]
cmd: sf: Handle unaligned 'update' start offset
Currently the 'sf update' command fails in case the 'start' offset is
not aligned to SPI NOR erase block size. Add the missing alignment
calculation. In case the start offset is in the middle of erase block,
round start address down to the nearest aligned one, compare only the
updated data between what is in the SPI NOR and what is being written,
copy new data at offset of the compare buffer, and write back the entire
erase block.
This is useful e.g. on i.MX6Q where the u-boot-with-spl.imx is at
offset 0x400 in the SPI NOR, while the SPI NOR may have erase block
size e.g. 0x1000 bytes.
Signed-off-by: Marek Vasut <marex@denx.de> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tom Rini [Tue, 25 Oct 2022 01:28:47 +0000 (21:28 -0400)]
Merge tag 'fsl-qoriq-2022-10-18' of https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq
Layerscape update
- support sysreset,
- de-select FSL_IFC when booting from SD
- disable unused parts of ICID tables
- reduce ns_dev size for csu
- enable dma snooping for ls104x
- nand driver fixups for ls1043ardb rev 7.0 boards.
- for 2022.01
- rework Kontron boards (mx6 and mx8)
- fixes for Toradex
- fixes (SPI, CAAM, )
- sync DT with Linux
- fixes for Gateworks GW7903 and GW7904 PMIC
- Engicam i.Core MX8M Plus EDIMM2.2
Marcel Ziswiler [Sat, 22 Oct 2022 21:59:45 +0000 (23:59 +0200)]
imx28: avoid num_cs and spi_max_frequency build errors
Avoid the following build errors after the device tree sync:
drivers/spi/mxs_spi.c: In function ‘mxs_spi_probe’:
drivers/spi/mxs_spi.c:327:25: error: ‘struct dtd_fsl_imx23_spi’ has no
member named ‘spi_max_frequency’
327 | priv->max_freq = dtplat->spi_max_frequency;
| ^~
drivers/spi/mxs_spi.c:328:23: error: ‘struct dtd_fsl_imx23_spi’ has no
member named ‘num_cs’
328 | plat->num_cs = dtplat->num_cs;
| ^~
Adam Ford [Sat, 22 Oct 2022 00:58:31 +0000 (19:58 -0500)]
arm: dts: imx8mn-u-boot: Create common imx8mn-u-boot.dtsi
Multiple boards create duplicate entries in their respective
-u-boot.dtsi files which all basically do the same thing.
To consolidate these and make it easier to make improvements
going forward, consolidate them all into one place.
This file creates a flash.bin image using binman, and supports
LPDDR4, DDR4 and DDR3. Since individual boards use different
peripherals and different UART ports, those entries were kept
in their respective board files, but the spba1 node was addded
which contains all UART1-3 to help facilitate SPL_DM_SERIAL.
Individual users will still need to include their respective
UART and pinctrl nodes for those UARTS.
This consolidated file also supports generating a flash.bin file
which can boot from flexSPI if CONFIG_FSPI_CONF_HEADER is
enabled.
Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Fabio Estevam <festevam@denx.de>
Commit 290ffe5788 (imx8m: fix reading of DDR4 MR registers) lifted a
private definition of lpddr4_mr_read() from imx8mm-cl-iot-gate board
code to drivers/ddr/imx/imx8m/ddrphy_utils.c, because that version
actually seems to work in practice.
However, commit 99c7cc58e1 (ddr: imx: Add i.MX9 DDR controller driver)
reintroduced the broken version in drivers/ddr/imx/imx8m/ddr_init.c,
copied most of the rest of ddrphy_utils.c to
drivers/ddr/imx/phy/ddrphy_utils.c, and stopped building
drivers/ddr/imx/imx8m/ddrphy_utils.c [and that file was then finally
completely removed with 7e9bd84883 (imx8m: ddrphy_utils: Remove unused
file)].
I assume this must have broken the imx8mm-cl-iot-gate board, at least
those that have not had their eeprom programmed with the proper
information. It certainly did break our out-of-tree board which always
reads back the ID register and uses that for a sanity check.
verdin-imx8mm: various config additions and improvements
- enable bootcount command
- integrate bootcount using SNVS_LP general purpose register LPGPR0
- enable link-time optimisation
- explicitly set a boot delay of one second
- enable CRC32 and MD5
- enable command for low-level access to data in a partition
- enable time commands
- enable PMIC commands
- improve ETHPRIME configuration
- enable eMMC HS400 functionality
- enable fixed PHY and MDIO driver model
- remove stale PFUZE100 PMIC driver
- enable thermal management unit driver
- enable more USB host functionality
- enable hexdump
Update the distro config env memory layout for the Verdin iMX8M Mini and
Verdin iMX8M Plus again:
- loadaddr=0x48200000 allows for 128MB area for uncompressing (ie FIT
images, kernel_comp_addr_r, kernel_comp_size)
- fdt_addr_r = loadaddr + 128MB - allows for 128MB kernel
- scriptaddr = fdt_addr_r + 512KB - allows for 512KB fdt
- ramdisk_addr_r = scriptaddr + 512KB - allows for 512KB script
Memory layout taken from commit fd5c7173ade4
("imx8m{m,n}_venice: update env memory layout").
Note that for our regular BSP Layers and Reference Images for Yocto
Project an updated distro boot script is required (see
meta-toradex-bsp-common/recipes-bsp/u-boot/u-boot-distro-boot).
Note that this corrects a pre-maturely applied version 2 of the same
patch set.
Tim Harvey [Wed, 14 Sep 2022 16:02:19 +0000 (09:02 -0700)]
board: gateworks: venice: add imx8mm-gw7904 support
The GW7904 is based on the i.MX 8M Mini SoC featuring:
- LPDDR4 DRAM
- eMMC FLASH
- microSD connector with UHS support
- LIS2DE12 3-axis accelerometer
- Gateworks System Controller
- IMX8M FEC
- 2x RS232 off-board connectors
- PMIC
- 10x bi-color LED's
- 1x miniPCIe socket with PCIe and USB2.0
- 802.3at Class 4 PoE
- 10-30VDC input via barrel-jack
Genaral features:
- LCD 7" C.Touch
- microSD slot
- Ethernet 1Gb
- Wifi/BT
- 2x LVDS Full HD interfaces
- 3x USB 2.0
- 1x USB 3.0
- HDMI Out
- Plus PCIe
- MIPI CSI
- 2x CAN
- Audio Out
i.Core MX8M Plus is an EDIMM SoM based on NXP i.MX8M Plus from Engicam.
i.Core MX8M Plus needs to mount on top of this Evaluation board for
creating complete i.Core MX8M Plus EDIMM2.2 Starter Kit.
Add support for it.
Sync the i.Core MX8M Plus is an EDIMM SoM based on NXP
devicetree file from linux-next tree.
commit <aec8ad34f7f24> (arm64: dts: imx8mp: Add Engicam i.Core MX8M Plus EDIMM2.2 Starter Kit)
Signed-off-by: Manoj Sai <abbaraju.manojsai@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Manoj Sai [Fri, 26 Aug 2022 12:33:35 +0000 (18:03 +0530)]
arm64: dts: imx8mp: Add Engicam i.Core MX8M Plus SoM
i.Core MX8M Plus is an EDIMM SoM based on NXP i.MX8M Plus
from Engicam.
General features:
- NXP i.MX8M Plus
- Up to 4GB LDDR4
- 8 eMMC
- Gigabit Ethernet
- USB 3.0, 2.0 Host/OTG
- PCIe 3.0 interface
- I2S
- LVDS
- rest of i.MX8M Plus features
i.Core MX8M Plus needs to mount on top of Engicam baseboards
for creating complete platform solutions.
Add support for it.
Sync the i.Core MX8M Plus is an EDIMM SoM based on NXP i.MX8M Plus
from Engicam devicetree file from linux-next tree.
commit <eefe06b295087> (arm64: dts: imx8mp: Add Engicam i.Core MX8M Plus SoM)
Signed-off-by: Manoj Sai <abbaraju.manojsai@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Alice Guo [Fri, 21 Oct 2022 08:41:18 +0000 (16:41 +0800)]
watchdog: ulp_wdog: add driver model for ulp watchdog driver
Enable driver model for ulp watchdog timer. When CONFIG_WDT=y and the
status of device node is "okay", initr_watchdog will be called and
finally calls ulp_wdt_probe() and ulp_wdt_start().
Signed-off-by: Alice Guo <alice.guo@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com> Reviewed-by: Stefan Roese <sr@denx.de>
Alice Guo [Fri, 21 Oct 2022 08:41:17 +0000 (16:41 +0800)]
watchdog: ulp_wdog: enable watchdog interrupt on imx93
The reset source of the external PMIC on i.MX93 is WDOG_ANY PAD and the
source of WDOG_ANY PAD is interrupt. Therefore, using PMIC to reset
needs to enable the watchdog interrupt.
Signed-off-by: Alice Guo <alice.guo@nxp.com> Reviewed-by: Stefan Roese <sr@denx.de>
Alice Guo [Fri, 21 Oct 2022 08:41:16 +0000 (16:41 +0800)]
watchdog: ulp_wdog: Update watchdog driver for imx93
The WDOG clocks are sourced from the fixed 32KHz (lpo_clk).When the
timeout period exceeds 2 seconds, the value written to the TOVAL
register is larger than 16-bit can represent. Enabling watchdog
prescaler to solve this problem.
Signed-off-by: Alice Guo <alice.guo@nxp.com> Reviewed-by: Stefan Roese <sr@denx.de>
Ye Li [Fri, 21 Oct 2022 08:41:15 +0000 (16:41 +0800)]
ulp_wdog: Update ulp wdog driver for 32bits command
To use 32bits refresh and unlock command as default, check the CMD32EN
bit to select the corresponding commands.
Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Alice Guo <alice.guo@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Stefan Roese <sr@denx.de>
Stefan Roese [Mon, 17 Oct 2022 07:00:58 +0000 (09:00 +0200)]
cyclic: Don't disable cylic function upon exceeding CPU time
With the migration of the watchdog infrastructure to cyclic functions
it's been noticed, that at least one watchdog driver is broken now. As
the execution time of it's watchdog reset function is quite long.
In general it's not really necessary (right now) to disable the cyclic
function upon exceeding CPU time usage. So instead of disabling the
cylic function in this case, let's just print a warning once to show
this potential problem to the user.
Signed-off-by: Stefan Roese <sr@denx.de> Suggested-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Cc: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Cc: Tom Rini <trini@konsulko.com> Cc: Pali Rohár <pali@kernel.org>
In order to test that we properly handle watchdog(s) during the "wait
for the user to interrupt autoboot" phase, we need a watchdog device
to be watching us.
In order to test that U-Boot actually maintains the watchdog device(s)
during long-running busy-loops, such as those where we wait for the
user to stop autoboot, we need a watchdog device that actually does
something during those loops; we cannot test that behaviour via the DM
test framework.
So introduce a relatively simple watchdog device which is simply based
on calling the host OS' alarm() function; that has the nice property
that a new call to alarm() simply sets a new deadline, and alarm(0)
cancels any existing alarm. These properties are precisely what we
need to implement start/reset/stop. We install our own handler so that
we get a known message printed if and when the watchdog fires, and by
just invoking that handler directly, we get expire_now for free.
The actual calls to the various OS functions (alarm, signal, raise)
need to be done in os.c, and since the driver code cannot get access
to the values of SIGALRM or SIG_DFL (that would require including a
host header, and that's only os.c which can do that), we cannot simply
do trivial wrappers for signal() and raise(), but instead create
specialized functions just for use by this driver.
Apart from enabling this driver for sandbox{,64}_defconfig, also
enable the wdt command which was useful for hand-testing this new
driver (especially with running u-boot under strace).
This is a companion to u-boot,noautostart. If one has a single
watchdog device that one does want to have auto-started, but several
others that one doesn't, the only way currently is to set the
CONFIG_WATCHDOG_AUTOSTART and then use the opt-out for the majority.
The main motivation for this is to add an autostarted watchdog device
to the sandbox (to test a fix) without having to set AUTOSTART in
sandbox_defconfig and add the noautostart property to the existing
devices. But it's also nice for symmetry, and the logic in
init_watchdog_dev() becomes simpler to read because we avoid all the
negations.
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