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10 months agoarm: dts: rockpro64: Add RockPro64 smbios
Shantur Rathore [Mon, 13 Nov 2023 11:23:09 +0000 (11:23 +0000)]
arm: dts: rockpro64: Add RockPro64 smbios

Add smbios information for Pine64 RockPro64 board and enable in
config

Signed-off-by: Shantur Rathore <i@shantur.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
10 months agorockchip: rk3568-generic: Enable eMMC HS200 mode
Jonas Karlman [Wed, 31 Jan 2024 22:07:14 +0000 (22:07 +0000)]
rockchip: rk3568-generic: Enable eMMC HS200 mode

Writing to eMMC using HS200 mode work more reliably then other modes on
RK356x boards.

Add device tree props and enable Kconfig options for eMMC HS200 mode on
the generic RK3566/RK3568 board. Also enable the pinctrl driver in SPL
and add missing rk3568-generic.dtb to Makefile.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
10 months agorockchip: rk3588-evb: Enable USB support
Andy Yan [Sat, 3 Feb 2024 11:31:07 +0000 (19:31 +0800)]
rockchip: rk3588-evb: Enable USB support

Enable USB releated config to support
boot from usb.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
10 months agommc: rockchip_sdhci: Fix HS400 mode write on RK3568
Jonas Karlman [Sun, 4 Feb 2024 20:53:07 +0000 (20:53 +0000)]
mmc: rockchip_sdhci: Fix HS400 mode write on RK3568

Testing has shown that writing to eMMC using HS400 modes on RK3568
result in an ERROR.

Change the tap number for transmit clock to fix this.

Also stop DLL when config_dll() is called to disable DLL.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
10 months agorockchip: rk35xx: Enable eMMC HS200 mode by default
Jonas Karlman [Sun, 4 Feb 2024 20:53:06 +0000 (20:53 +0000)]
rockchip: rk35xx: Enable eMMC HS200 mode by default

Testing has shown that writing to eMMC using a slower mode then HS200
typically generate an ERROR on first attempt on RK3588.

  # Rescan using MMC legacy mode
  => mmc rescan 0

  # Write a single block to sector 0x4000 fails with ERROR
  => mmc write 20000000 4000 1

  # Write a single block to sector 0x4000 now works
  => mmc write 20000000 4000 1

With the MMC_SPEED_MODE_SET Kconfig option enabled.

Writing to eMMC using HS200 mode work more reliably than slower modes on
RK35xx boards. Enable MMC_HS200_SUPPORT Kconfig option by default to
prefer use of HS200 mode on RK356x and RK3588.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
10 months agorockchip: rk35xx: Remove use of eMMC DDR52 mode
Jonas Karlman [Sun, 4 Feb 2024 20:53:05 +0000 (20:53 +0000)]
rockchip: rk35xx: Remove use of eMMC DDR52 mode

Testing has shown that writing to eMMC using DDR52 mode does not seem to
work on RK356x and RK3588 boards.

A simple test of writing a single block to e.g. sector 0x4000 fails:

  # Rescan using DDR52 mode
  => mmc rescan 4

  # Write a single block to sector 0x4000 fails with ERROR
  => mmc write 20000000 4000 1

With the MMC_SPEED_MODE_SET Kconfig option enabled.

Fix this by removing the mmc-ddr-1_8v prop from sdhci nodes in affected
board u-boot.dtsi files.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
10 months agorockchip: rk3588-quartzpro64: Enable AHCI, PCI and USB
Jonas Karlman [Fri, 26 Jan 2024 23:39:05 +0000 (23:39 +0000)]
rockchip: rk3588-quartzpro64: Enable AHCI, PCI and USB

Enable Kconfig options to support AHCI, PCI and USB features. This help
keep rk3588-quartzpro64 in sync with other RK3588 boards.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
10 months agorockchip: rk3588: Enable eMMC HS200 mode
Jonas Karlman [Fri, 26 Jan 2024 23:26:09 +0000 (23:26 +0000)]
rockchip: rk3588: Enable eMMC HS200 mode

Writing to eMMC using HS200 mode work more reliably then other modes on
RK3588 boards.

Enable MMC_HS200_SUPPORT Kconfig option to prefer use of HS200 mode.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Weizhao Ouyang <o451686892@gmail.com>
10 months agorockchip: rk35xx: Remove unnecessary status props
Jonas Karlman [Fri, 26 Jan 2024 22:14:55 +0000 (22:14 +0000)]
rockchip: rk35xx: Remove unnecessary status props

Remove unnecessary status props from rk35xx u-boot.dtsi files, regular
device tree files or default value already enable the affected nodes.

Also reorder bootph-pre-ram and clock-frequency props alphabetically in
rk3588s-u-boot.dtsi uart2 node.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
10 months agorockchip: rk3588: Add default u-boot,spl-boot-order prop
Jonas Karlman [Fri, 26 Jan 2024 22:14:54 +0000 (22:14 +0000)]
rockchip: rk3588: Add default u-boot,spl-boot-order prop

Add a default u-boot,spl-boot-order prop to rk3588s-u-boot.dtsi and
remove the prop from board u-boot.dtsi files using the default value.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Eugen Hristev <eugen.hristev@collabora.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
10 months agorockchip: rk3588: Sync device tree from linux v6.8-rc1
Jonas Karlman [Fri, 26 Jan 2024 22:14:53 +0000 (22:14 +0000)]
rockchip: rk3588: Sync device tree from linux v6.8-rc1

Sync rk3588 device tree from linux v6.8-rc1.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
10 months agorockchip: rk3588: Sync device tree with linux v6.7
Jonas Karlman [Fri, 26 Jan 2024 22:14:52 +0000 (22:14 +0000)]
rockchip: rk3588: Sync device tree with linux v6.7

Sync rk3588 device tree from linux v6.7.

Also drop the rockchip,rk3568-dwc3 compatible now that dwc3-generic
driver support the rockchip,rk3588-dwc3 compatible.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
10 months agorockchip: rk356x: Move common uart2 props to rk356x-u-boot.dtsi
Jonas Karlman [Fri, 26 Jan 2024 22:14:51 +0000 (22:14 +0000)]
rockchip: rk356x: Move common uart2 props to rk356x-u-boot.dtsi

Move uart2 bootph-pre-ram and clock-frequency props from board to SoC
u-boot.dtsi. Regular board device tree already enables the uart2 node,
so status prop is dropped from u-boot.dtsi file.

Also remove unnecessary stdout-path = &uart2, regular board device tree
already provide a stdout-path = "serial2:" value.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
10 months agorockchip: rk356x: Sync device tree from linux v6.8-rc1
Jonas Karlman [Fri, 26 Jan 2024 22:14:50 +0000 (22:14 +0000)]
rockchip: rk356x: Sync device tree from linux v6.8-rc1

Sync rk356x device tree from linux v6.8-rc1.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
10 months agorockchip: rk356x: Sync device tree from linux v6.7
Jonas Karlman [Fri, 26 Jan 2024 22:14:49 +0000 (22:14 +0000)]
rockchip: rk356x: Sync device tree from linux v6.7

Sync rk356x device tree from linux v6.7.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
10 months agoarch: arm: mach-rockchip: Kconfig: Enable BOOTSTD_FULL for RK3399 and RK3588
Shantur Rathore [Sun, 21 Jan 2024 22:04:47 +0000 (22:04 +0000)]
arch: arm: mach-rockchip: Kconfig: Enable BOOTSTD_FULL for RK3399 and RK3588

Rockchip RK3399 and RK3588 SoCs can support wide range of bootflows.
Without full bootflow commands, it can be difficult to
figure out issues if any, hence enable by default.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Shantur Rathore <i@shantur.com>
10 months agorockchip: rv1126: Move RAM disk address
Tim Lunn [Wed, 24 Jan 2024 03:26:02 +0000 (14:26 +1100)]
rockchip: rv1126: Move RAM disk address

OPTEE gets loaded into a memory region overlapping with the ram disk.

Fix the ramdisk address so it doesn't overlap with the OPTEE memory
region.

Signed-off-by: Tim Lunn <tim@feathertop.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
10 months agorockchip: rv1126: select SPL_OPTEE_IMAGE
Tim Lunn [Wed, 24 Jan 2024 03:26:01 +0000 (14:26 +1100)]
rockchip: rv1126: select SPL_OPTEE_IMAGE

rv1126 requires OPTEE as it provides pcsi support. Mainline Linux
kernel will fail to boot without this.

Select SPL_OPTEE_IMAGE when building FIT image. TEE must be provided
when building.

Signed-off-by: Tim Lunn <tim@feathertop.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
10 months agoboard: rockchip: Add Sonoff iHost board
Tim Lunn [Wed, 24 Jan 2024 03:26:00 +0000 (14:26 +1100)]
board: rockchip: Add Sonoff iHost board

Sonoff iHost is gateway device designed to provide a Smart Home Hub,
it is based on Rockchip RV1126. There is also a version with 2GB RAM
based off the RV1109 dual core SoC however this works with the same
config as the RV1126 for uboot purposes.

Features:
- Rockchip RV1126
- 4GB DDR4
- 8GB eMMC
- microSD slot
- RMII Ethernet PHY
- 1x USB 2.0 Host
- 1x USB 2.0 OTG
- Realtek RTL8723DS WiFi/BT
- EFR32MG21 Silabs Zigbee radio
- Speaker/Microphone

Signed-off-by: Tim Lunn <tim@feathertop.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
10 months agorockchip: Convert rv1126 to standard boot
Tim Lunn [Wed, 24 Jan 2024 03:25:59 +0000 (14:25 +1100)]
rockchip: Convert rv1126 to standard boot

RV1126 soc appears to have been missed with the conversion of
rockchip socs to standard boot.

Remove remnants of distro boot for rv1126 common and the one
existing board.

Signed-off-by: Tim Lunn <tim@feathertop.org>
Link: https://lore.kernel.org/all/20230407223645.v8.8.I4cf7708a1ba953b9abd81375d93af34665c7b251@changeid/
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
10 months agoram: rockchip: Add rv1126 ddr4 support
Tim Lunn [Wed, 24 Jan 2024 03:25:58 +0000 (14:25 +1100)]
ram: rockchip: Add rv1126 ddr4 support

Add support for ddr4 on rv1126. Timing detection files are imported
from downstream Rockchip BSP u-boot. Allow selecting ddr4 ram with
define CONFIG_RAM_ROCKCHIP_DDR4.

Signed-off-by: Tim Lunn <tim@feathertop.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
10 months agoarm: dts: rockchip: Sync rv1126 dts from linux 6.8-rc1
Tim Lunn [Wed, 24 Jan 2024 03:25:57 +0000 (14:25 +1100)]
arm: dts: rockchip: Sync rv1126 dts from linux 6.8-rc1

Sync linux dts files for rv1126 boards from linux v6.8-rc1 tag. Includes
the newly added dts for Sonoff iHost.

Signed-off-by: Tim Lunn <tim@feathertop.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
10 months agorockchip: rk3328-rock-pi-e: Enable DM_ETH_PHY and PHY_REALTEK
Jonas Karlman [Thu, 18 Jan 2024 07:19:46 +0000 (07:19 +0000)]
rockchip: rk3328-rock-pi-e: Enable DM_ETH_PHY and PHY_REALTEK

Enable the DM_ETH_PHY and PHY_REALTEK now that the designware ethernet
driver call eth_phy_set_mdio_bus() to assist with resetting the eth PHY
during probe.

Fixes ethernet on the v1.21 hw revision of Radxa ROCK Pi E:

  => mdio list
  ethernet@ff540000:
  1 - RealTek RTL8211F <--> ethernet@ff540000
  => net list
  eth0 : ethernet@ff540000 86:e0:c0:ea:fa:a9 active
  eth1 : ethernet@ff550000 86:e0:c0:ea:fa:a8
  => dhcp
  Speed: 1000, full duplex
  BOOTP broadcast 1
  BOOTP broadcast 2
  BOOTP broadcast 3
  DHCP client bound to address 192.168.1.114 (1004 ms)

Reported-by: Trevor Woerner <twoerner@gmail.com>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
10 months agonet: designware: Reset eth phy before phy connect
Jonas Karlman [Thu, 18 Jan 2024 07:19:45 +0000 (07:19 +0000)]
net: designware: Reset eth phy before phy connect

Some ethernet PHY require being reset before a phy-id can be read back
on the MDIO bus. This can result in the following message being show
on e.g. a Radxa ROCK Pi E v1.21 with a RTL8211F ethernet PHY.

  Could not get PHY for ethernet@ff540000: addr -1

Add support to designware ethernet driver to reset eth phy by calling
the eth phy uclass function eth_phy_set_mdio_bus(). The call use NULL
as bus parameter to not set a shared mdio bus reference that would be
freed when probe fails. Also add a eth_phy_get_addr() call to try and
get the phy addr from DT when DM_MDIO is disabled.

This help fix ethernet on Radxa ROCK Pi E v1.21:

  => mdio list
  ethernet@ff540000:
  1 - RealTek RTL8211F <--> ethernet@ff540000

Reported-by: Trevor Woerner <twoerner@gmail.com>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
10 months agoconfigs: rockchip: rk3036: Fix CONFIG_SPL_STACK define
Kever Yang [Wed, 24 Jan 2024 07:51:10 +0000 (15:51 +0800)]
configs: rockchip: rk3036: Fix CONFIG_SPL_STACK define

The CONFIG_SPL_STACK for rk3036 is removed in below patch, need to add
it back.

Fixes: f113d7d3034 ("Convert CONFIG_SPL_STACK to Kconfig")
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
10 months agospl: Make SPL_STACK available for ROCKCHIP_RK3036 without spl framework
Kever Yang [Wed, 24 Jan 2024 07:42:04 +0000 (15:42 +0800)]
spl: Make SPL_STACK available for ROCKCHIP_RK3036 without spl framework

rk3036 soc has limit internal sram, and not able to support spl
framework.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
10 months agorockchip: sdram: fix LPDDR5 bank info for sys_reg version 3
YouMin Chen [Tue, 12 Dec 2023 07:56:41 +0000 (15:56 +0800)]
rockchip: sdram: fix LPDDR5 bank info for sys_reg version 3

This patch add support for additional bank info used by LPDDR5.

Series-version: 2

Signed-off-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
10 months agoMerge tag 'smbios-2024-04-rc2' of https://source.denx.de/u-boot/custodians/u-boot-efi
Tom Rini [Sat, 3 Feb 2024 14:11:25 +0000 (09:11 -0500)]
Merge tag 'smbios-2024-04-rc2' of https://source.denx.de/u-boot/custodians/u-boot-efi

Pull request smbios-2024-04-rc2

* In smbios command
  - write 'Not Specified' for missing strings
  - show correct table size for SMBIOS2.1 entry point
  - adjust formatting of handle numbers
  - add missing colon after UUID
* In generated SMBIOS table
  - avoid introducing 'Unknown' string for missing properties
  - provide RISC-V vendor ID in the type 4 structure
  - provide the correct chassis handle in structure type 2
* Rename Structure Table Maximum Size field in SMBIOS 3 entry point

10 months agosmbios: correctly name Structure Table Maximum Size field
Heinrich Schuchardt [Wed, 31 Jan 2024 22:49:34 +0000 (23:49 +0100)]
smbios: correctly name Structure Table Maximum Size field

In the SMBIOS 3 entry point the Structure Table Maximum Size field was
incorrectly named max_struct_size. A Maximum Structure Size field only
exists in the SMBIOS 2.1 entry point and has a different meaning.

Call the Structure Table Length field table_maximum_size.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
10 months agosmbios: do not determine maximum structure size
Heinrich Schuchardt [Wed, 31 Jan 2024 22:42:35 +0000 (23:42 +0100)]
smbios: do not determine maximum structure size

Only the SMBIOS 2.1 entry point has a field for the maximum structure size.
As we have switched to an SMBIOS 3 entry point remove the superfluous
calculation.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
10 months agocmd: smbios: show correct table size for SMBIOS2.1 entry point
Heinrich Schuchardt [Wed, 31 Jan 2024 22:34:46 +0000 (23:34 +0100)]
cmd: smbios: show correct table size for SMBIOS2.1 entry point

The SMBIOS table size for SMBIOS2.1 entry points is in field 'Structure
Table Length' (offset 0x16) and not in field 'Maximum Structure Size'
(offset 0x08).

Rename the receiving variable max_struct_size to table_maximum_size
to avoid future confusion.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
10 months agosmbios: correctly fill chassis handle
Heinrich Schuchardt [Mon, 29 Jan 2024 17:32:58 +0000 (18:32 +0100)]
smbios: correctly fill chassis handle

The chassis handle field in the type 2 structure must point to the handle
of the type 3 structure.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
10 months agosmbios: provide type 4 RISC-V SMBIOS Processor ID
Heinrich Schuchardt [Mon, 29 Jan 2024 11:46:05 +0000 (12:46 +0100)]
smbios: provide type 4 RISC-V SMBIOS Processor ID

For RISC-V CPUs the SMBIOS Processor ID field contains
the Machine Vendor ID from CSR mvendorid.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
10 months agosmbios: if a string value is unknown, use string number 0
Heinrich Schuchardt [Mon, 29 Jan 2024 13:09:36 +0000 (14:09 +0100)]
smbios: if a string value is unknown, use string number 0

The SMBIOS specification describes: "If a string field references no string,
a null (0) is placed in that string field."

Accordingly we should avoid writing a string "Unknown" to the SMBIOS table.

dmidecode displays 'Not Specified' if the string number is 0.

Commit 00a871d34e2f ("smbios: empty strings in smbios_add_string()")
correctly identified that strings may not have length 0 as two
consecutive NULs indentify the end of the string list. But the suggested
solution did not match the intent of the SMBIOS specification.

Fixes: 00a871d34e2f ("smbios: empty strings in smbios_add_string()")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
10 months agosmbios: Fix table when no string is present
Matthias Brugger [Tue, 6 Apr 2021 09:04:35 +0000 (11:04 +0200)]
smbios: Fix table when no string is present

When no string is present in a table, next_ptr points to the same
location as eos. When calculating the string table length, we would only
reserve one \0. By spec a SMBIOS table has to end with two \0\0 when no
strings a present.

Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
10 months agocmd: smbios: replace missing string by 'Not Specified'
Heinrich Schuchardt [Mon, 29 Jan 2024 17:01:27 +0000 (18:01 +0100)]
cmd: smbios: replace missing string by 'Not Specified'

A missing string value is indicated by a string index of 0. In this case
print 'Not Specified' like the Linux dmidecode command does.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
10 months agocmd: smbios: add missing colon after UUID
Heinrich Schuchardt [Mon, 29 Jan 2024 17:51:24 +0000 (18:51 +0100)]
cmd: smbios: add missing colon after UUID

For consistent formatting add a colon ':' after the UUID label.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
10 months agocmd: smbios: always use '0x%04x' for printing handles
Heinrich Schuchardt [Mon, 29 Jan 2024 17:09:50 +0000 (18:09 +0100)]
cmd: smbios: always use '0x%04x' for printing handles

Handles are u16 numbers. Consistently use '0x%04x' to print them.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
10 months agosmbios: get_str_from_dt() - add sysinfo_id description
Heinrich Schuchardt [Mon, 29 Jan 2024 12:58:18 +0000 (13:58 +0100)]
smbios: get_str_from_dt() - add sysinfo_id description

Add description for parameter sysinfo_id of function get_str_from_dt().

Fixes: 07c9e683a484 ("smbios: Allow a few values to come from sysinfo")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
10 months agolib: smbios_entr() use logical or for booleans
Heinrich Schuchardt [Sun, 28 Jan 2024 10:24:21 +0000 (11:24 +0100)]
lib: smbios_entr() use logical or for booleans

As a matter of programming style use logical or to combine two boolean
results.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
10 months agoMerge tag 'u-boot-amlogic-fixes-20240201' of https://source.denx.de/u-boot/custodians...
Tom Rini [Thu, 1 Feb 2024 14:59:53 +0000 (09:59 -0500)]
Merge tag 'u-boot-amlogic-fixes-20240201' of https://source.denx.de/u-boot/custodians/u-boot-amlogic

- stop printing board model twice after sysinfo update

10 months agoMerge https://source.denx.de/u-boot/custodians/u-boot-watchdog
Tom Rini [Thu, 1 Feb 2024 14:59:09 +0000 (09:59 -0500)]
Merge https://source.denx.de/u-boot/custodians/u-boot-watchdog

- add andes atcwdt200 support (Randolph)

10 months agoconfigs: andes: add watchdog support fot andes ae350
Randolph [Wed, 24 Jan 2024 06:21:33 +0000 (14:21 +0800)]
configs: andes: add watchdog support fot andes ae350

It adds the ATCWDT200 support for Andes AE350 platform.
It also enables wdt command support.

Signed-off-by: CL Wang <cl634@andestech.com>
Signed-off-by: Randolph <randolph@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
10 months agodrivers: watchdog: add andes atcwdt200 support
Randolph [Wed, 24 Jan 2024 06:21:32 +0000 (14:21 +0800)]
drivers: watchdog: add andes atcwdt200 support

This patch adds an implementation of the Andes watchdog ATCWDT200 driver.

Signed-off-by: CL Wang <cl634@andestech.com>
Signed-off-by: Randolph <randolph@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
10 months agoMerge tag 'u-boot-at91-2024.04-a' of https://source.denx.de/u-boot/custodians/u-boot...
Tom Rini [Wed, 31 Jan 2024 15:44:33 +0000 (10:44 -0500)]
Merge tag 'u-boot-at91-2024.04-a' of https://source.denx.de/u-boot/custodians/u-boot-at91

First set of u-boot-at91 features for the 2024.04 cycle:

This set includes some DT alignments and solves a compile issue for
custom nand defconfigs.

10 months agoMerge https://source.denx.de/u-boot/custodians/u-boot-riscv
Tom Rini [Wed, 31 Jan 2024 13:49:35 +0000 (08:49 -0500)]
Merge https://source.denx.de/u-boot/custodians/u-boot-riscv

* Add RISC-V falcon mode documentation
* Add Clang build support
* Add cmd to detect Debug Trigger Extension support

* Add PWM setting for Unmatched board
* Add Milk-V Duo board support
* Add new device node and enable new config option for VisionFive2 board
* Add second virtio device for RISC-V QEMU

10 months agoriscv: dts: starfive: add regulator device
Nam Cao [Mon, 29 Jan 2024 08:43:09 +0000 (09:43 +0100)]
riscv: dts: starfive: add regulator device

Add the axp15060 regulator device. OpenSBI uses this device to perform
board reset and shutdown.

Signed-off-by: Nam Cao <namcao@linutronix.de>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
10 months agoriscv: dts: jh7110: add power management unit controller node
Nam Cao [Mon, 29 Jan 2024 08:43:08 +0000 (09:43 +0100)]
riscv: dts: jh7110: add power management unit controller node

JH7110 has a power management unit controller node. Add this node.

This device is used by OpenSBI during board reset/shutdown.

Signed-off-by: Nam Cao <namcao@linutronix.de>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
10 months agoboard: visionfive2: configure PHY pad drive strength
Lukasz Tekieli [Sun, 28 Jan 2024 19:22:48 +0000 (20:22 +0100)]
board: visionfive2: configure PHY pad drive strength

Configure the pad drive strength register for both PHYs.
The values correspond to what can be found in the Linux DTS
for VisionFive2 v1.3b.

Pad drive strength configuration is required for the phy0 to work correctly
with 100Mbit links.

Signed-off-by: Lukasz Tekieli <tekieli.lukasz@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
10 months agonet: phy: motorcomm: configure pad drive strength register
Lukasz Tekieli [Sun, 28 Jan 2024 19:22:47 +0000 (20:22 +0100)]
net: phy: motorcomm: configure pad drive strength register

This ports the pad drive strength register configuration which can be
already found in the Linux driver for this PHY.

Signed-off-by: Lukasz Tekieli <tekieli.lukasz@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
10 months agodoc: sophgo: milkv_duo: document Milk-V Duo board
Kongyang Liu [Sun, 28 Jan 2024 07:05:26 +0000 (15:05 +0800)]
doc: sophgo: milkv_duo: document Milk-V Duo board

Add document for Milk-V Duo board which based on Sophgo's CV1800B SoC.

Signed-off-by: Kongyang Liu <seashell11234455@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
10 months agoriscv: sophgo: milkv_duo: initial support added
Kongyang Liu [Sun, 28 Jan 2024 07:05:25 +0000 (15:05 +0800)]
riscv: sophgo: milkv_duo: initial support added

Add support for Sophgo's Milk-V Duo board, only minimal device tree and
serial console are enabled, and it can boot via vendor first stage
bootloader.

Signed-off-by: Kongyang Liu <seashell11234455@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
10 months agoriscv: dts: sophgo: add basic device tree for Milk-V Duo board
Kongyang Liu [Sun, 28 Jan 2024 07:05:24 +0000 (15:05 +0800)]
riscv: dts: sophgo: add basic device tree for Milk-V Duo board

Import device tree from Linux kernel to add basic support for CPU, PLIC,
UART and Timer. The name cv1800b in the filename represent the chip used
on Milk-V Duo board.

Signed-off-by: Kongyang Liu <seashell11234455@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
10 months agoconfigs: visionfive2: Disable ENV_IS_NOWHERE
Aurelien Jarno [Sat, 27 Jan 2024 13:48:45 +0000 (14:48 +0100)]
configs: visionfive2: Disable ENV_IS_NOWHERE

The VisionFive 2 board supports saving the u-boot environment settings
are saved to on-board SPI flash. However the defconfig enables both
ENV_IS_NOWHERE and ENV_IS_IN_SPI_FLASH, preventing the "saveenv" command
to work. Fix that by disabling ENV_IS_NOWHERE.

Fixes: 7d79bed00c9e ("configs: starfive: Enable environment in SPI flash support")
Reported-by: E Shattow <lucent@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
10 months agoriscv: Support building with Clang
kleines Filmröllchen [Thu, 25 Jan 2024 14:06:59 +0000 (15:06 +0100)]
riscv: Support building with Clang

The -ffixed-gp option of GCC has an exact equivalent of -ffixed-x3 in
Clang.

Signed-off-by: kleines Filmröllchen <filmroellchen@serenityos.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
10 months agocmd: sbi: add support for Debug Trigger Extension
Heinrich Schuchardt [Wed, 17 Jan 2024 16:46:52 +0000 (17:46 +0100)]
cmd: sbi: add support for Debug Trigger Extension

Detect and show if the SBI implements the Debug Trigger Extension.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
10 months agoboard: sifive: spl: Initialized the PWM setting in the SPL stage
Vincent Chen [Tue, 16 Jan 2024 06:35:57 +0000 (14:35 +0800)]
board: sifive: spl: Initialized the PWM setting in the SPL stage

LEDs and multiple fans can be controlled by SPL. This patch ensures
that all fans have been enabled in the SPL stage. In addition, the
LED's color will be set to yellow.

Signed-off-by: Vincent Chen <vincent.chen@sifive.com>
Co-developed-by: Nylon Chen <nylon.chen@sifive.com>
Signed-off-by: Nylon Chen <nylon.chen@sifive.com>
Co-developed-by: Zong Li <zong.li@sifve.com>
Signed-off-by: Zong Li <zong.li@sifve.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
10 months agoriscv: qemu: enable booting on a second virtio device
Aurelien Jarno [Wed, 10 Jan 2024 20:26:53 +0000 (21:26 +0100)]
riscv: qemu: enable booting on a second virtio device

QEMU RISC-V supports multiple virtio devices, but only tries to boot to
the first one. Enable support for a second virtio device, that is useful
for instance to boot on a disk image + an installer. Ideally that should
be made dynamic, but that's a first step.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
10 months agoboard: starfive: handle compatible property in dynamic DT configuration
Aurelien Jarno [Wed, 10 Jan 2024 20:17:44 +0000 (21:17 +0100)]
board: starfive: handle compatible property in dynamic DT configuration

The difference between the StarFive VisionFive 2 1.2A and 1.3B boards is
handled dynamically by looking at the PCB version in the EEPROM in order
to have a single u-boot version for both versions of the board. While
the "model" property is correctly handled, the "compatible" one is
always the the one of version 1.3b.

This patch add support for dynamically configuring that property.

Fixes: 9b7060bd15e7 ("riscv: dts: jh7110: Combine the board device tree files of 1.2A and 1.3B")
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
10 months agoconfigs: andes: add the fdt blob copy address for SPL
Randolph [Fri, 29 Dec 2023 08:32:23 +0000 (16:32 +0800)]
configs: andes: add the fdt blob copy address for SPL

Add the address to which the FDT blob is to be moved.

Signed-off-by: Randolph <randolph@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
10 months agospl: riscv: falcon: move fdt blob to specified address
Randolph [Fri, 29 Dec 2023 08:32:22 +0000 (16:32 +0800)]
spl: riscv: falcon: move fdt blob to specified address

In Falcon Boot mode, the fdt blob should be move to the RAM from
kernel BSS section. To avoid being cleared by BSS initialisation.
SPL_PAYLOAD_ARGS_ADDR is the address where SPL copies.

Signed-off-by: Randolph <randolph@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
10 months agodoc: falcon: riscv: Falcon Mode boot on RISC-V
Randolph [Fri, 29 Dec 2023 08:32:21 +0000 (16:32 +0800)]
doc: falcon: riscv: Falcon Mode boot on RISC-V

Add documentation to introduce the Falcon Mode on RISC-V.
In this mode, the boot sequence is SPL -> OpenSBI -> Linux kernel.

Signed-off-by: Randolph <randolph@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
10 months agoMerge tag 'clk-2024.04-rc2' of https://source.denx.de/u-boot/custodians/u-boot-clk
Tom Rini [Tue, 30 Jan 2024 12:54:28 +0000 (07:54 -0500)]
Merge tag 'clk-2024.04-rc2' of https://source.denx.de/u-boot/custodians/u-boot-clk

Clock changes for v2024.04

This pull has the usual fixes and new (clock-adjacent) drivers. It also has some
cleanups for the clock API; in particular removing the unused rfree callback.

CI: https://source.denx.de/u-boot/custodians/u-boot-clk/-/pipelines/19486

10 months agoARM: meson: stop printing board model after sysinfo update
Neil Armstrong [Wed, 24 Jan 2024 12:47:25 +0000 (13:47 +0100)]
ARM: meson: stop printing board model after sysinfo update

After the sysinfo update, Model is printed twice, remove
the now duplicate Model print from mach-meson/board-info.

Link: https://lore.kernel.org/r/20240124-u-boot-model-print-fix-v1-1-484960069623@linaro.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
10 months agoclk: clk-gpio: add actual gated clock
Svyatoslav Ryhel [Wed, 10 Jan 2024 16:09:56 +0000 (18:09 +0200)]
clk: clk-gpio: add actual gated clock

Existing gpio-gate-clock driver acts like a simple GPIO switch without any
effect on gated clock. Add actual clock actions into enable/disable ops and
implement get_rate op by passing gated clock if it is enabled.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Link: https://lore.kernel.org/r/20240110160956.4476-2-clamor95@gmail.com
[ sorted includes ]
Signed-off-by: Sean Anderson <seanga2@gmail.com>
10 months agoclk: Document clk_ops return codes and behavior
Sean Anderson [Sat, 16 Dec 2023 19:38:43 +0000 (14:38 -0500)]
clk: Document clk_ops return codes and behavior

Currently, clock consumers cannot take any programmatic action based on the
return code of a clock function. This is because there is no
standardization, and generally no way of separating e.g. "there was a major
problem setting the rate for this clock" which usually should not be
recovered from, from "this clock doesn't support setting its rate" or "this
clock doesn't support *this* rate" which could be absolutely fine depending
on the driver.

This commit aims to standardize the acceptable codes which may be returned
from clock operations. In general,

- ENOSYS should be returned when an operation is not supported for a
  particular clock.
- ENOENT may be returned if the clock ID is invalid. However, it is
  encouraged to move any checks to request() to reduce code duplication.
- EINVAL should be returned for logical errors only (such as requesting an
  invalid rate).

Each function has had specific guidance added for when to return each error
code. This is just guidance for now; most of the clock subsystem does not
yet conform to this standard. However, it is expected that new clock
drivers return these error codes.

Additionally, this commit adds expected behavior for each of the clock
operations. I believe these should be mostly straightforward and correspond
to existing behavior. I remember not understanding what the expected
invariants were for several clock functions, so hopefully this should help
out new driver authors. In the future, some of these invariants could be
checked via an optional config option.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Link: https://lore.kernel.org/r/20231216193843.2463779-4-seanga2@gmail.com
10 months agotreewide: Remove clk_free
Sean Anderson [Sat, 16 Dec 2023 19:38:42 +0000 (14:38 -0500)]
treewide: Remove clk_free

This function is a no-op. Remove it.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Link: https://lore.kernel.org/r/20231216193843.2463779-3-seanga2@gmail.com
10 months agoclk: Remove rfree
Sean Anderson [Sat, 16 Dec 2023 19:38:41 +0000 (14:38 -0500)]
clk: Remove rfree

Nothing uses this function. Remove it. Since clk_free no longer does
anything, just stub it out.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Link: https://lore.kernel.org/r/20231216193843.2463779-2-seanga2@gmail.com
10 months agoclk: fix clk_get_rate() always return ulong
Julien Masson [Fri, 15 Dec 2023 14:09:43 +0000 (15:09 +0100)]
clk: fix clk_get_rate() always return ulong

When we call clk_get_rate(), we expect to get clock rate value as
ulong.
In that case we should not use log_ret() macro since it use internally
an int.
Otherwise we may return an invalid/truncated clock rate value.

Signed-off-by: Julien Masson <jmasson@baylibre.com>
Fixes: 5c5992cb90c ("clk: Add debugging for return values")
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Link: https://lore.kernel.org/r/87o7erv9p4.fsf@baylibre.com
10 months agoclk: meson: add Hardware Clock measure driver
Neil Armstrong [Mon, 18 Dec 2023 09:47:55 +0000 (10:47 +0100)]
clk: meson: add Hardware Clock measure driver

Amlogic SoCs embeds an hardware clock measure block, port it
from Linux and implement it as a UCLK_CLK with only the dump
op and fail-only xlate.

Based on the Linux driver introduced in [1].

[1] commit 2b45ebef39a2 ("soc: amlogic: Add Meson Clock Measure driver").

Reviewed-by: Sean Anderson <seanga2@gmail.com>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20231218-uboot-meson-clk-msr-v3-1-acf4d90ccfee@linaro.org
10 months agoPrepare v2024.04-rc1
Tom Rini [Tue, 30 Jan 2024 01:53:19 +0000 (20:53 -0500)]
Prepare v2024.04-rc1

Signed-off-by: Tom Rini <trini@konsulko.com>
10 months agoMerge tag 'efi-2024-04-rc1-4' of https://source.denx.de/u-boot/custodians/u-boot-efi
Tom Rini [Mon, 29 Jan 2024 21:19:10 +0000 (16:19 -0500)]
Merge tag 'efi-2024-04-rc1-4' of https://source.denx.de/u-boot/custodians/u-boot-efi

Pull request efi-2024-04-rc1-4

Documentation:

* uefi: remove ".py" suffix for pytest.py command
* correct date in migration plan for CONFIG_DM

UEFI:

* fix conflicting SPDX license in RISC-V EFI linker scripts
* page align EFI binary section in RISC-V EFI binaries
* separate .data and .text sections of RISC-V EFI binaries
* use common function to get EFI configuration table

10 months agotools: buildman: fix non-existing SafeConfigParser in Python 3.12+
Quentin Schulz [Tue, 23 Jan 2024 17:57:01 +0000 (18:57 +0100)]
tools: buildman: fix non-existing SafeConfigParser in Python 3.12+

SafeConfigParser was renamed back in Python 3.2 (yes, no typo) to
ConfigParser[1], but it was still working as an alias until it got
removed in 3.12[2].

[1] https://docs.python.org/3.8/whatsnew/3.2.html#configparser
[2] https://github.com/python/cpython/pull/92503

Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
10 months agovideo: console: Fix buffer overflow in cmd 'font list'
Janne Grunau [Wed, 17 Jan 2024 22:29:29 +0000 (23:29 +0100)]
video: console: Fix buffer overflow in cmd 'font list'

vidconsole_ops.get_font is documented to return -ENOENT after the last
video_fontdata entry.

Signed-off-by: Janne Grunau <j@jannau.net>
10 months agovideo: Support VIDEO_X2R10G10B10 in truetype console
Janne Grunau [Wed, 17 Jan 2024 22:27:34 +0000 (23:27 +0100)]
video: Support VIDEO_X2R10G10B10 in truetype console

Without explicit support for VIDEO_X2R10G10B10 VIDEO_X8R8G8B8 white
will be rendered as cyan-ish. The conversion leaves to lowest 2 bits
unset for more compact code.

Signed-off-by: Janne Grunau <j@jannau.net>
10 months agoenv: sf: report malloc error to caller
Ralph Siemsen [Fri, 19 Jan 2024 21:32:17 +0000 (16:32 -0500)]
env: sf: report malloc error to caller

In the non-redundant code for env_sf_save(), a failure to malloc() the
temporary buffer produces the following output:

    Saving Environment to SPIFlash... OK

This is misleading as the flash has neither been erased nor written.

Fix it to return an error to the caller, so the output will be:

    Saving Environment to SPIFlash... Failed (-12)

Note that there is another copy of env_sf_save() in the same file, for
handling redundant environment, and it already has the same logic.

Signed-off-by: Ralph Siemsen <ralph.siemsen@linaro.org>
10 months agovideo: tidss: Use DT property names for parsing nodes
Devarsh Thakkar [Wed, 24 Jan 2024 09:07:11 +0000 (14:37 +0530)]
video: tidss: Use DT property names for parsing nodes

Use device-tree node property names for parsing nodes instead of
indexing as indexing could be different between different SoCs based on
number of DSS entities available on that particular SoC.

Also correct the video layer naming in driver to match to actual one
being used in upstream DSS device-tree node [1].

This also fixes AM62x splash screen usage using the latest upstream DSS
device-tree nodes where hard-coded indexing which driver was using
before this patch was not matching the correct properties in the DT
node.

[1]: Upstream AM62x DSS node:
https://github.com/torvalds/linux/blob/v6.8-rc1/arch/arm64/boot/dts/ti/k3-am62-main.dtsi#L774

Fixes: 5f9f816bb8 ("drivers: video: tidss: TIDSS video driver support for AM62x")
Signed-off-by: Devarsh Thakkar <devarsht@ti.com>
Reviewed-by: Nikhil M Jain <n-jain1@ti.com>
10 months agocommon: splash_source: Don't compile ubifs splash cmd for SPL build
Devarsh Thakkar [Wed, 24 Jan 2024 09:05:09 +0000 (14:35 +0530)]
common: splash_source: Don't compile ubifs splash cmd for SPL build

Don't compile ubifs splash mount command for SPL build as this command
is not supported (and also not enabled) during SPL stage.

This fixes below compilation error, when CONFIG_CMD_UBIFS is enabled in
defconfig along with splash screen enabled at SPL stage:

"aarch64-none-linux-gnu-ld.bfd: common/cli.o: in function `run_command':
u-boot-next/u-boot/common/cli.c:51: undefined reference to
`parse_string_outer'
u-boot-next/u-boot/common/cli.c:51:(.text.run_command+0x10): relocation
truncated to fit: R_AARCH64_JUMP26 against undefined symbol
`parse_string_outer' make[2]: ***
[u-boot-next/u-boot/scripts/Makefile.spl:527: spl/u-boot-spl] Error 1
make[1]: *** [u-boot-next/u-boot/Makefile:2053: spl/u-boot-spl] Error 2
make[1]: Leaving directory 'u-boot-next/u-boot/out/a53' make: ***
[Makefile:177: sub-make] Error 2"

Fixes: eb9217dc03 ("common: Enable splash functions at SPL")
Signed-off-by: Devarsh Thakkar <devarsht@ti.com>
Reviewed-by: Nikhil M Jain <n-jain1@ti.com>
10 months agoMerge patch series "Move framebuffer reservation for SPL to RAM end"
Tom Rini [Mon, 29 Jan 2024 19:49:25 +0000 (14:49 -0500)]
Merge patch series "Move framebuffer reservation for SPL to RAM end"

Devarsh Thakkar <devarsht@ti.com> says:

Move video memory reservation for SPL at end of RAM so that it does
not interefere with reservations for next stage so that the next stage
need not have holes in between for passed regions and instead it can
maintain continuity in reservations.

Also catch the bloblist before starting reservations to avoid the same
problem.

While at it, also fill missing fields in video handoff struct before
passing it to next stage.

This is as per discussions at :
For moving SPL framebuffer reservation at end of RAM:

https://lore.kernel.org/all/CAPnjgZ3xSoe_G3yrqwuAvoiVjUfZ+YQgkOR0ZTVXGT9VK8TwJg@mail.gmail.com/

For filling missing video handoff fields :
https://lore.kernel.org/all/CAPnjgZ1Hs0rNf0JDirp6YPsOQ5=QqQSP9g9qRwLoOASUV8a4cw@mail.gmail.com/

10 months agodoc: spl: Add info regarding memory reservation
Devarsh Thakkar [Tue, 5 Dec 2023 15:55:23 +0000 (21:25 +0530)]
doc: spl: Add info regarding memory reservation

Add details regarding scheme which need to be followed in SPL and
further stages for those regions which need to be preserved across
bootstages.

Signed-off-by: Devarsh Thakkar <devarsht@ti.com>
Reviewed-by: Simon Glass <sjg@chromium>
10 months agodoc: spl: Add info for missing Kconfigs
Devarsh Thakkar [Tue, 5 Dec 2023 15:55:22 +0000 (21:25 +0530)]
doc: spl: Add info for missing Kconfigs

Add info regarding splash screen, video, bloblist and GPIO related
Kconfigs which were missing in the documentation.

Signed-off-by: Devarsh Thakkar <devarsht@ti.com>
Reviewed-by: Simon Glass <sjg@chromium>
10 months agovideo: Fill video handoff in video post probe
Devarsh Thakkar [Tue, 5 Dec 2023 15:55:21 +0000 (21:25 +0530)]
video: Fill video handoff in video post probe

Fill video handoff fields in video_post_probe as at this point we have
full framebuffer-related information.

Also fill all the fields available in video hand-off struct as those
were missing earlier and U-boot framework expects them to be filled for
some of the functionalities.

While filling framebuffer size in video hand-off structure use the
actual framebuffer region size as derived from gd->video_top and
gd->video_bottom instead of directly using the size populated in
video_uc_plat as it contains unaligned size.

Reported-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Devarsh Thakkar <devarsht@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
10 months agovideo: Skip framebuffer reservation if already reserved
Devarsh Thakkar [Tue, 5 Dec 2023 15:55:20 +0000 (21:25 +0530)]
video: Skip framebuffer reservation if already reserved

Skip framebufer reservation if it was already reserved from previous
stage and whose information was passed using a bloblist.

Return error in case framebuffer information received from bloblist is
invalid i.e NULL or empty.

While at it, improve the debug message to make it more clear that
address in discussion is of framebuffer and not bloblist and also match
it with printing scheme followed in video_reserve function.

Signed-off-by: Devarsh Thakkar <devarsht@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
10 months agocommon/board_f: Catch bloblist before starting reservations
Devarsh Thakkar [Tue, 5 Dec 2023 15:55:19 +0000 (21:25 +0530)]
common/board_f: Catch bloblist before starting reservations

Start reservations needed for init sequence only after catching
bloblists from previous stage.

This is to avoid catching bloblists in the middle causing gaps while
u-boot is reserving.

Adjust the relocaddr as per video hand-off information received from
previous stage so that further reservations start only after regions
reserved for previous stages

Skip reservation for video memory if it was already filled by a
bloblist.

Signed-off-by: Devarsh Thakkar <devarsht@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
10 months agoboard: ti: am62x: evm: Remove video_setup from spl_board_init
Devarsh Thakkar [Tue, 5 Dec 2023 15:55:18 +0000 (21:25 +0530)]
board: ti: am62x: evm: Remove video_setup from spl_board_init

Remove video_setup from evm_init sequence since video memory is getting
called at an earlier place to make sure video memory is reserved at
the end of RAM.

Suggested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Devarsh Thakkar <devarsht@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
10 months agoarm: mach-k3: common: Reserve video memory from end of the RAM
Devarsh Thakkar [Tue, 5 Dec 2023 15:55:17 +0000 (21:25 +0530)]
arm: mach-k3: common: Reserve video memory from end of the RAM

Setup video memory before page table reservation using
"spl_reserve_video_from_ram_top" which ensures framebuffer memory gets
reserved from the end of RAM.

This is done to enable the next stage to directly skip the
pre-reserved area from previous stage right from the end of RAM without
having to make any gaps/holes to accommodate those regions which was the
case before as previous stage reserved region not from the end of RAM.

Use gd->ram_top instead of local ram_top and update gd->reloc_addr after
each reservation to ensure further regions are reserved properly.

Signed-off-by: Devarsh Thakkar <devarsht@ti.com>
Reviewed-by: Nikhil M Jain <n-jain1@ti.com>
10 months agospl: Enforce framebuffer reservation from end of RAM
Devarsh Thakkar [Tue, 5 Dec 2023 15:55:16 +0000 (21:25 +0530)]
spl: Enforce framebuffer reservation from end of RAM

Add an API which enforces framebuffer reservation from end of RAM.
This is done so that next stage can directly skip this region before
carrying out further reservations.

Signed-off-by: Devarsh Thakkar <devarsht@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
10 months agoboard/sunxi/MAINTAINERS: Add new defconfigs
Tom Rini [Mon, 29 Jan 2024 18:49:29 +0000 (13:49 -0500)]
board/sunxi/MAINTAINERS: Add new defconfigs

Add entries for the recently added defconfig files. I had thought I had
committed these updates but lost them before pushing the branch.

Signed-off-by: Tom Rini <trini@konsulko.com>
10 months agoMerge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-spi
Tom Rini [Mon, 29 Jan 2024 17:58:42 +0000 (12:58 -0500)]
Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-spi

- Support Infineon S28HS02GT (Takahiro)

10 months agoMerge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sunxi
Tom Rini [Mon, 29 Jan 2024 15:57:42 +0000 (10:57 -0500)]
Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sunxi

- Some cleanups in header files: those do not affect the generated
  binaries at all.
- The usual update of DT files from the kernel repo, mostly adding new
  board files this time. On the wake of this there is one defconfig to
  enable a new board, some H618 TV box branded as "Transpeed".
- Samuel's series to support SPL FIT image loading for 32-bit SoCs as
  well, so far this was restricted to ARM64 boards. I refrained from
  automatically enabling this everywhere, instead this requires user
  intervention during board configuration. This allows to ship the
  "crust" management processor firmware on H3 boards, which enables
  better power saving.
- One defconfig for an older H3 board. There was a close-by defconfig
  for a related board, but there are some differences which deserve a
  separate file.
- Support for the EMAC driver to work with fixed-link PHYs, which allows
  to directly wire the MAC to a switch IC.

10 months agoMerge branch '2024-01-29-pytest-enhancements'
Tom Rini [Mon, 29 Jan 2024 15:56:56 +0000 (10:56 -0500)]
Merge branch '2024-01-29-pytest-enhancements'

- Update pygit2 version and add a number of additional hardware pytests

10 months agotest/py: scsi: Add test for scsi commands
Love Kumar [Fri, 19 Jan 2024 14:37:13 +0000 (20:07 +0530)]
test/py: scsi: Add test for scsi commands

Add a following test cases for scsi commands:
scsi_reset - To reset SCSI controller
scsi_info - To show available SCSI devices
scsi_scan - To (re-)scan SCSI bus
scsi_device - To show or set surrent device
scsi_part - To print partition table of selected SCSI device

Signed-off-by: Love Kumar <love.kumar@amd.com>
10 months agotest/py: usb: Add tests for USB device
Love Kumar [Fri, 19 Jan 2024 14:26:02 +0000 (19:56 +0530)]
test/py: usb: Add tests for USB device

Add the test cases for usb commands to test its various functionality
such as start, stop, reset, info, tree, storage, dev, part, ls, load,
and save. It also adds different file systems cases such as fat32, ext2
and ext4.

Signed-off-by: Love Kumar <love.kumar@amd.com>
10 months agotest/py: mmc: Add tests for MMC device
Love Kumar [Fri, 19 Jan 2024 14:25:50 +0000 (19:55 +0530)]
test/py: mmc: Add tests for MMC device

Add the test cases for mmc commands to test its various functionality
such as mmc list, dev, info, rescan, part, ls, load, and save. It also
adds different file systems cases such as fat32, ext2 and ext4.

Signed-off-by: Love Kumar <love.kumar@amd.com>
10 months agotest/py: secure: Add secure tests for Zynq & ZynqMP
Love Kumar [Fri, 19 Jan 2024 10:01:29 +0000 (15:31 +0530)]
test/py: secure: Add secure tests for Zynq & ZynqMP

Add test cases to verify the different type of secure boot images loaded
at DDR location for AMD's ZynqMP SoC. It also adds tests authentication
and decryption functionality using AES and RSA features for Zynq.

Signed-off-by: Love Kumar <love.kumar@amd.com>
10 months agotest/py: gpio: Add gpio pins generic test
Love Kumar [Fri, 19 Jan 2024 05:38:34 +0000 (11:08 +0530)]
test/py: gpio: Add gpio pins generic test

Add gpio pins generic test for the set of gpio pin list to test various
gpio related functionality, such as the input, set, clear, and toggle,
it also tests the input and output functionality for shorted gpio pins.
This test depends on boardenv* configuration to define gpio pins names.

Signed-off-by: Love Kumar <love.kumar@amd.com>
10 months agotest/py: zynqmp_rpu: Add test for loading RPU apps
Love Kumar [Fri, 19 Jan 2024 05:36:41 +0000 (11:06 +0530)]
test/py: zynqmp_rpu: Add test for loading RPU apps

Add testcases for loading RPU applications in split and lockstep mode
including the negative one for AMD's ZynqMP SoC.

Signed-off-by: Love Kumar <love.kumar@amd.com>
10 months agopytest: update requirements.txt
Caleb Connolly [Tue, 2 Jan 2024 11:55:30 +0000 (11:55 +0000)]
pytest: update requirements.txt

Update pygit2 and py to their latest versions. Even in the venv pygit2
still links against the system libgit2 library which is failing on
latest Arch Linux.

The py library also needs updating to fix a KeyNotFound exception during
test initialisation.

Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
10 months agosunxi: Consider SPL size limitations for FIT loading
Samuel Holland [Tue, 31 Oct 2023 05:17:41 +0000 (00:17 -0500)]
sunxi: Consider SPL size limitations for FIT loading

Now that 32-bit SoCs can load U-Boot proper (and possibly other firmware)
from a FIT, people can use that by enabling CONFIG_SPL_LOAD_FIT.
However SPL_FIT_IMAGE_TINY is required to stay within the 24 or 32 KiB
SPL size limit on early SoCs; for consistency, enable it everywhere.

Signed-off-by: Samuel Holland <samuel@sholland.org>
[Andre: drop unconditional FIT image enablement for all SoCs]
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
10 months agosunxi: binman: Support FIT generation for 32-bit SoCs
Samuel Holland [Tue, 31 Oct 2023 05:17:40 +0000 (00:17 -0500)]
sunxi: binman: Support FIT generation for 32-bit SoCs

Some 32-bit SoCs can use SCP firmware to implement additional PSCI
functionality, such as system suspend. In order to load this firmware
from SPL, we need to generate and use a FIT instead of a legacy image.

Adjust the binman FIT definition so it does not rely on TF-A BL31, as
this is not used on 32-bit SoCs. Instead, after loading the firmware,
U-Boot proper is executed directly. This requires to provide an
entry point property for the U-Boot image node, which confuses some
loaders like sunxi-fel, so protect that to only be used if we have no
BL31.

Signed-off-by: Samuel Holland <samuel@sholland.org>
[Andre: filter U-Boot entry point property]
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>