Simon Glass [Sun, 19 Jul 2020 19:56:07 +0000 (13:56 -0600)]
mediatek: Makefile: Drop explicit targets built by binman
On mediatek various files that need to be created by binman. It does not
make sense to enumerate these in the Makefile. They are described in the
configuration (devicetree) for each board and we can simply run binman
(always) to generate them.
This avoid sprinkling the Makefile with arch-specific code.
Also update the binman definition so that idbloader.img is only needed
when SPL is actually being used.
Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 19 Jul 2020 19:56:06 +0000 (13:56 -0600)]
tegra: Makefile: Drop explicit targets built by binman
On tegra various files that need to be created by binman. It does not make
sense to enumerate these in the Makefile. They are described in the
configuration (devicetree) for each board and we can simply run binman
(always) to generate them.
This avoid sprinkling the Makefile with arch-specific code.
Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 19 Jul 2020 19:56:05 +0000 (13:56 -0600)]
sunxi: Makefile: Drop explicit targets built by binman
On sunxi various files that need to be created by binman. It does not make
sense to enumerate these in the Makefile. They are described in the
configuration (devicetree) for each board and we can simply run binman
(always) to generate them.
This avoid sprinkling the Makefile with arch-specific code.
Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 19 Jul 2020 19:56:04 +0000 (13:56 -0600)]
x86: Drop CONFIG_BUILD_ROM and repurpose BUILD_ROM
This Kconfig is not needed anymore since U-Boot will build the ROM if the
required binary blobs exist.
The BUILD_ROM environment variable used to request that the ROM be built.
Now this always happens if the required binary blobs are available. Update
it to mean that U-Boot should fail if the ROM cannot be built. This
behaviour should be compatible with how it used to work.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Sun, 19 Jul 2020 19:56:03 +0000 (13:56 -0600)]
x86: Makefile: Drop explicit targets built by binman
On x86 various files that need to be created by binman. It does not make
sense to enumerate these in the Makefile. They are described in the
configuration (devicetree) for each board and we can simply run binman
(always) to generate them.
Update the Makefile to have a separate, final step which runs binman,
once all input dependencies are present.
This avoid sprinkling the Makefile with arch-specific code.
Simon Glass [Sun, 19 Jul 2020 19:56:02 +0000 (13:56 -0600)]
powerpc: mpc85xx: Only enable binman when it is needed
Quite a few boards using this SoC family don't use binman, yet
CONFIG_BINMAN is enabled for all of them. But the option should only be
enabled if we expect binman to produce an image. Calling binman when the
device tree is missing, etc. will cause failer.
Add a condition so that CONFIG_BINMAN is only enabled as needed.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Sun, 19 Jul 2020 19:56:01 +0000 (13:56 -0600)]
Makefile: Rename ALL-y to INPUTS-y
When binman is in use, most of the targets built by the Makefile are
inputs to binman. We then need a final rule to run binman to produce the
final outputs.
Rename the variable to indicate this, and add a new 'inputs' target.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Sun, 19 Jul 2020 19:56:00 +0000 (13:56 -0600)]
tegra: Don't enable binman on ARMv8 SoCs
At present only the ARMv7 tegra SoCs actually use binman to create an
image. Change the config to reflect this, since otherwise running binman
will produce an error.
Simon Glass [Sun, 19 Jul 2020 19:55:52 +0000 (13:55 -0600)]
x86: Change how selection of ROMs works
Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.
Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.
Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.
For now this affects only x86, but future patches will enable this for
rockchip too.
Simon Glass [Sun, 19 Jul 2020 18:40:26 +0000 (12:40 -0600)]
buildman: Show the build rate at the end
It is interesting to note the number of builds completed per second to
track machine performance and build speed. Add a 'rate' value at the end
of the build to show this.
Bin Meng [Tue, 28 Jul 2020 09:06:44 +0000 (02:06 -0700)]
azure: Switch to use the MSYS2 official installer as the CI base
Recent CI failures were seen [1] when building MSYS2 Windows host
tools. The error messages are something like:
downloading mingw32.db...
downloading mingw32.db.sig...
error: mingw32: key "4A6129F4E4B84AE46ED7F635628F528CF3053E04" is unknown
error: mingw32: signature from "David Macek <david.macek.0@gmail.com>" is unknown trust
error: failed to update mingw32 (invalid or corrupted database (PGP signature))
Per the MSYS2 official news [2], this was caused by a packager
switch and several solutions were suggested, e.g.: a new package
of msys2-keyring and a new msys2 installer that includes them are
released. However right now we have been using the MSYS2 github
CI base repo [3] for the MSYS2 build in U-Boot, but per the project
information on the github webpage, it says: "This repository is
unused/deprecated and will be remove after 2021-01-01". Since it is
unmaintained it's unlikely the new PGP keys will be included in the
git repo, and the only choice is to switch to use the MSYS2 official
installer as the CI base instead.
- Bug fixes and updates on ls2088a,ls1028a, ls1046a, ls1043a, ls1012a
- lx2-watchdog support
- layerscape: pci-endpoint support, spin table relocation fixes and
cleanups
- fsl-crypto: RNG support and bug fixes
Tom Rini [Mon, 27 Jul 2020 15:11:27 +0000 (11:11 -0400)]
travis: Install pyelftools via pip
With the migration to python3 for all of our tests, we need to install
pyelftools via pip now rather than the system tools as they will
otherwise not be present in our virtualenv.
Signed-off-by: Tom Rini <trini@konsulko.com>
---
Changes in v2: Switch to pip
Neil Armstrong [Tue, 21 Jul 2020 11:41:14 +0000 (13:41 +0200)]
serial: meson: handle RX errors
This checks and handles RX errors on the Amlogic UART controller
after experiencing errors on the Khadas VIM3 & VIM3L when UART AO A
lines are not connected.
When the RX line is not connected, the first byte is erroneous and breaks
the U-Boot autoboot, breaking automatic boot.
This checks and drops any erroneous RX byte on pending and getc callbacks
to avoid returning true to pending when an error byte is in the FIFO.
Fixes: bfcef28ae4 ("arm: add initial support for Amlogic Meson and ODROID-C2") Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Tested-by: Guillaume La Roque <glaroque@baylibre.com>
Tom Rini [Mon, 27 Jul 2020 13:25:53 +0000 (09:25 -0400)]
Merge branch '2020-07-27-misc-env-improvements'
- Assorted environment fixes.
- Enhance environment in MMC and controlled via OF_CONTROL
- Allow for environment in FAT to use the same device we boot from
rather than be hard-coded.
According to Server Base System Architecture (SBSA) specification,
the SBSA Generic Watchdog has two stage timeouts: the first signal
(WS0) is for alerting the system by interrupt, the second one (WS1) is a
real hardware reset.
More details about the hardware specification of this device:
ARM DEN0029B - Server Base System Architecture (SBSA)
This driver can operate ARM SBSA Generic Watchdog as a single stage
In the single stage mode, when the timeout is reached, your system
will be reset by WS1. The first signal (WS0) is ignored.
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com> Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Xiaowei Bao [Thu, 9 Jul 2020 15:31:37 +0000 (23:31 +0800)]
pci_ep: layerscape: Add the workaround for errata A-009460
The VF_BARn_REG register's Prefetchable and Type bit fields
are overwritten by a write to VF's BAR Mask register.
workaround: Before writing to the VF_BARn_MASK_REG register,
write 0b to the PCIE_MISC_CONTROL_1_OFF register.
lx2160a rev2 requires 4KB space for type0 and 4KB
space for type1 iATU window. Increase configuration
size to 8KB to have sufficient space for type0
and type1 window.
Biwen Li [Thu, 2 Jul 2020 03:13:04 +0000 (11:13 +0800)]
freescale: ls1043aqds: drop ifdef CONFIG_SYS_I2C
- Drop ifdef CONFIG_SYS_I2C to initialize
baudrate of i2c
- Drop warning of i2c_early_init_f as follows,
warning: implicit declaration of function 'i2c_early_init_f'; did you
mean 'arch_early_init_r'? [-Wimplicit-function-declaration]
Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Biwen Li [Thu, 2 Jul 2020 03:13:02 +0000 (11:13 +0800)]
freescale: ls1046aqds: drop ifdef CONFIG_SYS_I2C
- Drop ifdef CONFIG_SYS_I2C to initialize
baudrate of i2c
- Drop warning of i2c_early_init_f as follows,
warning: implicit declaration of function 'i2c_early_init_f'; did you
mean 'arch_early_init_r'? [-Wimplicit-function-declaration]
Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Kuldeep Singh [Thu, 25 Jun 2020 07:26:22 +0000 (12:56 +0530)]
configs: ls1012a: Increase CONFIG_SYS_MALLOC_LEN value
Previous attempt to increase CONFIG_SYS_MALLOC_LEN was done in commit c084a8edf4e2 ("configs: ls1012a: Increase CONFIG_SYS_MALLOC_LEN size")
which increased malloc memory to ~1M.
PFE firmware alone requires 3M of dynamic memory allocation and
therefore, increase the config value to a larger value i.e 5M. This size
should be enough as of now to accommodate further memory requirements.
Yangbo Lu [Wed, 17 Jun 2020 10:08:58 +0000 (18:08 +0800)]
Move eSDHC adapter card identification to board files
The eSDHC adapter card identification and multiplexing configuration
through FPGA had been implemented in both common mmc driver and
fsl_esdhc driver. However it is proper to move these code to board
files and do it during board initialization. The FPGA registers are
also board specific.
This patch is to move eSDHC adapter card identification and
multiplexing configuration from mmc driver to specific board files.
And the option CONFIG_FSL_ESDHC_ADAPTER_IDENT is no longer needed.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
[Rebased, Removed T1040QDS change as board does not exist] Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
The correct setting for the RGMII ports on LS1012ARDB is to
enable delay on both Rx and Tx so the interface mode used should
be PHY_INTERFACE_MODE_RGMII_ID
The compiler emits a "stur x1, [x0, #12]". x1 is might just be 32 bit
aligned pointer. Remove the unused u64 element from the union to drop
the minimal alignment to 32 bit. Also remove the union, because it is
no more needed.
Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Michael Walle [Mon, 1 Jun 2020 19:53:36 +0000 (21:53 +0200)]
armv8: layerscape: rework spin table
There are two issues:
(1) The spin table doesn't convert the endianness of the jump address.
Although there is code for it, the result isn't used at all (x0).
(2) If something goes wrong, the function returns. But that doesn't
make sense at all.
Use the actual converted jump address as destination to fix. If
there is an error, jump to a trap loop. And rearrange the code exception
level switching code to make it smaller and clearer.
This reduces the size of the spin table code section from 696 bytes to
424 bytes. If CONFIG_ARMV8_SWITCH_TO_EL1 the code size reduced from 696
bytes to 632 bytes.
Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Michael Walle [Mon, 1 Jun 2020 19:53:35 +0000 (21:53 +0200)]
armv8: layerscape: relocate spin table if EFI_LOADER is enabled
On ARM64, a 64kb region is reserved for the runtime services code.
Unfortunately, this code overlaps with the spin table code, which also
needs to be reserved. Thus now that the code is relocatable, allocate a
new page from EFI, copy the spin table code into it, update any pointers
to the old region and the start the secondary CPUs.
Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Michael Walle [Mon, 1 Jun 2020 19:53:34 +0000 (21:53 +0200)]
armv8: layerscape: clean exported symbols in spintable.S
Add a new variable secondary_boot_code_start, which holds a pointer to
the start of the spin table code. This will help to relocate the code
section. While at it, move the size variable from the end to the
beginning so there is a common section for the variables. Remove any
other symbols.
Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Michael Walle [Mon, 1 Jun 2020 19:53:28 +0000 (21:53 +0200)]
armv8: layerscape: load function pointer using ADR
Don't use LDR to load a pointer to a function. This will generate a
literal which cannot be relocated. Use ADR which is PC-relative and
therefore can easily be relocated.
Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
projects / u-boot.git / log