William Zhang [Wed, 7 Jun 2023 23:37:05 +0000 (16:37 -0700)]
spi: bcmbca-hsspi: Add driver for newer HSSPI controller
The newer BCMBCA SoCs such as BCM6756, BCM4912 and BCM6855 include an
updated SPI controller that add the capability to allow the driver to
control chip select explicitly. Driver can control and keep cs low
between the transfers natively. Hence the dummy cs workaround or prepend
mode found in the bcm63xx-hsspi driver are no longer needed and this new
driver is much cleaner.
William Zhang [Wed, 7 Jun 2023 23:37:04 +0000 (16:37 -0700)]
spi: bcm63xx-hsspi: Add prepend mode support
Due to the controller limitation to keep the chip select low during the
bus idle time between the transfer, a dummy cs workaround was used when
this driver was first upstreamed to the u-boot based on linux kernel
driver. It basically picks the dummy cs as !actual_cs so typically dummy
cs is 1 when most of the case only cs 0 is used in the board design.
Then invert the polarity of both cs and tell the controller to start the
transfers using dummy cs. Assuming both cs are active low before the
inversion, effectively this keeps dummy cs high and actual cs low during
the transfer and workaround the issue.
This workaround requires that dummy cs 1 pin to is set to SPI chip
selection function in the pinmux when the transfer clock is above 25MHz.
The old chips likely have default pinmux set to chip select on the dummy
cs pin so it works but this is not case for the new Broadband BCA chips
and this workaround stop working. This is specifically an issue to
support SPI NAND and SPI NOR flash because these flash devices can
typically run at or above 100MHz.
This patch utilizes the prepend feature of the controller to combine the
multiple transfers in the same message to a single transfer when
possible. This way there is no need to keep clock low between transfers
and solve the issue without any pinmux requirement.
Multiple transfers within a SPI message may be combined into one
transfer if the following are all true:
* One or more half duplex write transfer in single bit mode
* Optional full duplex read/write at the end
* No delay and cs_change between transfers
Most of the SPI device meets this requirements such as SPI NOR, SPI NAND
flash, Broadcom SPI voice card and etc. So this change switches to the
prepend mode as the default mode. For any SPI message that does not meet
the above requirement, we switch to original dummy cs mode but limit the
clock rate to the safe 25MHz.
William Zhang [Wed, 7 Jun 2023 23:37:03 +0000 (16:37 -0700)]
spi: bcm63xx-hsspi: Add new compatible string support
New compatible string brcm,bcmbca-hsspi-v1.0 is introduced based on
dts document brcm,bcm63xx-hsspi.yaml. Add it to the driver to support
this new binding.
William Zhang [Wed, 7 Jun 2023 23:37:02 +0000 (16:37 -0700)]
spi: bcm63xx-hsspi: Fix multi-bit mode setting
Currently the driver always sets the controller to dual data bit mode
for both tx and rx data in the profile mode control register even for
single data bit transfer. Luckily the opcode is set correctly according
to SPI transfer data bit width so it does not actually cause issues.
This change fixes the problem by setting tx and rx data bit mode field
correctly according to the actual SPI transfer tx and rx data bit width.
William Zhang [Wed, 7 Jun 2023 23:37:01 +0000 (16:37 -0700)]
spi: bcm63xx-hsspi: Make driver depend on BCMBCA arch
ARCH_BCMBCA was introduced to cover individual Broadcom broadband SoC
for common features and IP blocks. Use this config instead of each chip
config as the Kconfig dependency for Broadcom HSSPI driver.
Signed-off-by: William Zhang <william.zhang@broadcom.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Yixun Lan [Sat, 8 Jul 2023 11:24:32 +0000 (19:24 +0800)]
riscv: t-head: licheepi4a: initial support added
Add support for Sipeed's Lichee Pi 4A board which based on T-HEAD's
TH1520 SoC, only minimal device tree and serial console are enabled,
so it's capable of chain booting from T-HEAD's vendor u-boot.
Reviewed-by: Wei Fu <wefu@redhat.com> Signed-off-by: Yixun Lan <dlan@gentoo.org>
Bin Meng [Wed, 21 Jun 2023 15:11:46 +0000 (23:11 +0800)]
riscv: Rename SiFive CLINT to RISC-V ALINT
As the RISC-V ACLINT specification is defined to be backward compatible
with the SiFive CLINT specification, we rename SiFive CLINT to RISC-V
ALINT in the source tree to be future-proof.
Signed-off-by: Bin Meng <bmeng@tinylab.org> Reviewed-by: Rick Chen <rick@andestech.com>
Bin Meng [Wed, 21 Jun 2023 15:11:45 +0000 (23:11 +0800)]
riscv: clint: Update the sifive clint ipi driver to support aclint
This RISC-V ACLINT specification [1] defines a set of memory mapped
devices which provide inter-processor interrupts (IPI) and timer
functionalities for each HART on a multi-HART RISC-V platform.
The RISC-V ACLINT specification is defined to be backward compatible
with the SiFive CLINT specification, however the device tree binding
is a new one. This change updates the sifive clint ipi driver to
support ACLINT mswi device, by checking the per-driver data field of
the ACLINT mtimer driver to determine whether a syscon based approach
needs to be taken to get the base address of the ACLINT mswi device.
Bin Meng [Wed, 21 Jun 2023 15:11:44 +0000 (23:11 +0800)]
riscv: timer: Update the sifive clint timer driver to support aclint
This RISC-V ACLINT specification [1] defines a set of memory mapped
devices which provide inter-processor interrupts (IPI) and timer
functionalities for each HART on a multi-HART RISC-V platform.
The RISC-V ACLINT specification is defined to be backward compatible
with the SiFive CLINT specification, however the device tree binding
is a new one. This change updates the sifive clint timer driver to
support ACLINT mtimer device, using a per-driver data field to hold
the mtimer offset to the base address encoded in the mtimer node.
Yanhong Wang [Thu, 15 Jun 2023 09:36:52 +0000 (17:36 +0800)]
board: starfive: Dynamic configuration of DT for 1.2A and 1.3B
The main difference between StarFive VisionFive 2 1.2A and 1.3B is gmac.
You can read the PCB version of the current board by
get_pcb_revision_from_eeprom(), and then dynamically configure the
difference of gmac in spl_perform_fixups() according to different PCB
versions, so that one DT and one defconfig can support both 1.2A and
1.3B versions, which is more user-friendly.
Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com> Reviewed-by: Rick Chen <rick@andestech.com>
Yanhong Wang [Thu, 15 Jun 2023 09:36:51 +0000 (17:36 +0800)]
ram: starfive: Read memory size information from EEPROM
StarFive VisionFive 2 has two versions, 1.2A and 1.3B, each version of
DDR capacity includes 2G/4G/8G, a DT can not support multiple
capacities, so the capacity size information is recorded to EEPROM, when
DDR initialization required capacity size information is read from
EEPROM.
If there is no information in EEPROM, it is initialized with the default
size defined in DT.
Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Yanhong Wang [Thu, 15 Jun 2023 09:36:45 +0000 (17:36 +0800)]
riscv: dts: jh7110: Combine the board device tree files of 1.2A and 1.3B
The difference between 1.2A and 1.3B is dynamically configured according
to the PCB version, and there is no difference on the board device tree,
so the same DT file can be used.
Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Tom Rini [Tue, 11 Jul 2023 17:27:32 +0000 (13:27 -0400)]
Merge tag 'efi-2023-07-rc7' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request efi-2023-07-rc7
Documentation:
* Fix links to Linux kernel documentation
UEFI:
* Fix memory leak in efidebug dh subcommand
* Fix underflow when calculating remaining variable store size
* Increase default variable store size to 64 KiB
* mkeficapsule: fix efi_firmware_management_capsule_header data type
Tom Rini [Tue, 11 Jul 2023 13:55:53 +0000 (09:55 -0400)]
Makefile: Drop -rc6
When tagging and releasing v2023.07 I forgot to drop the -rc6 tag. For
regular use, I've made a v2023.07.01 tag, but for here we can just drop
the -rc6 tag.
efi_loader: Increase default variable store size to 64KiB
Debian's arm64 UEFI Secure Boot shim makes the EFI variable store run
out of space while mirroring its MOK database to variables. This can be
observed in QEMU like so:
$ tools/buildman/buildman -o build/qemu_arm64 --boards=qemu_arm64 -w
$ cd build/qemu_arm64
$ curl -L -o debian.iso \
https://cdimage.debian.org/debian-cd/current/arm64/iso-cd/debian-12.0.0-arm64-netinst.iso
$ qemu-system-aarch64 \
-nographic -bios u-boot.bin \
-machine virt -cpu cortex-a53 -m 1G -smp 2 \
-drive if=virtio,file=debian.iso,index=0,format=raw,readonly=on,media=cdrom
[...]
=> # interrupt autoboot
=> env set -e -bs -nv -rt -guid 605dab50-e046-4300-abb6-3dd810dd8b23 SHIM_VERBOSE 1
=> boot
[...]
mok.c:296:mirror_one_esl() SetVariable("MokListXRT43", ... varsz=0x4C) = Out of Resources
mok.c:452:mirror_mok_db() esd:0x7DB92D20 adj:0x30
Failed to set MokListXRT: Out of Resources
mok.c:767:mirror_one_mok_variable() mirror_mok_db("MokListXRT", datasz=17328) returned Out of Resources
mok.c:812:mirror_one_mok_variable() returning Out of Resources
Could not create MokListXRT: Out of Resources
[...]
Welcome to GRUB!
This would normally be fine as shim would continue to run grubaa64.efi,
but shim's error handling code for this case has a bug [1] that causes a
synchronous abort on at least chromebook_kevin (but apparently not on
QEMU arm64).
Double the default variable store size so the variables fit. There is a
note about this value matching PcdFlashNvStorageVariableSize when
EFI_MM_COMM_TEE is enabled, so keep the old default in that case.
[1] https://github.com/rhboot/shim/pull/577
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com> Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
efi_loader: Avoid underflow when calculating remaining var store size
The efi_var_mem_free() function calculates the available size for a new
EFI variable by subtracting the occupied buffer size and the overhead
for a new variable from the maximum buffer size set in Kconfig. This
is then returned as QueryVariableInfo()'s RemainingVariableStorageSize
output.
This can underflow as the calculation is done in and processed as
unsigned integer types. Check for underflow before doing the subtraction
and return zero if there's no space.
Fixes: f1f990a8c958 ("efi_loader: memory buffer for variables") Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com> Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Michal Simek [Tue, 4 Jul 2023 12:05:13 +0000 (14:05 +0200)]
sysreset: Change Kconfig GPIO dependency
DM_GPIO depends on GPIO to be enabled but select will cause that DM_GPIO is
selected without GPIO which ends up in compilation error:
undefined reference to `dm_gpio_set_value'
undefined reference to `dm_gpio_get_value'
undefined reference to `dm_gpio_free'
undefined reference to `gpio_request_by_name'
Signed-off-by: Michal Simek <michal.simek@amd.com>
[trini: Fix configs which had relied on these select's] Signed-off-by: Tom Rini <trini@konsulko.com>
Ying Sun [Sun, 25 Jun 2023 09:18:21 +0000 (17:18 +0800)]
tpl: Kconfig: TPL_BANNER_PRINT depends on DEBUG_UART && TPL_SERIAL
As implemented in the arch/arm/mach-rockchip/tpl.c file,
the CONFIG_TPL_BANNER_PRINT option will not work
if either of these options is not enabled.
Add dependency constraints to the CONFIG_TPL_BANNER_PRINT option
definition to prevent configuration problems
where option is enabled but do not take effect.
Suggested-by: Yanjie Ren <renyanjie01@gmail.com> Signed-off-by: Ying Sun <sunying@nj.iscas.ac.cn>
Ying Sun [Sun, 25 Jun 2023 08:24:47 +0000 (16:24 +0800)]
cmd: CONFIG_CMD_SAVES depends on CONFIG_CMD_LOADS
CONFIG_CMD_SAVES is used to enable support for the "saveenv" command
and is only implemented in cmd/load.c
when "#if defined(CONFIG_CMD_LOADS)" is met.
It is recommended to add dependency constraints to its definition.
Prevents "saveenv" command from not being supported
when "CONFIG_CMD_SAVES=y CONFIG_CMD_LOADS=n".
Suggested-by: Yanjie Ren <renyanjie01@gmail.com> Signed-off-by: Ying Sun <sunying@nj.iscas.ac.cn> Reviewed-by: Simon Glass <sjg@chromium.org>
Tobias Deiminger [Mon, 19 Jun 2023 22:41:07 +0000 (00:41 +0200)]
test: Find leftovers after clean/mrproper
Docs describe 'make clean' to delete most generated files, 'make
mrproper' to delete current configuration and all generated files. This
test tries to assert it.
Idea is to search remaining files by patterns in copies of the initial
out-of-source build, which has two advantages:
- looking in an out-of-source build dir allows to tell generated source
code from committed source code
- copying is fast (compared to rebuilding each time) which allows to do
a "world clean"
Tobias Deiminger [Mon, 19 Jun 2023 22:41:02 +0000 (00:41 +0200)]
Kbuild: Fix cleanup of generated sources in tools
On 'make clean', generated C files in tools/env/ and tools/boot/ are
currently not removed, but they should.
Auto-generation for shared sources was first introduced with ad80c4a3220b ("kbuild, tools: generate wrapper C sources automatically
by Makefile"). Cleanup later regressed (see Fixes:), because shared
files were moved out of lib/ and common/, but 'clean-dirs := lib common'
was not adjusted accordingly. Further, the generated
tools/env/embedded.c became a sibling to project files, which prevents
directory-wise cleanup at all.
To solve it, we establishe tools/generated/ as the sole place for
generated sources. Wrappers are now generated as
tools/generated/<orig_dirname>/<orig_filename>, and 'make clean' can
remove tools/generated/ as a whole (Linux Makefile.asm-generic headers
are cleaned similarly). This way we don't have to maintain separate
clean-files or clean-dirs entries for each single added or moved wrapper
file.
Fixes: 0649cd0d4908 ("Move environment files from common/ to env/") Fixes: 19a91f2464a8 ("Create a new boot/ directory") Signed-off-by: Tobias Deiminger <tdmg@linutronix.de>
[trini: Correct mkfwupdate case] Signed-off-by: Tom Rini <trini@konsulko.com>
riscv: andes_plicsw: Fix IPI during OpenSBI invocation
On some AE350 boards, we need to explicitly initialize the priority
registers to a non-zero value so the boot hart can instruct secondary
harts to jump to OpenSBI.
This patch also updates the information about PLICSW.
Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Hoegeun Kwon [Wed, 28 Jun 2023 10:19:49 +0000 (19:19 +0900)]
clk: starfive: pll: Fix to use postdiv1_mask
There is a problem that the rates of PLL0 and PLL1 are set incorrectly
because the postdiv1_mask value is incorrectly entered when setting
the pll clk reg. Modify postdiv1's mask value to be put correctly.
Signed-off-by: Hoegeun Kwon <hoegeun.kwon@samsung.com> Reviewed-by: Minkyu Kang <mk7.kang@samsung.com>
Conor Dooley [Thu, 15 Jun 2023 10:12:44 +0000 (11:12 +0100)]
board: microchip: set mac address for ethernet1 on icicle
The dts sync from Linux leaves mac0/ethernet1 enabled on icicle, but
U-Boot does not currently set a mac address for it. Expand on the code
which currently sets the mac for mac1/ethernet0 to optionally set the
mac address for the second ethernet.
Conor Dooley [Thu, 15 Jun 2023 10:12:43 +0000 (11:12 +0100)]
riscv: dts: sync mpfs-icicle devicetree with linux
The "notable" disappearances are:
- the pac193x stanza - there's nothing in mainline linux w.r.t. bindings
for this & what is going to appear in mainline linux is going to be
incompatible with what is currently in U-Boot.
- operating points - these operating points should not be set at the
soc.dtsi level as they may not be possible depending on the design
programmed to the FPGA
- clock output names - there are defines for the clock indices, these
should not be needed
- the dt maintainers in linux NAKed using defines for IRQ numbers
- the qspi nand, which is not part of the icicle's default configuration
is removed.
Conor Dooley [Thu, 15 Jun 2023 10:12:42 +0000 (11:12 +0100)]
riscv: dts: drop microchip from dts filenames
The original names picked for the DT doesn't match Linux's naming scheme
and it was renamed there a while ago. Rename it in U-Boot to allow
easily syncing dts between the two projects.
Kshitiz Varshney [Thu, 22 Jun 2023 09:24:45 +0000 (11:24 +0200)]
LFU-544: Kconfig.nxp: Fixed secure boot on LS-CH2 platforms
pimg64 image pointer is dependent on ESBC_ADDR_64BIT config, which is
getting disabled, due to dependency on ESBC_HDR_LS.
ESBC_HDR_LS is required for LS-CH3 platforms.
So, removing the dependency on ESBC_HDR_LS.
Camelia Groza [Fri, 16 Jun 2023 13:18:35 +0000 (16:18 +0300)]
arch: arm: dts: ls1046a: sync serial nodes with Linux
Pick up the serial node descriptions from Linux v6.3 for the ls1046ardb
and ls1046afrwy boards and their dependencies. Including the
fsl,qoriq-clockgen.h and arm-gic.h headers forces us to change the include
directives to explicitly go through the C preprocessor for all boards in
the ls1046a SoC family.
Signed-off-by: Camelia Groza <camelia.groza@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
Camelia Groza [Fri, 16 Jun 2023 13:18:32 +0000 (16:18 +0300)]
arch: arm: dts: ls1043a: sync serial nodes with Linux
Pick up the serial node descriptions from Linux v6.3 for the ls1043ardb
board and its dependencies. Including the fsl,qoriq-clockgen.h and
arm-gic.h headers forces us to change the include directives to explicitly
go through the C preprocessor for all boards in the ls1043a SoC family.
Signed-off-by: Camelia Groza <camelia.groza@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
tools/renesas_spkgimage.c: In function ‘spkgimage_parse_config_line’:
tools/renesas_spkgimage.c:76:66: warning: format ‘%ld’ expects
argument of type ‘long int’, but argument 3 has type ‘size_t’
{aka ‘unsigned int’} [-Wformat=]
76 | "config error: unknown keyword on line %ld\n",
| ~~^
| |
| long int
| %d
77 | line_num);
| ~~~~~~~~
| |
| size_t {aka unsigned int}
The correct printf specifier for size_t is '%zu'.
Fixes: afdfcb11f97c ("tools: spkgimage: add Renesas SPKG format") Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Eugen Hristev [Wed, 19 Apr 2023 13:45:24 +0000 (16:45 +0300)]
regulator: implement basic reference counter
Some devices share a regulator supply, when the first one will request
regulator disable, the second device will have it's supply cut off before
graciously shutting down. Hence there will be timeouts and other failed
operations.
Implement a reference counter mechanism similar with what is done in
Linux, to keep track of enable and disable requests, and only disable the
regulator when the last of the consumers has requested shutdown.
Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Currently, spl_end points to the __bss_end address, which
is an external RAM address instead of the end of the SPL text
section in the internal RAM.
This causes boot failures on imx6-colibri, for example:
```
Trying to boot from MMC1
SPL: Image overlaps SPL
resetting ...
```
Fix this problem by assigning spl_end to _image_binary_end, as this
symbol properly represents the end of the SPL text section.
Jonas Karlman [Mon, 26 Jun 2023 19:43:06 +0000 (19:43 +0000)]
rockchip: Restore support for boot scripts in legacy image format
Use of CONFIG_SPL_FIT_SIGNATURE=y cause CONFIG_LEGACY_IMAGE_FORMAT=n as
default, this prevent boot scripts in legacy image format from working
and was an unintended change in the listed fixes commits:
Wrong image format for "source" command
Add CONFIG_LEGACY_IMAGE_FORMAT=y to defconfig for affected boards to
restore support for boot scripts in legacy image format.
Marek Vasut [Sat, 1 Jul 2023 15:26:19 +0000 (17:26 +0200)]
ARM: arm11: Add C wrapper for allow_unaligned()
Rename current assembler implementation of allow_unaligned() to
arm11_arch_cp15_allow_unaligned() and add it into arm11.h header,
then add C wrapper of allow_unaligned().
This fixes misbehavior when linking U-Boot, where the CPU specific
allow_unaligned() implementation was ignored and instead the
__weak allow_unaligned() implementation from lib/efi_loader/efi_setup.c
was used, which led to "data abort" just before booting Linux via tftp,
in efi_dp_from_file() -> path_to_uefi() -> utf16_put() .
The problem is triggerd by c7c0ca37673 ("efi_loader: fix efi_dp_from_file()") .
Adding the wrapper fixes the problem.
Marek Vasut [Sat, 1 Jul 2023 15:26:18 +0000 (17:26 +0200)]
ARM: armv7: Add C wrapper for allow_unaligned()
Rename current assembler implementation of allow_unaligned() to
v7_arch_cp15_allow_unaligned() and add it into armv7.h header,
then add C wrapper of allow_unaligned().
This fixes misbehavior when linking U-Boot on ARMv7a i.MX6Q, where the
CPU specific allow_unaligned() implementation was ignored and instead the
__weak allow_unaligned() implementation from lib/efi_loader/efi_setup.c
was used, which led to "data abort" just before booting Linux via tftp,
in efi_dp_from_file() -> path_to_uefi() -> utf16_put() .
The problem is triggerd by c7c0ca37673 ("efi_loader: fix efi_dp_from_file()") .
Adding the wrapper fixes the problem.
projects / u-boot.git / log