]> git.dujemihanovic.xyz Git - u-boot.git/log
u-boot.git
17 months agorockchip: px30: Define variables for compressed image support
Paul Kocialkowski [Tue, 25 Jul 2023 12:58:35 +0000 (14:58 +0200)]
rockchip: px30: Define variables for compressed image support

The standard boot path expects the kernel_comp_addr_r and kernel_comp_size
variables for booting compressed kernel images. Define them using the previous
kernel_addr_c value (likely initially meant for this purpose) and usual size.

This was tested on the PX30 EVB to successfully boot compressed Linux kernel
images.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
17 months agorockchip: rk356x: Update PCIe config, IO and memory regions
Jonas Karlman [Sat, 22 Jul 2023 13:30:24 +0000 (13:30 +0000)]
rockchip: rk356x: Update PCIe config, IO and memory regions

Update config, IO and memory regions used based on [1] with pcie3x2
config reg address and reg size corrected.

Before this change:

  PCI Autoconfig: Bus Memory region: [0-3eefffff],
  PCI Autoconfig: Bus I/O region: [3ef00000-3effffff],

After this change:

  PCI Autoconfig: Bus Memory region: [40000000-7fffffff],
  PCI Autoconfig: Bus I/O region: [f0100000-f01fffff],

[1] https://lore.kernel.org/lkml/20221112114125.1637543-2-aholmes@omnom.net/

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
17 months agorockchip: rk3568-rock-3a: Enable PCIe and NVMe support
Jonas Karlman [Sat, 22 Jul 2023 13:30:23 +0000 (13:30 +0000)]
rockchip: rk3568-rock-3a: Enable PCIe and NVMe support

Add missing pinctrl and defconfig options to enable PCIe and NVMe
support on Radxa ROCK 3 Model A.

Use of pcie20m1_pins and pcie30x2m1_pins ensure IO mux selection M1.
The following pcie_reset_h and pcie3x2_reset_h ensure GPIO func is
restored to the perstn pin, a workaround to avoid having to define
a new rockchip,pins.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
17 months agorockchip: clk: clk_rk3568: Add CLK_PCIEPHY2_REF support
Jonas Karlman [Sat, 22 Jul 2023 13:30:22 +0000 (13:30 +0000)]
rockchip: clk: clk_rk3568: Add CLK_PCIEPHY2_REF support

Add dummy support for the CLK_PCIEPHY2_REF clock.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
17 months agoregulator: fixed: Add support for gpios prop
Jonas Karlman [Sat, 22 Jul 2023 13:30:21 +0000 (13:30 +0000)]
regulator: fixed: Add support for gpios prop

The commit 12df2c182ccb ("regulator: dt-bindings: fixed-regulator: allow
gpios property") in linux v6.3-rc1 added support for use of either a
gpios or gpio prop with a fixed-regulator.

This adds support for the new gpios prop to the fixed-regulator driver.
gpios prop is used by vcc3v3-pcie-regulator on Radxa ROCK 3 Model A.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
17 months agopci: pcie_dw_rockchip: Disable unused BARs of the root complex
Jon Lin [Sat, 22 Jul 2023 13:30:20 +0000 (13:30 +0000)]
pci: pcie_dw_rockchip: Disable unused BARs of the root complex

The Root Complex BARs default to claim the full 1 GiB memory region on
RK3568, leaving no space for any attached device.

Fix this by disable the unused BAR 0 and BAR 1 of the RC.

Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
[jonas@kwiboo.se: Move to rk_pcie_configure and use PCI_BASE_ADDRESS_0/1 const]
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
17 months agopci: pcie_dw_rockchip: Speed up link probe
Jonas Karlman [Sat, 22 Jul 2023 13:30:19 +0000 (13:30 +0000)]
pci: pcie_dw_rockchip: Speed up link probe

Use a similar pattern and delay values as the linux mainline driver to
speed up failing when nothing is connected.

Reduce fail speed from around 5+ seconds down to around one second on a
Radxa ROCK 3 Model A, where pcie2x1 is probed before pcie3x2 M2 slot.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
17 months agopci: pcie_dw_rockchip: Use regulator_set_enable_if_allowed
Jonas Karlman [Sat, 22 Jul 2023 13:30:18 +0000 (13:30 +0000)]
pci: pcie_dw_rockchip: Use regulator_set_enable_if_allowed

The vpcie3v3 regulator is typically a fixed regulator controlled using
gpio. Change to use enable and disable calls on the regulator instead
of trying to set a voltage value.

Also remove the delay to match linux driver, for a fixed regulator the
startup-delay-us prop can be used in case a startup delay is needed.
Limited testing on ROCK 3A, ROCK 5B, Quartz64, Odroid-M1 has shown that
this delay was not needed.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
17 months agopci: pcie_dw_rockchip: Get config region from reg prop
Jonas Karlman [Sat, 22 Jul 2023 13:30:16 +0000 (13:30 +0000)]
pci: pcie_dw_rockchip: Get config region from reg prop

Get the config region to use from the reg prop. Also update the
referenced region index used in comment.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
17 months agocore: read: add dev_read_addr_size_index_ptr function
Jonas Karlman [Sat, 22 Jul 2023 13:30:15 +0000 (13:30 +0000)]
core: read: add dev_read_addr_size_index_ptr function

Add dev_read_addr_size_index_ptr function with the same functionality as
dev_read_addr_size_index, but instead a return pointer is given.
Use map_sysmem() function as cast for the return.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
17 months agorockchip: veyron: Enable Winbond SPI flash
Alper Nebi Yasak [Fri, 21 Jul 2023 08:46:00 +0000 (11:46 +0300)]
rockchip: veyron: Enable Winbond SPI flash

Some veyron boards seem to have Winbond SPI flash chips instead of
GigaDevice ones. At the very least, coreboot builds for veyron boards
have them enabled [1]. Enable support for them here as well.

[1] https://review.coreboot.org/c/coreboot/+/9719

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
17 months agoarm: rockchip: Add Radxa ROCK 4SE
Christopher Obbard [Wed, 19 Jul 2023 16:33:57 +0000 (17:33 +0100)]
arm: rockchip: Add Radxa ROCK 4SE

Add board-specific devicetree/config for the RK3399T-based Radxa ROCK 4SE
board. This board offers similar peripherals in a similar form-factor to
the existing ROCK Pi 4B but uses the cost-optimised RK3399T processor
(which has different OPP table than the RK3399) and other minimal hardware
changes.

Kernel tag: next-20230719
Kernel commits:
86a0e14a82ea ("arm64: dts: rockchip: Add Radxa ROCK 4SE")

Signed-off-by: Christopher Obbard <chris.obbard@collabora.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
17 months agoarm: rockchip: sync ROCK Pi 4 SoCs from Linux
Christopher Obbard [Wed, 19 Jul 2023 16:33:56 +0000 (17:33 +0100)]
arm: rockchip: sync ROCK Pi 4 SoCs from Linux

To prepare for ROCK 4 SE support, changes are needed to the common ROCK
Pi 4 devicetree to move the OPP from the common devicetree to individual
board devicetrees. Sync the Rockchip RK3399 ROCK Pi 4-related DTs from
Linux to gain from these changes.

Kernel tag: next-20230719
Kernel commits:
cfa12c32b96f ("arm64: dts: rockchip: correct wifi interrupt flag in Rock \
Pi 4B")
cee572756aa2 ("arm64: dts: rockchip: Disable HS400 for eMMC on ROCK Pi 4")
2bd1d2dd808c ("arm64: dts: rockchip: Disable HS400 for eMMC on ROCK 4C+")
fd2762a62646 ("arm64: dts: rockchip: Move OPP table from ROCK Pi 4 dtsi")

Signed-off-by: Christopher Obbard <chris.obbard@collabora.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
17 months agorockchip: evb_rk3229: Update/fix README
Alex Bee [Tue, 18 Jul 2023 14:57:14 +0000 (16:57 +0200)]
rockchip: evb_rk3229: Update/fix README

This updates the evb_rk3229's README on howto create / use the FIT image
created by binman.
Also fix some wrong paths and update filenames which have changed in recent
upstream optee-os versions.

Signed-off-by: Alex Bee <knaerzche@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
17 months agorockchip: RK322x: Select SPL_OPTEE_IMAGE
Alex Bee [Tue, 18 Jul 2023 14:57:13 +0000 (16:57 +0200)]
rockchip: RK322x: Select SPL_OPTEE_IMAGE

For RK322x series ARM SoCs the OP-TEE is non-optional, as besides the TEE
it also provides the PSCI implementation, which is expected to be available
by upstream linux.

Select CONFIG_SPL_OPTEE_IMAGE if an FIT image is built.

Signed-off-by: Alex Bee <knaerzche@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
17 months agoconfigs: evb-rk3229: Increase SPL_STACK_R_MALLOC_SIMPLE_LEN
Alex Bee [Tue, 18 Jul 2023 14:57:12 +0000 (16:57 +0200)]
configs: evb-rk3229: Increase SPL_STACK_R_MALLOC_SIMPLE_LEN

An OP-TEE FIT image will fail to extract in SPL because the malloc stack
size is currently limited to 0x2000 for evb-rk3229 board.

In SPL we do not have to care about size limitations, since we are no
longer bound to SRAM limits after DRAM initialization has been done in TPL.

Use the default value for CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN in order
successfully unpack the FIT image.

Signed-off-by: Alex Bee <knaerzche@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
17 months agorockchip: Support OP-TEE for ARM in FIT images created by binman
Alex Bee [Tue, 18 Jul 2023 14:57:11 +0000 (16:57 +0200)]
rockchip: Support OP-TEE for ARM in FIT images created by binman

CONFIG_SPL_OPTEE_IMAGE option is used during DRAM size detection for
Rockchip ARM platform to indicate that an OP-TEE binary was already loaded
and a Trusted Execution Environment (TEE) is available in order to
block/reserve a memory-region for it.

This adds a bunch of new `#if's` to u-boot-rockchip.dtsi to include the
OP-TEE binary in the FIT image for ARM SOCs if CONFIG_SPL_OPTEE_IMAGE is
selected.
That makes it a little harder to read, but I opted for that, because all
the duplicates in an extra ARM-OP-TEE-specfic .dtsi would be the greater
evil, IMHO. Besides it's more likley being "forgotten" to sync when changes
in u-boot-rockchip.dtsi are made.

The no longer required rockchip-optee.dtsi and it's inclusions are dropped.

The hardcoded load address is common across all OP-TEE implemenations for
Rockchip (vendor and upstream).

The OP-TEE-binary is non-optional if CONFIG_SPL_OPTEE_IMAGE is selected and
there will be an error if the file does not exist and/or `TEE=` build
option is missing.

Signed-off-by: Alex Bee <knaerzche@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
17 months agoconfigs: rockchip: rock5b-rk3588: Enable CONFIG_PCI_INIT_R
Christopher Obbard [Mon, 3 Jul 2023 10:41:20 +0000 (11:41 +0100)]
configs: rockchip: rock5b-rk3588: Enable CONFIG_PCI_INIT_R

Enable CONFIG_PCI_INIT_R for rock5b pci enumeration during boot in order
to autodetect the PCI ethernet NIC during the boot process.

Signed-off-by: Christopher Obbard <chris.obbard@collabora.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
17 months agorockchip: rk3568: Fix alloc space exhausted in SPL
Jonas Karlman [Sun, 2 Jul 2023 10:43:57 +0000 (10:43 +0000)]
rockchip: rk3568: Fix alloc space exhausted in SPL

Current SYS_MALLOC_F_LEN of 0x2000 (8 KB) used in SPL is too small for
some RK3568 boards. SPL will print following during boot:

  alloc space exhausted

Increase the default SYS_MALLOC_F_LEN to 0x20000 (128 KB) to mitigate.

Fixes: 2a950e3ba506 ("rockchip: Add rk3568 architecture core")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
17 months agomtd: nand: raw: rockchip_nfc: copy hwecc PA data to oob_poi buffer
Johan Jonker [Thu, 22 Jun 2023 13:59:24 +0000 (15:59 +0200)]
mtd: nand: raw: rockchip_nfc: copy hwecc PA data to oob_poi buffer

Rockchip boot blocks are written per 4 x 512 byte sectors per page.
Each page must have a page address (PA) pointer in OOB to the next page.
Pages are written in a pattern depending on the NAND chip ID.
This logic used to build a page pattern table is not fully disclosed and
is not easy to fit in the MTD framework.
The formula in rk_nfc_write_page_hwecc() function is not correct.
Make hwecc and raw behavior identical.
Generate boot block page address and pattern for hwecc in user space
and copy PA data to/from the already reserved last 4 bytes before EEC
in the chip->oob_poi data layout.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
17 months agorockchip: puma: pass platform parameter to TF-A
Quentin Schulz [Wed, 21 Jun 2023 16:02:53 +0000 (18:02 +0200)]
rockchip: puma: pass platform parameter to TF-A

Puma supports upstream TF-A and is configured to output serial on UART0
instead of the default UART2. Since U-Boot is properly configured to
output on UART0, let's pass the DT to TF-A so there is no need for a
custom TF-A to make the latter output to UART0 too.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
17 months agorockchip: rk3399: pass platform parameter to TF-A by default for new RK3399 boards
Quentin Schulz [Wed, 21 Jun 2023 16:02:52 +0000 (18:02 +0200)]
rockchip: rk3399: pass platform parameter to TF-A by default for new RK3399 boards

Long are gone the times TF-A couldn't handle the FDT passed by U-Boot.
Specifically, since commit e7b586987c0a ("rockchip: don't crash if we
get an FDT we can't parse") in TF-A, failure to parse the FDT will use
the fallback mechanism. This patch was merged in TF-A v2.4-rc0 from two
years ago.

New boards should likely have this option disabled or explicitly enable
it in their respective defconfig.

Because existing boards might depend on a TF-A version that predates
v2.4, let's just enable this option in all RK3399 defconfigs.
Maintainers of each board can decide for themselves if they would prefer
to disable this option and allow U-Boot to pass the DT to TF-A.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
17 months agoboard: rockchip: Add Edgeble Neural Compute Module 6B
Jagan Teki [Sun, 11 Jun 2023 06:57:13 +0000 (12:27 +0530)]
board: rockchip: Add Edgeble Neural Compute Module 6B

Neural Compute Module 6B(Neu6B) is a 96boards SoM-CB compute module
based on Rockchip RK3588J from Edgeble AI.

Add support for this SoM and IO board.

Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
17 months agoarm64: dts: rockchip: Add rk3588 Edgeble Neu6B
Jagan Teki [Sun, 11 Jun 2023 06:57:12 +0000 (12:27 +0530)]
arm64: dts: rockchip: Add rk3588 Edgeble Neu6B

Neural Compute Module 6B(Neu6B) is a 96boards SoM-CB compute module
based on Rockchip RK3588J from Edgeble AI.

General features:
- Rockchip RK3588J
- up to 32GB LPDDR4x
- up to 128GB eMMC
- 2x MIPI CSI2 FPC
- On module WiFi6/BT

Neural Compute Module 6B(Neu6B) IO board is an industrial form factor
ready-to-use IO board from Edgeble AI.

General features:
- microSD slot
- 1x HDMI Out
- 1x HDMI In
- 2x DP
- 1x eDP
- 2x MIPI DSI connector
- 4x MIPI CSI2 connector
- 2x USB Host
- 2x USB 3.0 OTG/Host
- 1x SATA
- 1x 2.5Gbps Ethernet
- 1x M.2 B-Key for 4G/5G cards
- 1x M.2 M-Key slot
- 1x Onboard PoE
- 1x RS485, RS232, CAN
- 1x Audio, MIC port
- RTC battery slot
- 40-pin GPIO expansion

Neu6B needs to mount on top of this IO board in order to create a
complete Edgeble Neural Compute Module 6B(Neu6B) IO platform.

Kernel commits:
commit <5f06c3f508f7> ("arm64: dts: rockchip: Add rk3588 Edgeble Neu6
Model B SoM")
commit <3a9181a43b94> ("arm64: dts: rockchip: Add rk3588 Edgeble Neu6
Model B IO")

Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
17 months agoARM: dts: rockchip: Add rk3588j-u-boot.dtsi
Jagan Teki [Sun, 11 Jun 2023 06:57:11 +0000 (12:27 +0530)]
ARM: dts: rockchip: Add rk3588j-u-boot.dtsi

Add rk3588j-u-boot.dtsi for adding U-Boot specific nodes and
properties for Rockchip RK3588J SoC.

Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
17 months agoarm64: dts: rockchip: Add Rockchip RK3588J
Jagan Teki [Sun, 11 Jun 2023 06:57:10 +0000 (12:27 +0530)]
arm64: dts: rockchip: Add Rockchip RK3588J

Rockchip RK3588J is the industrial-grade version of RK3588 SoC and
is operated with -40 °C to +85 °C temparature.

Add rk3588j specific dtsi for adding rk3588j specific operating points
and other changes to be add in future.

Kernel commit:
commit <8274a04ff1dc> ("arm64: dts: rockchip: Add Rockchip RK3588J")

Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
17 months agoarch: rockchip: rk3588: Fix missing suffix 'A' for Edgeble Neu6A
Jagan Teki [Sun, 11 Jun 2023 06:57:09 +0000 (12:27 +0530)]
arch: rockchip: rk3588: Fix missing suffix 'A' for Edgeble Neu6A

Add missing suffix 'A' for Edgeble Neu6A SoM and IO boards.

Fixes: <15b2d1fb727> ("board: rockchip: Add Edgeble Neural Compute
Module 6")
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
17 months agorockchip: rk3568: Add support for FriendlyARM NanoPi R5C
Tianling Shen [Tue, 30 May 2023 07:11:22 +0000 (15:11 +0800)]
rockchip: rk3568: Add support for FriendlyARM NanoPi R5C

FriendlyARM NanoPi R5C is an open-sourced mini IoT gateway device.

Specification:
- Rockchip RK3568
- 1/4GB LPDDR4X RAM
- 8/32GB eMMC
- SD card slot
- M.2 Connector
- 2x USB 3.0 Port
- 2x 2500 Base-T (PCIe, r8125)
- HDMI 2.0
- MIPI DSI/CSI
- USB Type C 5V

The device tree is taken from kernel v6.4-rc1.

Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Tianling Shen <cnsztl@gmail.com>
17 months agorockchip: rk3568: Add support for FriendlyARM NanoPi R5S
Tianling Shen [Tue, 30 May 2023 07:11:21 +0000 (15:11 +0800)]
rockchip: rk3568: Add support for FriendlyARM NanoPi R5S

FriendlyARM NanoPi R5S is an open-sourced mini IoT gateway device.

Board Specifications
- Rockchip RK3568
- 2 or 4GB LPDDR4X
- 8GB or 16GB eMMC, SD card slot
- GbE LAN (Native)
- 2x 2.5G LAN (PCIe)
- M.2 Connector
- HDMI 2.0, MIPI DSI/CSI
- 2xUSB 3.0 Host
- USB Type C PD, 5V/9V/12V
- GPIO: 12-pin 0.5mm FPC connector

The device tree is taken from kernel v6.4-rc1.

Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Tianling Shen <cnsztl@gmail.com>
17 months agorockchip: rk3328: Add support for Orange Pi R1 Plus LTS
Tianling Shen [Sat, 20 May 2023 11:20:50 +0000 (19:20 +0800)]
rockchip: rk3328: Add support for Orange Pi R1 Plus LTS

The OrangePi R1 Plus LTS is a minor variant of OrangePi R1 Plus with
the on-board NIC chip changed from rtl8211e to yt8531c, and RAM type
changed from DDR4 to LPDDR3.

The device tree is taken from kernel v6.4-rc1.

Signed-off-by: Tianling Shen <cnsztl@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
17 months agorockchip: rk3328: Add support for Orange Pi R1 Plus
Tianling Shen [Sat, 20 May 2023 11:20:49 +0000 (19:20 +0800)]
rockchip: rk3328: Add support for Orange Pi R1 Plus

Orange Pi R1 Plus is a Rockchip RK3328 based SBC by Xunlong.

This device is similar to the NanoPi R2S, and has a 16MB
SPI NOR (mx25l12805d). The reset button is changed to
directly reset the power supply, another detail is that
both network ports have independent MAC addresses.

The device tree and description are taken from kernel v6.3-rc1.

Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Tianling Shen <cnsztl@gmail.com>
17 months agodoc: anbernic: Update RGxx3 Docs for panel detection
Chris Morgan [Mon, 15 May 2023 16:00:32 +0000 (11:00 -0500)]
doc: anbernic: Update RGxx3 Docs for panel detection

Update the Anbernic RGxx3 documentation to note that panel detection
has been added and how it works.

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
17 months agoconfigs: Update anbernic-rgxx3_defconfig for panel detection
Chris Morgan [Mon, 15 May 2023 16:00:31 +0000 (11:00 -0500)]
configs: Update anbernic-rgxx3_defconfig for panel detection

Update the anbernic-rgxx3_defconfig file to support panel autodetection
and automatically updating the compatible string in the devicetree.

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
17 months agoboard: rockchip: Add panel auto-detection for Anbernic RGxx3
Chris Morgan [Mon, 15 May 2023 16:00:30 +0000 (11:00 -0500)]
board: rockchip: Add panel auto-detection for Anbernic RGxx3

Add support to automatically detect the panel for the Anbernic RGxx3.
This is done by creating a "pseudo driver" that provides only the bare
minimum to start the DSI controller and DSI DPHY. Once started, we then
can query the panel for its panel ID and compare it to a table of known
values. The panel compatible string (which corresponds to the upstream
Linux driver) is then defined as an environment variable "panel". The
panel compatible string is also changed automatically via an
ft_board_setup() call if what is detected differs from what is in the
loaded tree. This way, end users can use the same bootloader without
having to worry about which panel they have (as there is no obvious
way of knowing).

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
17 months agoboard: rockchip: Add support for RG353PS to RGxx3
Chris Morgan [Mon, 15 May 2023 16:00:29 +0000 (11:00 -0500)]
board: rockchip: Add support for RG353PS to RGxx3

Add support for the RG353PS to the Anbernic RGxx3. This device is a
slightly pared down version of the RG353P with no eMMC, no touchscreen,
and only 1GB of RAM.

Refactor board logic so that all supported devices are defined with
ADC values and that future boards can be added by just defining the
board values in the device array.

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
17 months agoboard: rockchip: add DSI and DSI-DPHY for Anbernic RGxx3
Chris Morgan [Mon, 15 May 2023 16:00:28 +0000 (11:00 -0500)]
board: rockchip: add DSI and DSI-DPHY for Anbernic RGxx3

Add support for the DSI and DSI-DPHY to U-Boot for the RGxx3. These are
needed so we can send a panel ID request to determine which panel is
being used.

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
17 months agoboard: rockchip: Correct i2c2 pinctrl for RGxx3
Chris Morgan [Mon, 15 May 2023 16:00:27 +0000 (11:00 -0500)]
board: rockchip: Correct i2c2 pinctrl for RGxx3

The pinctrl on the Anbernic RGxx3 for the i2c2 bus does not use the
default value, so explicitly define it.

Fixes: 6cf6fe25370c ("board: rockchip: add Anbernic RGXX3 Series Devices")
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
17 months agoconfigs: rock5b-rk3588: enable USB 3.0 controller, command, gadget
Eugen Hristev [Mon, 29 May 2023 10:01:36 +0000 (13:01 +0300)]
configs: rock5b-rk3588: enable USB 3.0 controller, command, gadget

Enable configuration for USB 3.0 controller, the commands required,
and the gadget drivers.

Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
17 months agoARM: dts: rockchip: rk3588-rock-5b-u-boot: add USB3 support
Eugen Hristev [Mon, 29 May 2023 10:01:35 +0000 (13:01 +0300)]
ARM: dts: rockchip: rk3588-rock-5b-u-boot: add USB3 support

Enable the USB3.0 host node, and gadget node.
The gadget is available through the USB type C connector on the board.
The connector is tied to a Fairchild fusb302b device, which currently
does not have a driver in U-boot, but the node is here for correct
description of the board + Linux future compatibility.
It will be easier to move the node as-is when it will be available
in the DT from Linux

Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
17 months agoARM: dts: rockchip: rk3588: add support for USB 3.0 devices
Joseph Chen [Mon, 29 May 2023 10:01:34 +0000 (13:01 +0300)]
ARM: dts: rockchip: rk3588: add support for USB 3.0 devices

Add support for the USB 3.0 devices in rk3588:
- USB DRD(dual role device) 3.0 #0 as usbdrd3_0 which is available in
rk3588s
- USB DRD(dual role device) 3.0 #1 as usbdrd3_1 which is available in
rk3588 only
- USB DP PHY (combo USB3.0 and DisplayPort Alt Mode ) #0 phy interface
as usbdp_phy0
- USB DP PHY (combo USB3.0 and DisplayPort Alt Mode ) #1 phy interface
as usbdp_phy1
- USB 2.0 phy #2 , the USB 3.0 device can work with this phy in USB 2.0
mode
- associated GRFs (general register files) for the devices.

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
[eugen.hristev@collabora.com: move nodes to right place, adapt from latest
linux kernel]
Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
17 months agophy: rockchip: add usbdp combo phy driver
Frank Wang [Mon, 29 May 2023 10:01:33 +0000 (13:01 +0300)]
phy: rockchip: add usbdp combo phy driver

This adds a new USBDP combo PHY with Samsung IP block driver.
The PHY is a combo between USB 3.0 and DisplayPort alt mode.

Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
[eugen.hristev@collabora.com: ported to 2023.07, clean-up]
Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
17 months agoARM: dts: rockchip: rk3588: sync with Linux
Eugen Hristev [Mon, 29 May 2023 07:34:23 +0000 (10:34 +0300)]
ARM: dts: rockchip: rk3588: sync with Linux

Sync the devicetree with linux-next tag: next-20230525

Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
17 months agovideo: rockchip: Add support for RK3399 to dw-mipi-dsi bridge
Ondrej Jirman [Thu, 25 May 2023 12:29:03 +0000 (14:29 +0200)]
video: rockchip: Add support for RK3399 to dw-mipi-dsi bridge

This just needs some extra clocks enabled, and different registers
configured. Copied from Linux, just like the original submitter
of this driver did for rk3568.

Tested on Pinephone Pro.

Signed-off-by: Ondrej Jirman <megi@xff.cz>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Philipp Tomsich <philipp.tomsich@vrull.eu>
Cc: Kever Yang <kever.yang@rock-chips.com>
Cc: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
17 months agorockchip: board: Update Odroid Go2 to Support Additional Revisions
Chris Morgan [Wed, 10 May 2023 15:55:50 +0000 (10:55 -0500)]
rockchip: board: Update Odroid Go2 to Support Additional Revisions

Update the board.c file for the Odroid Go Advance to support the
Black Edition and the Odroid Go Super. The Odroid Go Advance Black
Edition differs from the original model with the addition of 2
extra buttons and an ESP8266 WiFi module. The Odroid Go Super
adds an additional 2 buttons compared to the Black Edition, along
with a larger panel and larger battery.

This change uses the value of ADC0 to determine which of these
3 models it is, and then changes the ${fdtfile} environment variable
to match the proper devicetree name in mainline Linux.

Tested on an Odroid Go Advance (first revision) and an Odroid Go Super.
The correct ${fdtfile} variable was set for each device.

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
17 months agoconfigs: rock5b-rk3588: add rtl8169 driver
Eugen Hristev [Tue, 25 Apr 2023 13:06:59 +0000 (16:06 +0300)]
configs: rock5b-rk3588: add rtl8169 driver

Add the rtl8169 driver, which supports the rtl8125b device, which is
connected on the pciE bus on this board.
Enable also CONFIG_SYS_HAS_NONCACHED_MEMORY to have the descriptors stored.

Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
17 months agoMerge https://source.denx.de/u-boot/custodians/u-boot-usb
Tom Rini [Thu, 27 Jul 2023 14:35:36 +0000 (10:35 -0400)]
Merge https://source.denx.de/u-boot/custodians/u-boot-usb

17 months agousb: xhci: Fix double free on failure
Richard Habeeb [Mon, 24 Jul 2023 19:45:25 +0000 (15:45 -0400)]
usb: xhci: Fix double free on failure

drivers/core/device.c will call `device_free()` after xhci_register
already frees the private device data. This can cause a crash later
during the boot process, observed on aarch64 RPi4b as a synchronous
exception. All callers of xhci_register use priv_auto, so this won't
lead to memory leaks.

Signed-off-by: Richard Habeeb <richard.habeeb@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
17 months agoMerge branch 'master' of git://git.denx.de/u-boot-coldfire
Tom Rini [Tue, 25 Jul 2023 21:37:39 +0000 (17:37 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-coldfire

- Watchdog updates, and more MAINTAINERS entries

17 months agoRevert "travis-ci: Add m68k M5208EVBE machine"
Tom Rini [Tue, 25 Jul 2023 21:37:18 +0000 (17:37 -0400)]
Revert "travis-ci: Add m68k M5208EVBE machine"

This commit was not intended for this tree but rather
u-boot-test-scripts (where it is applied).

This reverts commit f04ef0a7a0166e91729b45b1db22f5cc3b3b2f99.

Signed-off-by: Tom Rini <trini@konsulko.com>
17 months agoMAINTAINERS: add myself as mcf_wdt.c maintainer
Angelo Dureghello [Sun, 25 Jun 2023 19:32:20 +0000 (21:32 +0200)]
MAINTAINERS: add myself as mcf_wdt.c maintainer

Signed-off-by: Angelo Dureghello <angelo@kernel-space.org>
---
Changes for v2:
- none
Changes for v3:
- none

17 months agoconfigs: m68k: add watchdog driver
Angelo Dureghello [Sat, 24 Jun 2023 21:46:17 +0000 (23:46 +0200)]
configs: m68k: add watchdog driver

Add config options for mcf_wdt driver.

Signed-off-by: Angelo Dureghello <angelo@kernel-space.org>
---
Changes for v2:
- none
Changes for v3:
- none

17 months agom68k: dts: add watchdog node
Angelo Dureghello [Sat, 24 Jun 2023 21:38:55 +0000 (23:38 +0200)]
m68k: dts: add watchdog node

Add watchdog node for the implemented mcf_wdt driver.

Signed-off-by: Angelo Dureghello <angelo@kernel-space.org>
---
Changes for v2:
- remove unnecessary big-endian property
Changes for v3:
- none

17 months agom68k: move watchdog functions in mcf_wdt driver
Angelo Dureghello [Sat, 24 Jun 2023 21:22:23 +0000 (23:22 +0200)]
m68k: move watchdog functions in mcf_wdt driver

Move watchdog functions inside a separate watchdog driver.

Signed-off-by: Angelo Dureghello <angelo@kernel-space.org>
---
Changes for v2:
- none
Changes for v3:
- none

17 months agodrivers: watchdog: add mcf watchdog support
Angelo Dureghello [Sat, 24 Jun 2023 20:30:18 +0000 (22:30 +0200)]
drivers: watchdog: add mcf watchdog support

This watchdog driver applies to the following
mcf families:

- mcf52x2 (5271 5275 5282)
- mcf532x (5329 5373)
- mcf523x (5235)

Cpu's not listed for each family does not have WDT module.

Note, after some attempts testing by qemu on 5208 i
finally abandoned, watchdog seems not implemented properly.

The driver has been tested in a real M5282EVM.

Signed-off-by: Angelo Dureghello <angelo@kernel-space.org>
---
Changes for v2:
- remove unnecessary hardcoded timeouts
- remove unnecessary hw_watchdog_xxx stuff
- rewrite wdog module reg calculation
- using IS_ENABLED() where possible
Changes for v3:
- remove hardcoded 4s test

17 months agoboard: m68k add missing maintainer
Angelo Dureghello [Sun, 23 Jul 2023 21:54:29 +0000 (23:54 +0200)]
board: m68k add missing maintainer

Add myself as a maintainer for orphaned boards.
All these boards are covered by buildman m68k test.

Signed-off-by: Angelo Dureghello <angelo@kernel-space.org>
17 months agoPrepare v2023.10-rc1
Tom Rini [Tue, 25 Jul 2023 21:19:54 +0000 (17:19 -0400)]
Prepare v2023.10-rc1

Signed-off-by: Tom Rini <trini@konsulko.com>
17 months agoconfigs: Resync with savedefconfig
Tom Rini [Tue, 25 Jul 2023 21:00:57 +0000 (17:00 -0400)]
configs: Resync with savedefconfig

Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
17 months agoMerge branch '2023-07-25-assorted-general-updates'
Tom Rini [Tue, 25 Jul 2023 20:55:59 +0000 (16:55 -0400)]
Merge branch '2023-07-25-assorted-general-updates'

- A number of MAINTAINER file updates, assorted driver/platform fixes,
  performance improvements for sparse file writes, and 64bit time_t.

17 months agoMAINTAINERS: Take maintainership of TI KeyStone2 support
Andrew Davis [Tue, 25 Jul 2023 15:28:50 +0000 (10:28 -0500)]
MAINTAINERS: Take maintainership of TI KeyStone2 support

Add arch/arm/mach-keystone/ into K2 board directory MAINTAINERS file.

Convert current entries into regex match style.

Assign maintainership to myself.

Signed-off-by: Andrew Davis <afd@ti.com>
17 months agoMakefile: Use sort shortopts
Marek Vasut [Thu, 20 Jul 2023 12:50:42 +0000 (14:50 +0200)]
Makefile: Use sort shortopts

POSIX does not defined longopts for sort, use shortops
for even more compatibility.

Fixes: cc5a490cf465 ("Makefile: Sort u-boot-initial-env output")
Reported-by: Milan P. Stanić <mps@arvanta.net>
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
Tested-by: Milan P. Stanić <mps@arvanta.net>
17 months agoMAINTAINERS: Add some missing directories or files
Tom Rini [Tue, 18 Jul 2023 23:33:34 +0000 (19:33 -0400)]
MAINTAINERS: Add some missing directories or files

In a few cases we have MAINTAINERS entries that are missing obvious
paths or files. Typically this means a board directory that did not list
itself, but in a few cases we have a Kconfig file or similar.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
17 months agoMAINTAINERS: Deal with '+' in paths
Tom Rini [Tue, 18 Jul 2023 23:33:33 +0000 (19:33 -0400)]
MAINTAINERS: Deal with '+' in paths

The listed paths are allowed to contain wildcards.  This includes the
'+' character which we have as a literal part of the path in a few
cases. Escape the '+' here so that files are matched.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
17 months agoMAINTAINERS: Fix path typos and similar
Tom Rini [Tue, 18 Jul 2023 23:33:32 +0000 (19:33 -0400)]
MAINTAINERS: Fix path typos and similar

We have a number of cases where the in-tree path of files and where
they presumably were when the first version of a patch were posted
differ slightly.  Correct these to point at where the files are now.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
17 months agoMAINTAINERS: Add a number of "common" directories
Tom Rini [Tue, 18 Jul 2023 23:33:31 +0000 (19:33 -0400)]
MAINTAINERS: Add a number of "common" directories

A number of platforms have "common" directories that are in turn not
listed by the board MAINTAINERS file.  Add these directories in many
cases.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
17 months agoxes: Remove leftover code
Tom Rini [Tue, 18 Jul 2023 23:33:30 +0000 (19:33 -0400)]
xes: Remove leftover code

The platforms here have been removed, but the common code directory was
forgotten.  Clean up.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
17 months agoarm: Remove leftover MAINTAINERS files
Tom Rini [Tue, 18 Jul 2023 23:33:29 +0000 (19:33 -0400)]
arm: Remove leftover MAINTAINERS files

These platforms have been removed, but the MAINTAINERS file was missed,
clean up.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
17 months agoarm: Remove more remnants of bcmcygnus
Tom Rini [Tue, 18 Jul 2023 23:33:28 +0000 (19:33 -0400)]
arm: Remove more remnants of bcmcygnus

Remove some leftover files from the bcmcygnus platform.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
17 months agoMAINTAINERS: Re-order CAAM section
Tom Rini [Tue, 18 Jul 2023 16:20:28 +0000 (12:20 -0400)]
MAINTAINERS: Re-order CAAM section

This file is in alphabetical order, move CAAM up to where it should be.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
17 months agosunxi: Add MAINTAINERS entry for Lctech Pi F1C200s
Tom Rini [Tue, 18 Jul 2023 16:20:27 +0000 (12:20 -0400)]
sunxi: Add MAINTAINERS entry for Lctech Pi F1C200s

This defconfig was added without a MAINTAINERS entry, add one.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
17 months agorockchip: Add MAINTAINERS entry for Radxa Rock 4C+
Tom Rini [Tue, 18 Jul 2023 16:20:26 +0000 (12:20 -0400)]
rockchip: Add MAINTAINERS entry for Radxa Rock 4C+

This defconfig was added without a MAINTAINERS entry, add one.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
17 months agoMAINTAINERS: Add some missing defconfig files to existing entries
Tom Rini [Tue, 18 Jul 2023 16:20:25 +0000 (12:20 -0400)]
MAINTAINERS: Add some missing defconfig files to existing entries

We have a few places where defconfigs were added (or renamed) and not
included in their previously listed MAINTAINERS entry, correct this.

Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
17 months agoMAINTAINERS: Correct minor mistakes on some file listings
Tom Rini [Tue, 18 Jul 2023 16:20:24 +0000 (12:20 -0400)]
MAINTAINERS: Correct minor mistakes on some file listings

There are a few entries where minor mistakes mean that we don't match up
with obviously expected files, correct those.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
17 months agopart: eliminate part_get_info_by_name_type()
Heinrich Schuchardt [Sun, 16 Jul 2023 11:34:44 +0000 (13:34 +0200)]
part: eliminate part_get_info_by_name_type()

Since commit 56670d6fb83f ("disk: part: use common api to lookup part
driver") part_get_info_by_name_type() ignores the part_type parameter
used to restrict the partition table type.

omap_mmc_get_part_size() and part_get_info_by_name() are the only
consumers.

omap_mmc_get_part_size() calls with part_type = PART_TYPE_EFI because at
the time of implementation a speed up could be gained by passing the
partition table type. After 5 years experience without this restriction
it looks safe to keep it that way.

part_get_info_by_name() uses PART_TYPE_ALL.

Move the logic of part_get_info_by_name_type() to part_get_info_by_name()
and replace the function in omap_mmc_get_part_size().

Fixes: 56670d6fb83f ("disk: part: use common api to lookup part driver")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
17 months ago.mailmap: Correct entries for Masahiro Yamada
Tom Rini [Sat, 15 Jul 2023 15:02:24 +0000 (11:02 -0400)]
.mailmap: Correct entries for Masahiro Yamada

His entries had the correct email address listed last rather than first,
correct this.

Fixes: 4fa4227cdd14 (".mailmap: Record all address for main U-Boot contributor")
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Michal Simek <michal.simek@amd.com>
17 months agocommon: define time_t as 64bit
Heinrich Schuchardt [Sat, 15 Jul 2023 07:16:59 +0000 (09:16 +0200)]
common: define time_t as 64bit

To avoid the year 2038 problem time_t must be 64bit on all architectures.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
17 months agofwu: Show number of attempts in Trial State
Michal Simek [Fri, 14 Jul 2023 08:47:06 +0000 (10:47 +0200)]
fwu: Show number of attempts in Trial State

It is not visible anywhere in Trial State if this is the first, second, etc
attempt that's why show a message to be aware about status.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Acked-by: Jassi Brar <jaswinder.singh@linaro.org>
17 months agofwu: mtd: Fix dfu_alt_info generation for 2 images per bank
Michal Simek [Thu, 13 Jul 2023 14:36:27 +0000 (16:36 +0200)]
fwu: mtd: Fix dfu_alt_info generation for 2 images per bank

Code rewrites the last char of size with adding &. It is visible from
dfu_alt_info print before this patch:

Make dfu_alt_info: 'mtd nor0=bank0 raw 2320000 80000;bank1 raw 27a0000
8000&mtd nor0=bank0 raw 23a0000 4000000;bank1 raw 2820000 4000000'

And after it:
Make dfu_alt_info: 'mtd nor0=bank0 raw 2320000 80000;bank1 raw 27a0000
80000&mtd nor0=bank0 raw 23a0000 4000000;bank1 raw 2820000 4000000'

Size for bank0 and bank1 must be the same because it is the same image.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Acked-by: Jassi Brar <jaswinder.singh@linaro.org>
17 months agofwu: Allow code to properly decode trial state
Michal Simek [Thu, 13 Jul 2023 14:35:24 +0000 (16:35 +0200)]
fwu: Allow code to properly decode trial state

Current code after capsule update (mtd write) is not changing active_index
in mdata to previous_active_index.
On the reboot this is shown but showing message
"Boot idx 1 is not matching active idx 0, changing active_idx"
which is changing active_idx and writing mdata to flash.

But when this message is visible it is not checking which state that images
are. If they have acceptance bit setup to yes everything is fine and valid
images are booted (doesn't mean the latest one).
But if acceptance bit is no and images are in trial state in_trial variable
is never setup. Which means that from new flashed image stable image can be
rewritten because in_trial is not setup properly.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Acked-by: Jassi Brar <jaswinder.singh@linaro.org>
17 months agodrivers: rtc: max313xx: provide read8/write8
Chris Packham [Tue, 11 Jul 2023 23:30:44 +0000 (11:30 +1200)]
drivers: rtc: max313xx: provide read8/write8

In some designs the MAX313xx RTC may need calibration to cope with
oscillator inaccuracies. Provide read8/write8 ops so that the registers
can be accessed. Because the driver covers a range of MAX313xx variants
no attempt is made to ensure the register is valid.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
17 months agolib: sparse: allocate FASTBOOT_MAX_BLK_WRITE instead of small number
Mattijs Korpershoek [Fri, 7 Jul 2023 08:13:34 +0000 (10:13 +0200)]
lib: sparse: allocate FASTBOOT_MAX_BLK_WRITE instead of small number

Commit 62649165cb02 ("lib: sparse: Make CHUNK_TYPE_RAW buffer aligned")
fixed cache alignment for systems with a D-CACHE.

However it introduced some performance regressions [1] on system
flashing huge images, such as Android.

On AM62x SK EVM, we also observe such performance penalty:
Sending sparse 'super' 1/2 (768793 KB)             OKAY [ 23.954s]
Writing 'super'                                    OKAY [ 75.926s]
Sending sparse 'super' 2/2 (629819 KB)             OKAY [ 19.641s]
Writing 'super'                                    OKAY [ 62.849s]
Finished. Total time: 182.474s

The reason for this is that we use an arbitrary small buffer
(info->blksz * 100) for transferring.

Fix it by using a bigger buffer (info->blksz * FASTBOOT_MAX_BLK_WRITE)
as suggested in the original's patch review [2].

With this patch, performance impact is mitigated:
Sending sparse 'super' 1/2 (768793 KB)             OKAY [ 23.912s]
Writing 'super'                                    OKAY [ 15.780s]
Sending sparse 'super' 2/2 (629819 KB)             OKAY [ 19.581s]
Writing 'super'                                    OKAY [ 17.192s]
Finished. Total time: 76.569s

[1] https://lore.kernel.org/r/20221118121323.4009193-1-gary.bisson@boundarydevices.com
[2] https://lore.kernel.org/r/all/43e4c17c-4483-ec8e-f843-9b4c5569bd18@seco.com/

Fixes: 62649165cb02 ("lib: sparse: Make CHUNK_TYPE_RAW buffer aligned")
Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
17 months agodrivers: led: bcm6858: do not use null label to find the top
Philippe Reynes [Fri, 23 Jun 2023 16:36:42 +0000 (18:36 +0200)]
drivers: led: bcm6858: do not use null label to find the top

This driver considers that a node with an empty label is the top.
But the led class has changed, if a label is not provided for a led,
the label is filed with the node name. So we update this driver
to use a wrapper to manage the top led node.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
17 months agomailbox: k3-sec-proxy: Fill non-message tx data fields with 0x0
Nishanth Menon [Tue, 20 Jun 2023 18:17:09 +0000 (13:17 -0500)]
mailbox: k3-sec-proxy: Fill non-message tx data fields with 0x0

Sec proxy data buffer is 60 bytes with the last of the registers
indicating transmission completion. This however poses a bit of a
challenge.

The backing memory for sec_proxy is regular memory, and all sec proxy
does is to trigger a burst of all 60 bytes of data over to the target
thread backing ring accelerator. It doesn't do a memory scrub when
it moves data out in the burst. When we transmit multiple messages,
remnants of previous message is also transmitted which results in
some random data being set in TISCI fields of messages that have been
expanded forward.

The entire concept of backward compatibility hinges on the fact that
the unused message fields remain 0x0 allowing for 0x0 value to be
specially considered when backward compatibility of message extension
is done.

So, instead of just writing the completion register, we continue
to fill the message buffer up with 0x0 (note: for partial message
involving completion, we already do this).

This allows us to scale and introduce ABI changes back also work with
other boot stages that may have left data in the internal memory.

While at this, drop the unused accessor function.

Fixes: f9aa41023bd9 ("mailbox: Introduce K3 Secure Proxy Driver")
Signed-off-by: Nishanth Menon <nm@ti.com>
17 months agobuildman: Specify the output directory in tests
Simon Glass [Tue, 25 Jul 2023 14:13:22 +0000 (08:13 -0600)]
buildman: Specify the output directory in tests

The default output directory is generally '../' in tests so we end up
trying to create '../.bm-work'. This does not work with azure, so update
these tests to use the temporary directory instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
17 months agoRevert "Merge branch '2023-07-24-introduce-FF-A-suppport'"
Tom Rini [Mon, 24 Jul 2023 23:51:05 +0000 (19:51 -0400)]
Revert "Merge branch '2023-07-24-introduce-FF-A-suppport'"

This reverts commit d927d1a80843e1c3e2a3f0b8f6150790bef83da1, reversing
changes made to c07ad9520c6190070513016fdb495d4703a4a853.

These changes do not pass CI currently.

Signed-off-by: Tom Rini <trini@konsulko.com>
17 months agoMerge branch '2023-07-24-introduce-FF-A-suppport'
Tom Rini [Mon, 24 Jul 2023 22:58:22 +0000 (18:58 -0400)]
Merge branch '2023-07-24-introduce-FF-A-suppport'

To quote the author:
Adding support for Arm FF-A v1.0 (Arm Firmware Framework for Armv8-A) [A].

FF-A specifies interfaces that enable a pair of software execution
environments aka partitions to communicate with each other. A partition
could be a VM in the Normal or Secure world, an application in S-EL0, or
a Trusted OS in S-EL1.

FF-A is a discoverable bus and similar to architecture features.
FF-A bus is discovered using ARM_SMCCC_FEATURES mechanism performed
by the PSCI driver.

   => dm tree

    Class     Index  Probed  Driver                Name
   -----------------------------------------------------------
   ...
    firmware      0  [ + ]   psci                      |-- psci
    ffa                   0  [   ]   arm_ffa               |   `-- arm_ffa
   ...

Clients are able to probe then use the FF-A bus by calling the DM class
searching APIs (e.g: uclass_first_device).

This implementation of the specification provides support for Aarch64.

The FF-A driver uses the SMC ABIs defined by the FF-A specification to:

    - Discover the presence of secure partitions (SPs) of interest
    - Access an SP's service through communication protocols
      (e.g: EFI MM communication protocol)

The FF-A support provides the following features:

    - Being generic by design and can be used by any Arm 64-bit platform
    - FF-A support can be compiled and used without EFI
    - Support for SMCCCv1.2 x0-x17 registers
    - Support for SMC32 calling convention
    - Support for 32-bit and 64-bit FF-A direct messaging
    - Support for FF-A MM communication (compatible with EFI boot time)
    - Enabling FF-A and MM communication in Corstone1000 platform as a use case
    - A Uclass driver providing generic FF-A methods.
    - An Arm FF-A device driver providing Arm-specific methods and
      reusing the Uclass methods.
    - A sandbox emulator for Arm FF-A, emulates the FF-A side of the
      Secure World and provides FF-A ABIs inspection methods.
    - An FF-A sandbox device driver for FF-A communication with the
      emulated Secure World.  The driver leverages the FF-A Uclass to
      establish FF-A communication.
    - Sandbox FF-A test cases.
    - A new command called armffa is provided as an example of how to
      access the FF-A bus

For more details about the FF-A support please refer to [B] and refer to [C] for
how to use the armffa command.

Please find at [D] an example of the expected boot logs when enabling
FF-A support for a platform. In this example the platform is
Corstone1000. But it can be any Arm 64-bit platform.

[A]: https://developer.arm.com/documentation/den0077/latest/
[B]: doc/arch/arm64.ffa.rst
[C]: doc/usage/cmd/armffa.rst
[D]: example of boot logs when enabling FF-A

17 months agoarm_ffa: efi: corstone1000: enable MM communication
Abdellatif El Khlifi [Thu, 13 Jul 2023 13:28:47 +0000 (14:28 +0100)]
arm_ffa: efi: corstone1000: enable MM communication

turn on EFI MM communication

On corstone1000 platform MM communication between u-boot
and the secure world (Optee) is done using the FF-A bus.

Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Cc: Jens Wiklander <jens.wiklander@linaro.org>
17 months agoarm_ffa: efi: introduce FF-A MM communication
Abdellatif El Khlifi [Thu, 13 Jul 2023 13:28:46 +0000 (14:28 +0100)]
arm_ffa: efi: introduce FF-A MM communication

Add MM communication support using FF-A transport

This feature allows accessing MM partitions services through
EFI MM communication protocol. MM partitions such as StandAlonneMM
or smm-gateway secure partitions which reside in secure world.

An MM shared buffer and a door bell event are used to exchange
the data.

The data is used by EFI services such as GetVariable()/SetVariable()
and copied from the communication buffer to the MM shared buffer.

The secure partition is notified about availability of data in the
MM shared buffer by an FF-A message (door bell).

On such event, MM SP can read the data and updates the MM shared
buffer with the response data.

The response data is copied back to the communication buffer and
consumed by the EFI subsystem.

MM communication protocol supports FF-A 64-bit direct messaging.

Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
Tested-by: Gowtham Suresh Kumar <gowtham.sureshkumar@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Cc: Jens Wiklander <jens.wiklander@linaro.org>
17 months agoarm_ffa: introduce armffa command Sandbox test
Abdellatif El Khlifi [Thu, 13 Jul 2023 13:28:45 +0000 (14:28 +0100)]
arm_ffa: introduce armffa command Sandbox test

Add Sandbox test for the armffa command

Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Cc: Jens Wiklander <jens.wiklander@linaro.org>
17 months agoarm_ffa: introduce sandbox test cases for UCLASS_FFA
Abdellatif El Khlifi [Thu, 13 Jul 2023 13:28:44 +0000 (14:28 +0100)]
arm_ffa: introduce sandbox test cases for UCLASS_FFA

Add functional test cases for the FF-A support

These tests rely on the FF-A sandbox emulator and FF-A
sandbox driver which help in inspecting the FF-A communication.

Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Cc: Jens Wiklander <jens.wiklander@linaro.org>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
17 months agoarm_ffa: introduce sandbox FF-A support
Abdellatif El Khlifi [Thu, 13 Jul 2023 13:28:43 +0000 (14:28 +0100)]
arm_ffa: introduce sandbox FF-A support

Emulate Secure World's FF-A ABIs and allow testing U-Boot FF-A support

Features of the sandbox FF-A support:

- Introduce an FF-A emulator
- Introduce an FF-A device driver for FF-A comms with emulated Secure World
- Provides test methods allowing to read the status of the inspected ABIs

The sandbox FF-A emulator supports only 64-bit direct messaging.

Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Cc: Jens Wiklander <jens.wiklander@linaro.org>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
17 months agoarm_ffa: introduce armffa command
Abdellatif El Khlifi [Thu, 13 Jul 2023 13:28:42 +0000 (14:28 +0100)]
arm_ffa: introduce armffa command

Provide armffa command showcasing the use of the U-Boot FF-A support

armffa is a command showcasing how to invoke FF-A operations.
This provides a guidance to the client developers on how to
call the FF-A bus interfaces. The command also allows to gather secure
partitions information and ping these  partitions. The command is also
helpful in testing the communication with secure partitions.

For more details please refer to the command documentation [1].

[1]: doc/usage/cmd/armffa.rst

Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Cc: Jens Wiklander <jens.wiklander@linaro.org>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
17 months agoarm_ffa: introduce Arm FF-A support
Abdellatif El Khlifi [Thu, 13 Jul 2023 13:28:41 +0000 (14:28 +0100)]
arm_ffa: introduce Arm FF-A support

Add Arm FF-A support implementing Arm Firmware Framework for Armv8-A v1.0

The Firmware Framework for Arm A-profile processors (FF-A v1.0) [1]
describes interfaces (ABIs) that standardize communication
between the Secure World and Normal World leveraging TrustZone
technology.

This driver uses 64-bit registers as per SMCCCv1.2 spec and comes
on top of the SMCCC layer. The driver provides the FF-A ABIs needed for
querying the FF-A framework from the secure world.

The driver uses SMC32 calling convention which means using the first
32-bit data of the Xn registers.

All supported ABIs come with their 32-bit version except FFA_RXTX_MAP
which has 64-bit version supported.

Both 32-bit and 64-bit direct messaging are supported which allows both
32-bit and 64-bit clients to use the FF-A bus.

FF-A is a discoverable bus and similar to architecture features.
FF-A bus is discovered using ARM_SMCCC_FEATURES mechanism performed
by the PSCI driver.

Clients are able to probe then use the FF-A bus by calling the DM class
searching APIs (e.g: uclass_first_device).

The Secure World is considered as one entity to communicate with
using the FF-A bus. FF-A communication is handled by one device and
one instance (the bus). This FF-A driver takes care of all the
interactions between Normal world and Secure World.

The driver exports its operations to be used by upper layers.

Exported operations:

- ffa_partition_info_get
- ffa_sync_send_receive
- ffa_rxtx_unmap

Generic FF-A methods are implemented in the Uclass (arm-ffa-uclass.c).
Arm specific methods are implemented in the Arm driver (arm-ffa.c).

For more details please refer to the driver documentation [2].

[1]: https://developer.arm.com/documentation/den0077/latest/
[2]: doc/arch/arm64.ffa.rst

Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Cc: Jens Wiklander <jens.wiklander@linaro.org>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
17 months agolib: uuid: introduce testcase for uuid_str_to_le_bin
Abdellatif El Khlifi [Thu, 13 Jul 2023 13:28:40 +0000 (14:28 +0100)]
lib: uuid: introduce testcase for uuid_str_to_le_bin

provide a test case

Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
17 months agolib: uuid: introduce uuid_str_to_le_bin function
Abdellatif El Khlifi [Thu, 13 Jul 2023 13:28:39 +0000 (14:28 +0100)]
lib: uuid: introduce uuid_str_to_le_bin function

convert UUID string to little endian binary data

Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Cc: Jens Wiklander <jens.wiklander@linaro.org>
17 months agoarm64: smccc: add support for SMCCCv1.2 x0-x17 registers
Abdellatif El Khlifi [Thu, 13 Jul 2023 13:28:38 +0000 (14:28 +0100)]
arm64: smccc: add support for SMCCCv1.2 x0-x17 registers

add support for x0-x17 registers used by the SMC calls

In SMCCC v1.2 [1] arguments are passed in registers x1-x17.
Results are returned in x0-x17.

This work is inspired from the following kernel commit:

arm64: smccc: Add support for SMCCCv1.2 extended input/output registers

[1]: https://documentation-service.arm.com/static/5f8edaeff86e16515cdbe4c6?token=

Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
17 months agoMerge tag 'dm-pull-24jul23' of https://source.denx.de/u-boot/custodians/u-boot-dm
Tom Rini [Mon, 24 Jul 2023 18:55:56 +0000 (14:55 -0400)]
Merge tag 'dm-pull-24jul23' of https://source.denx.de/u-boot/custodians/u-boot-dm

buildman refactoring and --maintainer-check
binman TI support
binman cipher support

17 months agoMerge branch '2023-07-22-TI-K3-improvements'
Tom Rini [Mon, 24 Jul 2023 17:55:59 +0000 (13:55 -0400)]
Merge branch '2023-07-22-TI-K3-improvements'

- Actually merge the assorted K3 platform improvements that were
  supposed to be in commit 247aa5a19115 ("Merge branch
  '2023-07-21-assorted-TI-platform-updates'")

17 months agobuildman: Enable test coverage
Simon Glass [Wed, 19 Jul 2023 23:49:31 +0000 (17:49 -0600)]
buildman: Enable test coverage

Enable measuring test coverage for buildman so we can see the gaps. It is
currently at 68%.

Signed-off-by: Simon Glass <sjg@chromium.org>
17 months agobuildman: Add an option to check maintainers and targets
Simon Glass [Wed, 19 Jul 2023 23:49:30 +0000 (17:49 -0600)]
buildman: Add an option to check maintainers and targets

In poking around it seems that many boards don't define a CONFIG_TARGET
Kconfig variable. This is not strictly necessary, but add an option to
buildman so these can be viewed.

Signed-off-by: Simon Glass <sjg@chromium.org>
17 months agobuildman: Use -D for --debug
Simon Glass [Wed, 19 Jul 2023 23:49:29 +0000 (17:49 -0600)]
buildman: Use -D for --debug

Change -D to mean --debug for consistency with other tools. This is not a
commonly used option, so the impact should be minimal.

Signed-off-by: Simon Glass <sjg@chromium.org>