Use constants to refer to colors.
Adjust initialization of foreground and background color to avoid
setting reserved bits.
Consistently u32 instead of unsigned for color bit mask.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
dm: video: show correct colors in graphical console
Get RGB sequence in pixels right (swap blue and red).
Do not set reserved bits.
qemu-system-i386 -display sdl -vga virtio and
qemu-system-i386 -display sdl -vga cirrus
now display the similar colors (highlighting still missing) as
qemu-system-i386 -nographic
Testing is possible via
setenv efi_selftest test output
bootefi selftest
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
Masahiro Yamada [Sun, 4 Mar 2018 16:20:11 +0000 (01:20 +0900)]
libfdt: move headers to <linux/libfdt.h> and <linux/libfdt_env.h>
Thomas reported U-Boot failed to build host tools if libfdt-devel
package is installed because tools include libfdt headers from
/usr/include/ instead of using internal ones.
This commit moves the header code:
include/libfdt.h -> include/linux/libfdt.h
include/libfdt_env.h -> include/linux/libfdt_env.h
and replaces include directives:
#include <libfdt.h> -> #include <linux/libfdt.h>
#include <libfdt_env.h> -> #include <linux/libfdt_env.h>
Reported-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
tools: Include U-Boot libfdt headers from their actual path
There are no headers for libfdt in lib/libfdt, as they are instead
located in scripts/dtc/libfdt. Specifying lib/libfdt for headers
inclusion in host tools results in using the system libfdt headers,
which is not what we want. Change this to the proper path.
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Mario Six [Thu, 1 Mar 2018 13:45:04 +0000 (14:45 +0100)]
gpio: pca953x_gpio: Support label setting from DT
The PCA953x driver uses "gpio@%x_" as the GPIO bank name, where "%x" is
instantiated with the I2C address of the chip. While this works, it
becomes very confusing if a board has multiple PCAs with the same
address on different I2C busses, and it also becomes an issue when a
GPIO's value is to be set via the 'gpio' command, because this command
only ever sets the value of the first device it encounters, leaving the
other devices inaccessible to the command.
As to not break boards that rely on this naming scheme, we introduce a
new device tree string property "label" for the driver. If it exists, it
is used to build a bank name of the form "%s@%x_" (where %x is still
instantiated with the I2C address). If it does not exist, the legacy
labeling scheme is used.
Stefan Agner [Thu, 1 Mar 2018 13:06:32 +0000 (14:06 +0100)]
tools/env: allow equal sign as key value separation
Treat the first equal sign as a key/value separation too. This makes
the script files compatible with mkenvimage input file format. It
won't support variables with equal signs anymore, but this seems not
really like a loss.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Jeremy Boone [Mon, 12 Feb 2018 22:56:37 +0000 (17:56 -0500)]
Atmel TPM: Fix potential buffer overruns
Ensure that the Atmel TPM driver performs sufficient
validation of the length returned in the TPM response header.
This patch prevents memory corruption if the header contains a
length value that is larger than the destination buffer.
Signed-off-by: Jeremy Boone <jeremy.boone@nccgroup.trust>
Jeremy Boone [Mon, 12 Feb 2018 22:56:36 +0000 (17:56 -0500)]
Infineon TPM: Fix potential buffer overruns
Ensure that the Infineon I2C and SPI TPM driver performs adequate
validation of the length extracted from the TPM response header.
This patch prevents integer underflow when the length was too small,
which could lead to memory corruption.
Signed-off-by: Jeremy Boone <jeremy.boone@nccgroup.trust>
Tom Rini [Thu, 1 Mar 2018 17:41:21 +0000 (12:41 -0500)]
Merge tag 'xilinx-kconfig-for-v2018.03' of git://www.denx.de/git/u-boot-microblaze
Xilinx Kconfig changes for v2018.03
- Moving some macros to Kconfig
# gpg: Signature made Thu 01 Mar 2018 10:45:58 AM EST using DSA key ID 294A0C21
# gpg: Good signature from "Michal Simek <monstr@monstr.eu>"
# gpg: aka "Michal Simek (Xilinx) <michals@xilinx.com>"
# gpg: aka "Michal Simek (Xilinx) <michal.simek@xilinx.com>"
Eugeniy Paltsev [Tue, 6 Feb 2018 14:12:09 +0000 (17:12 +0300)]
NET: designware: fix clock enable
After commit ba1f966725223 ("net: designware: add clock support")
we got NET broken on axs101 and axs103 platforms.
Some clock don't support gating so their clock drivers don't
implement .enable/.disable callbacks. In such case clk_enable
returns -ENOSYS.
Also some clock drivers implement .enable/.disable callbacks not for all
clock IDs and return -ENOSYS (or -ENOTSUPP) for others.
If we have such clock in 'clocks' list of designware ethernet controller
node we fail to probe designware ethernet.
Fix it.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Mario Six [Mon, 15 Jan 2018 10:08:25 +0000 (11:08 +0100)]
net: phy: marvell 88e151x: Fix handling of bare RGMII interface type
Commit 68e6ecadc551 ("net: phy: marvell 88e151x: Fix handling of RGMII
interface types") fixed the initialization of 88e151x phys, but made it
so that interfaces of type PHY_INTERFACE_MODE_RGMII had both RX and TX
delay bits cleared. The default (like in m88e1111s_config) is to have
both bits set.
Hence, this patch changes the behavior in the PHY_INTERFACE_MODE_RGMII
case so that both bits are set.
Signed-off-by: Mario Six <mario.six@gdsys.cc> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Mario Six [Mon, 15 Jan 2018 10:08:22 +0000 (11:08 +0100)]
net: tsec: Fix memory leak in error path
tsec_initialize allocates a private driver structure using malloc.
Should the memory allocation of this private structure fail, the
function execution is aborted with a return 0, but the previously
allocated device structure is never freed, hence leaked.
Free the device structure in the error case.
Signed-off-by: Mario Six <mario.six@gdsys.cc> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
mmc: omap_hsmmc: use a default 52MHz max clock rate if none is specified
mmc_of_parse() doesn't set a default value if none is available in DT.
In that case, use a default 52MHz clock rate.
Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Tested-by: Adam Ford <aford173@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
mmc: omap_hsmmc: make it possible to compile out ADMA support
Some platforms don't have ADMA controllers. For those platforms, compiling
it out reduces the size of the binary by about 600 bytes.
Leaving the support in doesn't break things as the driver checks at runtime
if the ADMA2 controller is present.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Tested-by: Adam Ford <aford173@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
mmc: omap_hsmmc: do not embed struct mmc in struct omap_hsmmc_plat
The area for struct mmc can be allocated dynamically. It greatly reduces
the size of struct omap_hsmmc_plat. This is useful in cases where the board
level code declares one or two struct omap_hsmmc_plat because it doesn't
use the Driver Model.
This saves around 740 bytes for the am335x_evm SPL.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Tested-by: Adam Ford <aford173@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Tom Rini [Sat, 24 Feb 2018 21:50:41 +0000 (16:50 -0500)]
bootcount: Migrate CONFIG_SYS_BOOTCOUNT_ADDR
Migrate the users of CONFIG_SYS_BOOTCOUNT_ADDR to Kconfig. We can
provide a default for BOOTCOUNT_AM33XX as that's a specific part of the
RTC in use. We can also provide a default for ARCH_LS1043A and
ARCH_LS1021A as they had been previously calculated and their symbols
are in Kconfig. In the case of other QE-enabled platforms, they are not
so we must update the relevant defconfig files. The previous default
only applied in some cases, even on a specific SoC family.
Reviewed-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Alex Kiernan <alex.kiernan@gmail.com> Signed-off-by: Tom Rini <trini@konsulko.com>
Fabio Estevam [Thu, 15 Feb 2018 14:41:40 +0000 (12:41 -0200)]
imx: spl: Partially revert "spl: eMMC/SD: Provide one __weak spl_boot_mode() function"
Commit d695d6627803 ("spl: eMMC/SD: Provide one __weak spl_boot_mode()
function") breaks the boot on several i.MX6 boards,
such as cuboxi and wandboard:
U-Boot SPL 2018.03-rc1-00212-g48914fc119 (Feb 10 2018 - 11:04:33 +1300)
Trying to boot from MMC1
Failed to mount ext2 filesystem...
spl_load_image_ext: ext4fs mount err - 0
Partially revert it so that we can boot U-Boot again on these
i.MX6 platforms.
Reported-by: Jonathan Gray <jsg@jsg.id.au> Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Tested-by: Breno Lima <breno.lima@nxp.com>
Philipp Tomsich [Fri, 23 Feb 2018 16:36:41 +0000 (17:36 +0100)]
rockchip: clk: rk3399: handle set_rate/get_rate for PLL_PPLL
The device-tree node for the PMU clk controller assigns to its parent
(i.e. PLL_PPLL) even though this clock currently is set up statically
by an init-function.
In order to avoid unexpected failures, a simple implementation of
set_rate (which accepts requests, but notifies the caller of the
preset frequency in its return value) and get_rate (which always
returns the preset frequency) are added.
Note that this is required for the RK808 PMIC to probe successfully on
the RK3399-Q7, following the support for the assigned-clocks property.
References: commit f4fcba5c5baa ("clk: implement clk_set_defaults()") Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Jagan Teki [Fri, 23 Feb 2018 07:43:11 +0000 (13:13 +0530)]
rockchip: rk3288: Fix wrong TPL_TEXT_BASE
TPL offset 0xff704004 is unaligned address which is adding nearest
8-bytes for next instruction, So 0xff704004 is adding 0x20 for
proper alignment which is causing the next instruction data
0xefffffff is moved.
Jagan Teki [Fri, 23 Feb 2018 07:43:10 +0000 (13:13 +0530)]
rockchip: rk3288: Add TPL_LDSCRIPT
Due to size limitations in SPL by adding falcon mode,
rk3288 support TPL. In order to not overlap SPL_TEXT_BASE
add TPL_TEXT_BASE with u-boot-tpl.lds that intern call
u-boot-spl.lds with proper TEXT_BASE values.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Philipp Tomsich [Fri, 16 Feb 2018 15:07:25 +0000 (16:07 +0100)]
rockchip: clk: rk3368: handle clk_enable requests for GMAC
Since commit ba1f96672522 ("net: designware: add clock support"), the
designware GMAC driver enables all referenced clocks. While this is a
no-op for the RK3368 during boot-up (reset behaviour has all the clock
gates open anyway), we still need to handle the clock-ids passed in
the enable op of the clock-driver and return a success.
This change extends the RK3368 clk driver to:
(a) provide a enable op
(b) signals success to the caller when the clocks for the GMAC are
enabled (no actual action is necessary as the gates are open
after reset)
References: commit ba1f96672522 ("net: designware: add clock support") Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Philipp Tomsich [Fri, 16 Feb 2018 15:07:24 +0000 (16:07 +0100)]
rockchip: clk: rk3399: handle clk_enable requests for GMAC
Since commit ba1f96672522 ("net: designware: add clock support"), the
designware GMAC driver enables all referenced clocks. While this is a
no-op for the RK3399 during boot-up (reset behaviour has all the clock
gates open anyway), we still need to handle the clock-ids passed in
the enable op of the clock-driver and return a success.
This change extends the enable-op of the rk3399 clk driver to signal
success to the caller when the clocks for the GMAC are enabled.
References: commit ba1f96672522 ("net: designware: add clock support") Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
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