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4 years agox86: pinctrl: Drop the acpi_path member
Simon Glass [Wed, 8 Jul 2020 03:32:23 +0000 (21:32 -0600)]
x86: pinctrl: Drop the acpi_path member

This is in the device tree now, so drop the unnecessary field here.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: pinctrl: Set up itss in the probe() method
Simon Glass [Wed, 8 Jul 2020 03:32:22 +0000 (21:32 -0600)]
x86: pinctrl: Set up itss in the probe() method

At present the itss is probed in the ofdata_to_platdata() method. This is
incorrect since itss is a child of p2sb which itself needs to probe the
pinctrl device. This means that p2sb is effectively not probed when the
itss is probed, so we get the wrong register address from p2sb.

Fix this by moving the itss probe to the correct place.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
4 years agox86: pinctrl: Add multi-ACPI control
Simon Glass [Wed, 8 Jul 2020 03:32:21 +0000 (21:32 -0600)]
x86: pinctrl: Add multi-ACPI control

Add a Kconfig to control whether pinctrl is represented as a single ACPI
device or as multiple devices. In the latter case (the default) we should
return the pin number relative to the pinctrl device.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
4 years agox86: pinctrl: Update comment for intel_pinctrl_get_pad()
Simon Glass [Wed, 8 Jul 2020 03:32:20 +0000 (21:32 -0600)]
x86: pinctrl: Update comment for intel_pinctrl_get_pad()

Add information about what is returned on error.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: pinctrl: Add a way to get the pinctrl reg address
Simon Glass [Wed, 8 Jul 2020 03:32:19 +0000 (21:32 -0600)]
x86: pinctrl: Add a way to get the pinctrl reg address

At present we can query the offset of a pinctrl register within the p2sb.
For ACPI we need to get the actual address of the register. Add a function
to handle this and rename the old one to more accurately reflect its
purpose.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
4 years agosound: Add an ACPI driver for Maxim MAX98357ac
Simon Glass [Wed, 8 Jul 2020 03:32:18 +0000 (21:32 -0600)]
sound: Add an ACPI driver for Maxim MAX98357ac

This chip is used on coral and we need to generate ACPI tables for sound
to make it work. Add a driver that does just this (i.e. at present does
not actually support playing sound).

Signed-off-by: Simon Glass <sjg@chromium.org>
[bmeng: Use the correct acpi_irq_polarity enum number]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
4 years agosound: Add an ACPI driver for Dialog Semicondutor da7219
Simon Glass [Wed, 8 Jul 2020 03:32:17 +0000 (21:32 -0600)]
sound: Add an ACPI driver for Dialog Semicondutor da7219

This chip is used on coral and we need to generate ACPI tables for sound
to make it work. Add a driver that does just this (i.e. at present does
not actually support playing sound).

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agox86: Add support for building up an NHLT structure
Simon Glass [Wed, 8 Jul 2020 03:32:16 +0000 (21:32 -0600)]
x86: Add support for building up an NHLT structure

The Intel Non-High-Definition-Audio Link Table (NHLT) table describes the
audio codecs and connections in a system. Various devices can contribute
information to produce the table.

Add functions to allow adding to the structure that is eventually written
to the ACPI tables. Also add the device-tree bindings.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agoacpi: Support writing named values
Simon Glass [Wed, 8 Jul 2020 03:32:15 +0000 (21:32 -0600)]
acpi: Support writing named values

Allow writing named integers and strings to the generated ACPI code.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
[bmeng: Fix the "new blank line at EOF" warning]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
4 years agoacpi: Support generation of a device
Simon Glass [Wed, 8 Jul 2020 03:32:14 +0000 (21:32 -0600)]
acpi: Support generation of a device

Allow writing an ACPI device to the generated ACPI code.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
[bmeng: Fix build failures on Sandbox]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: Add bindings for NHLT
Simon Glass [Wed, 8 Jul 2020 03:32:13 +0000 (21:32 -0600)]
x86: Add bindings for NHLT

Add devicetree bindings for the Intel Non-High-Definition-Audio Link Table
(NHLT).

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agoacpi: mmc: Generate ACPI info for the PCI SD Card
Simon Glass [Wed, 8 Jul 2020 03:32:12 +0000 (21:32 -0600)]
acpi: mmc: Generate ACPI info for the PCI SD Card

Write required information into the SSDT to describe the SD card
card-detect pin. Since the required GPIO properties are not present in
the device-tree binding, set them manually for now.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agoacpi: Support generation of a generic register
Simon Glass [Wed, 8 Jul 2020 03:32:11 +0000 (21:32 -0600)]
acpi: Support generation of a generic register

Allow writing out a generic register.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
[bmeng: Fix build failures on Sandbox]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
4 years agoacpi: Support generation of a scope
Simon Glass [Wed, 8 Jul 2020 03:32:10 +0000 (21:32 -0600)]
acpi: Support generation of a scope

Add a function to write a scope to the generated ACPI code.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: Fix build failures on Sandbox]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
4 years agoacpi: Export functions to write sized values
Simon Glass [Wed, 8 Jul 2020 03:32:09 +0000 (21:32 -0600)]
acpi: Export functions to write sized values

At present only acpigen_write_integer() is exported for use by other code.
But in some cases it is useful to call the specific function depending on
the size of the value.

Export these functions and add a test.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: Fix the "new blank line at EOF" warning]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
4 years agodm: acpi: Add support for the NHLT table
Simon Glass [Wed, 8 Jul 2020 03:32:08 +0000 (21:32 -0600)]
dm: acpi: Add support for the NHLT table

The Intel Non-High-Definition-Audio Link Table (NHLT) table describes the
audio codecs and connections in a system. Various devices can contribute
information to produce the table.

Add core support for this, based on a structure which is built up through
calls to the driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
4 years agodm: core: Add a way of overriding the ACPI device path
Simon Glass [Wed, 8 Jul 2020 03:32:07 +0000 (21:32 -0600)]
dm: core: Add a way of overriding the ACPI device path

Some devices such as GPIO need to override the normal path that would be
generated by driver model. Add a device-tree property for this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
4 years agodtoc: Support ACPI paths in of-platdata
Simon Glass [Wed, 8 Jul 2020 03:32:06 +0000 (21:32 -0600)]
dtoc: Support ACPI paths in of-platdata

The start of an ACPI path typically has backslashes in it. These are not
preserved during the translation from device tree to C code, since dtc
(correctly) uses the first backslash as an escape character, and dtoc
therefore leaves it out of the C string.

Fix this with special-case handling.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agoacpi: Allow creating the GNVS to fail
Simon Glass [Wed, 8 Jul 2020 03:32:05 +0000 (21:32 -0600)]
acpi: Allow creating the GNVS to fail

In some cases an internal error may prevent this from working. Update the
function return value and report the error. At present the API for writing
tables does not easily support reporting errors, but once it is fully
updated to use a context pointer, this will be easier.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
4 years agobinman: Add way to locate an entry in memory
Simon Glass [Wed, 8 Jul 2020 03:32:04 +0000 (21:32 -0600)]
binman: Add way to locate an entry in memory

Add support for accessing an entry's contents in memory-mapped SPI flash.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agobinman: Refactor binman_entry_find() to allow other nodes
Simon Glass [Wed, 8 Jul 2020 03:32:03 +0000 (21:32 -0600)]
binman: Refactor binman_entry_find() to allow other nodes

At present we can only read from a top-level binman node entry. Refactor
this function to produce a second local function which supports reading
from any node.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agobinman: Allow setting the ROM offset
Simon Glass [Wed, 8 Jul 2020 03:32:02 +0000 (21:32 -0600)]
binman: Allow setting the ROM offset

On x86 the SPI ROM can be memory-mapped, at least most of it. Add a way
to tell binman the offset from a ROM address to a RAM address.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agoacpi: Add an acpi command to list/dump generated ACPI items
Simon Glass [Tue, 7 Jul 2020 19:12:12 +0000 (13:12 -0600)]
acpi: Add an acpi command to list/dump generated ACPI items

Add a command that shows the individual blocks of data generated by each
device, effectively splitting the full table into its component parts.
This can be helpful for debugging.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agodm: acpi: Enhance acpi_get_name()
Simon Glass [Tue, 7 Jul 2020 19:12:11 +0000 (13:12 -0600)]
dm: acpi: Enhance acpi_get_name()

For many device types it is possible to figure out the name just by
looking at its uclass or parent. Add a function to handle this, since it
allows us to cover the vast majority of cases automatically.

However it is sometimes impossible to figure out an ACPI name for a device
just by looking at its uclass. For example a touch device may have a
vendor-specific name. Add a new "acpi,name" property to allow a custom
name to be created.

With this new feature we can drop the get_name() methods in the sandbox
I2C and SPI drivers. They were only added for testing purposes. Update the
tests to use the new values.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agopci: Avoid a crash in device_is_on_pci_bus()
Simon Glass [Tue, 7 Jul 2020 19:12:10 +0000 (13:12 -0600)]
pci: Avoid a crash in device_is_on_pci_bus()

This function cannot currently be called on the root node. Add a check
for this as well as a test.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: Allow devices to write to DSDT
Simon Glass [Tue, 7 Jul 2020 19:12:09 +0000 (13:12 -0600)]
x86: Allow devices to write to DSDT

Call the new core function to inject ASL programmatically into the DSDT.
This is made up of fragments generated by devices that have the
inject_dsdt() method. The normal, compiled ASL file is added after this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agoacpi: Add support for DSDT generation
Simon Glass [Tue, 7 Jul 2020 19:12:08 +0000 (13:12 -0600)]
acpi: Add support for DSDT generation

Some devices need to inject extra code into the Differentiated System
Descriptor Table (DSDT). Add a method to handle this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: correct one typo in inject_dsdt() comments]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: Allow devices to write an SSDT
Simon Glass [Tue, 7 Jul 2020 19:12:07 +0000 (13:12 -0600)]
x86: Allow devices to write an SSDT

Call the new core function to write the SSDT. This is made up of fragments
generated by devices that have the fill_ssdt() method.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agoacpi: Support ordering SSDT data by device
Simon Glass [Tue, 7 Jul 2020 19:12:06 +0000 (13:12 -0600)]
acpi: Support ordering SSDT data by device

Add a /chosen property to control the order in which the data appears
in the SSDT. This allows matching up U-Boot's output from a dump of the
known-good data obtained from within Linux.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agoacpi: Record the items added to SSDT
Simon Glass [Tue, 7 Jul 2020 19:12:05 +0000 (13:12 -0600)]
acpi: Record the items added to SSDT

It is useful to be able to control the order of data written to the SSDT
so that we can compare the output against known-good kernel dumps.

Add code to record each item that is added along with the device that
added it. That allows us to reorder things later if needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: acpi: Move MADT down a bit
Simon Glass [Tue, 7 Jul 2020 19:12:04 +0000 (13:12 -0600)]
x86: acpi: Move MADT down a bit

Put this table before MCFG so that it matches the order that coreboot uses
when passing tables to Linux. This is a cosmetic change since the order of
the tables does not otherwise matter.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agoacpi: Add support for SSDT generation
Simon Glass [Tue, 7 Jul 2020 19:12:03 +0000 (13:12 -0600)]
acpi: Add support for SSDT generation

Some devices need to generate code for the Secondary System Descriptor
Table (SSDT). Add a method to handle this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agoacpi: Add support for a generic power sequence
Simon Glass [Tue, 7 Jul 2020 19:12:02 +0000 (13:12 -0600)]
acpi: Add support for a generic power sequence

Add a way for devices to enable and disable themselves using ACPI code
that updates GPIOs. This takes several timing parameters and supports
enable, reset and stop.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agoacpi: Add support for writing a GPIO power sequence
Simon Glass [Tue, 7 Jul 2020 19:12:01 +0000 (13:12 -0600)]
acpi: Add support for writing a GPIO power sequence

Power to some devices is controlled by GPIOs. Add a way to generate ACPI
code to enable and disable a GPIO so that this can be handled within an
ACPI method.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agoacpi: Add support for writing a Power Resource
Simon Glass [Tue, 7 Jul 2020 19:12:00 +0000 (13:12 -0600)]
acpi: Add support for writing a Power Resource

These are used in ACPI to disable power to various pats of the system when
in sleep. Add a way to create a power resource, with the caller finishing
off the details.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agoacpi: Add support for various misc ACPI opcodes
Simon Glass [Tue, 7 Jul 2020 19:11:59 +0000 (13:11 -0600)]
acpi: Add support for various misc ACPI opcodes

Add more functions to handle some miscellaneous ACPI opcodes.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agoacpi: Support copying properties from device tree to ACPI
Simon Glass [Tue, 7 Jul 2020 19:11:58 +0000 (13:11 -0600)]
acpi: Support copying properties from device tree to ACPI

Some drivers in Linux support both device tree and ACPI. U-Boot itself
uses Linux device-tree bindings for its own configuration but does not use
ACPI.

It is convenient to copy these values over to the ACPI DP table for
passing to linux. Add some convenience functions to help with this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agoacpi: Support writing a GPIO
Simon Glass [Tue, 7 Jul 2020 19:11:57 +0000 (13:11 -0600)]
acpi: Support writing a GPIO

Allowing writing out a reference to a GPIO within the ACPI output. This
can be used by ACPI code to access a GPIO at runtime.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agoacpi: Support writing Device Properties objects via _DSD
Simon Glass [Tue, 7 Jul 2020 19:11:56 +0000 (13:11 -0600)]
acpi: Support writing Device Properties objects via _DSD

More complex device properties can be provided to drivers via a
device-specific data (_DSD) object.

To create this we need to build it up in a separate data structure and
then generate the ACPI code, due to its recursive nature.

Add an implementation of this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agoacpi: Support writing a UUID
Simon Glass [Tue, 7 Jul 2020 19:11:55 +0000 (13:11 -0600)]
acpi: Support writing a UUID

ACPI supports writing a UUID in a special format. Add a function to handle
this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agoacpi: Support writing a name
Simon Glass [Tue, 7 Jul 2020 19:11:54 +0000 (13:11 -0600)]
acpi: Support writing a name

ACPI supports storing names which are made up of multiple path components.
Several special cases are supported. Add a function to emit a name.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agoacpi: Support writing a string
Simon Glass [Tue, 7 Jul 2020 19:11:53 +0000 (13:11 -0600)]
acpi: Support writing a string

ACPI supports storing a simple null-terminated string. Add support for
this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agoacpi: Support writing an integer
Simon Glass [Tue, 7 Jul 2020 19:11:52 +0000 (13:11 -0600)]
acpi: Support writing an integer

ACPI supports storing integers in various ways. Add a function to handle
this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agoacpigen: Support writing a package
Simon Glass [Tue, 7 Jul 2020 19:11:51 +0000 (13:11 -0600)]
acpigen: Support writing a package

A package collects together several elements. Add an easy way of writing
a package header and updating its length later.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agoacpigen: Support writing a length
Simon Glass [Tue, 7 Jul 2020 19:11:50 +0000 (13:11 -0600)]
acpigen: Support writing a length

It is convenient to write a length value for preceding a block of data.
Of course the length is not known or is hard to calculate a priori. So add
a way to mark the start on a stack, so the length can be updated when
known.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agoacpi: Support generation of SPI descriptor
Simon Glass [Tue, 7 Jul 2020 19:11:49 +0000 (13:11 -0600)]
acpi: Support generation of SPI descriptor

Add a function to write a SPI descriptor to the generated ACPI code.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agoacpi: Support generation of I2C descriptor
Simon Glass [Tue, 7 Jul 2020 19:11:48 +0000 (13:11 -0600)]
acpi: Support generation of I2C descriptor

Add a function to write a GPIO descriptor to the generated ACPI code.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agoacpi: Support generation of a GPIO/irq for a device
Simon Glass [Tue, 7 Jul 2020 19:11:47 +0000 (13:11 -0600)]
acpi: Support generation of a GPIO/irq for a device

Some devices use interrupts but some use GPIOs. Since these are fully
specified in the device tree we can automatically produce the correct ACPI
descriptor for a device.

Add a function to handle this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agoacpi: Support generation of GPIO descriptor
Simon Glass [Tue, 7 Jul 2020 19:11:46 +0000 (13:11 -0600)]
acpi: Support generation of GPIO descriptor

Add a function to write a GPIO descriptor to the generated ACPI code.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: Drop comment about the type always being ACPI_GPIO_TYPE_IO]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
4 years agoacpi: Support string output
Simon Glass [Tue, 7 Jul 2020 19:11:45 +0000 (13:11 -0600)]
acpi: Support string output

Add support for output of strings and streams of bytes.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agogpio: Add a method to convert a GPIO to ACPI
Simon Glass [Tue, 7 Jul 2020 19:11:44 +0000 (13:11 -0600)]
gpio: Add a method to convert a GPIO to ACPI

When generating ACPI tables we need to convert GPIOs in U-Boot to the ACPI
structures required by ACPI. This is a SoC-specific conversion and cannot
be handled by generic code, so add a new GPIO method to do the conversion.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agoacpi: Support generation of interrupt descriptor
Simon Glass [Tue, 7 Jul 2020 19:11:43 +0000 (13:11 -0600)]
acpi: Support generation of interrupt descriptor

Add a function to write an interrupt descriptor to the generated ACPI
code.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agoacpi: Support generation of ACPI code
Simon Glass [Tue, 7 Jul 2020 19:11:42 +0000 (13:11 -0600)]
acpi: Support generation of ACPI code

Add a new file to handle generating ACPI code programatically. This is
used when information must be dynamically added to the tables, e.g. the
SSDT.

Initial support is just for writing simple values. Also add a 'base' value
so that the table can be freed. This likely doesn't happen in normal code,
but is nice to do in tests.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agoirq: Add a method to convert an interrupt to ACPI
Simon Glass [Tue, 7 Jul 2020 19:11:41 +0000 (13:11 -0600)]
irq: Add a method to convert an interrupt to ACPI

When generating ACPI tables we need to convert IRQs in U-Boot to the ACPI
structures required by ACPI. This is a SoC-specific conversion and cannot
be handled by generic code, so add a new IRQ method to do the conversion.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agoacpi: Add a way to check device status
Simon Glass [Tue, 7 Jul 2020 19:11:40 +0000 (13:11 -0600)]
acpi: Add a way to check device status

At present U-Boot does not support the different ACPI status values, but
it is best to put this logic in a central place. Add a function to get the
device status.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agoacpi: Add a function to get a device path and scope
Simon Glass [Tue, 7 Jul 2020 19:11:39 +0000 (13:11 -0600)]
acpi: Add a function to get a device path and scope

Add a function to build up the ACPI path for a device and another for its
scope.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agodm: core: Add an ACPI name for the root node
Simon Glass [Tue, 7 Jul 2020 19:11:38 +0000 (13:11 -0600)]
dm: core: Add an ACPI name for the root node

This always has a fixed ACPI name so add it as a driver function.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: fsp: Support a warning message when DRAM init is slow
Simon Glass [Fri, 10 Jul 2020 00:43:17 +0000 (18:43 -0600)]
x86: fsp: Support a warning message when DRAM init is slow

With DDR4, Intel SOCs take quite a long time to init their memory. During
this time, if the user is watching, it looks like SPL has hung. Add a
message in this case.

This works by adding a return code to fspm_update_config() that indicates
whether MRC data was found and a new property to the device tree.

Also add one more debug message while starting.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
4 years agox86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME
Simon Glass [Fri, 10 Jul 2020 00:43:16 +0000 (18:43 -0600)]
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME

At present this enables a few arch-specific members of the global_data
struct which are otherwise not part of the struct. As a result we have to
use #ifdef in various places.

The cost of always having these in the struct is small. Adjust things so
that we can use compile-time code instead of #ifdefs.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agocoral: Enable the copy framebuffer
Simon Glass [Fri, 10 Jul 2020 00:43:15 +0000 (18:43 -0600)]
coral: Enable the copy framebuffer

Enable this feature on chromebook_coral to speed up the display.

With this change, the time taken to print the environment to the display
without CONFIG_CONSOLE_SCROLL_LINES is reduced from 1830ms to 62ms.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agotimer: Allow delays with a 32-bit microsecond timer
Simon Glass [Fri, 10 Jul 2020 00:43:14 +0000 (18:43 -0600)]
timer: Allow delays with a 32-bit microsecond timer

The current get_timer_us() uses 64-bit arithmetic on 32-bit machines.
When implementing microsecond-level timeouts, 32-bits is plenty. Add a
new function that uses an unsigned long. On 64-bit machines this is
still 64-bit, but this doesn't introduce a penalty. On 32-bit machines
it is more efficient.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: p2sb: make P2SB driver depend on P2SB uclass
Wolfgang Wallner [Wed, 1 Jul 2020 11:37:24 +0000 (13:37 +0200)]
x86: p2sb: make P2SB driver depend on P2SB uclass

Currently it is possible to select the P2SB driver without selecting the
P2SB uclass, which can't work. Fix this by adding a "depends on" in
Kconfig.

Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agodrivers: p2sb: replace Primary-to-Sideband Bus with Primary to Sideband Bridge
Wolfgang Wallner [Wed, 1 Jul 2020 11:37:23 +0000 (13:37 +0200)]
drivers: p2sb: replace Primary-to-Sideband Bus with Primary to Sideband Bridge

In Intel's documentation the term P2SB stands for "Primary to Sideband
Bridge".

Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agoMerge tag 'efi-2020-10-rc1-4' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi
Tom Rini [Thu, 16 Jul 2020 20:35:15 +0000 (16:35 -0400)]
Merge tag 'efi-2020-10-rc1-4' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi

Pull request for UEFI sub-system for efi-2020-10-rc1 (4)

Improvements for the UEFI subsystem include:

* support for read-only TEE-backed variables
* allow to compile PK, KEK, db, dbx fixed values into U-Boot
* bug fixes

Python testing related changes comprise:

* enable 'bootefi hello' for better test coverage
* remove SKIP messages in UEFI Python tests

The fitupd command is dropped.
Build errors for the lsblk command are fixed.

4 years agoefi_loader: simplify 'printenv -e'
Heinrich Schuchardt [Wed, 15 Jul 2020 16:00:56 +0000 (18:00 +0200)]
efi_loader: simplify 'printenv -e'

Currently default output of 'printenv -e' is restricted to variables with
GUID EFI_GLOBAL_VARIABLE. This excludes db and dbx. As the number of
variables is small there is no need for this restriction.

If no GUID is provided, print all matching variables irrespective of GUID.

Always show the numeric value of the GUID.

If the GUID provided to 'setenv -e' is invalid, return CMD_RET_USAGE.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
4 years agoefi_loader: describe EFI_VAR_FILE_MAGIC
Heinrich Schuchardt [Thu, 16 Jul 2020 05:18:40 +0000 (07:18 +0200)]
efi_loader: describe EFI_VAR_FILE_MAGIC

Add documentation for EFI_VAR_FILE_MAGIC used in the file format for UEFI
variables.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
4 years agoefi_loader: pre-seed UEFI variables
Heinrich Schuchardt [Tue, 14 Jul 2020 19:25:28 +0000 (21:25 +0200)]
efi_loader: pre-seed UEFI variables

Include a file with the initial values for non-volatile UEFI variables
into the U-Boot binary. If this variable is set, changes to variable PK
will not be allowed.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
4 years agoefi_loader: identify PK, KEK, db, dbx correctly
Heinrich Schuchardt [Wed, 15 Jul 2020 10:40:35 +0000 (12:40 +0200)]
efi_loader: identify PK, KEK, db, dbx correctly

To determine if a varible is on the of the authentication variables
PK, KEK, db, dbx we have to check both the name and the GUID.

Provide a function converting the variable-name/guid pair to an enum and
use it consistently.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
4 years agoefi_loader: configuration of variables store
Heinrich Schuchardt [Tue, 14 Jul 2020 17:18:33 +0000 (19:18 +0200)]
efi_loader: configuration of variables store

The file based and the OP-TEE based UEFI variable store are mutually
exclusive. Define them as choice options in Kconfig.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
4 years agodoc: provide links to Microsoft UEFI certificates
Heinrich Schuchardt [Tue, 14 Jul 2020 10:52:51 +0000 (12:52 +0200)]
doc: provide links to Microsoft UEFI certificates

Some distributions provide UEFI binaries like Shim that have been signed
using a Microsoft certificate. Provide the download paths for the public
keys.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
4 years agoefi_loader: update secure state
Heinrich Schuchardt [Tue, 14 Jul 2020 06:14:08 +0000 (08:14 +0200)]
efi_loader: update secure state

Update the UEFI secure state when variable 'PK' is updated in the TEE
variables implementation.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
4 years agoefi_loader: restructure code for TEE variables
Heinrich Schuchardt [Tue, 14 Jul 2020 06:04:49 +0000 (08:04 +0200)]
efi_loader: restructure code for TEE variables

When using secure boot functions needed both for file and TEE based UEFI
variables have to be moved to the common code module efi_var_common.c.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
4 years agoefi_loader: display RO attribute with TEE-backed variables
Ilias Apalodimas [Thu, 9 Jul 2020 20:00:40 +0000 (23:00 +0300)]
efi_loader: display RO attribute with TEE-backed variables

A previous commit adds support for displaying variables RO flag.
Let's add it on the TEE backed variable storage as well.

Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
4 years agoefi_loader: skip warnings for network configuration
Heinrich Schuchardt [Mon, 13 Jul 2020 10:22:23 +0000 (12:22 +0200)]
efi_loader: skip warnings for network configuration

Skip messages should only be written if the setup is not suitable for
testing.

If DHCP is enabled, we should not write a skip message if no static network
configuration is supplied.

Likewise if a static network configuration is supplied, we should not write
a skip message if DHCP is not enabled.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
4 years agoefi_selftest: enable 'bootefi hello'
Heinrich Schuchardt [Mon, 13 Jul 2020 05:33:40 +0000 (07:33 +0200)]
efi_selftest: enable 'bootefi hello'

In our Python tests we want to run 'bootefi hello'. Enable it by default
when compiling with CMD_BOOTEFI_SELFTEST.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
4 years agocmd: fix lsblk command
Heinrich Schuchardt [Mon, 13 Jul 2020 20:22:31 +0000 (22:22 +0200)]
cmd: fix lsblk command

Add missing includes.
Add CMD_LSBLK to sandbox_defconfig.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
4 years agocmd: drop fitupd command
Heinrich Schuchardt [Wed, 17 Jun 2020 08:53:29 +0000 (10:53 +0200)]
cmd: drop fitupd command

The `fitupd' command is not used by any board. The `dfu tftp' command
provides the same capabilities.

So let's drop the `fitupd' command.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
4 years agoMerge tag 'mmc-7-24-2020' of https://gitlab.denx.de/u-boot/custodians/u-boot-mmc
Tom Rini [Thu, 16 Jul 2020 02:41:43 +0000 (22:41 -0400)]
Merge tag 'mmc-7-24-2020' of https://gitlab.denx.de/u-boot/custodians/u-boot-mmc

- Correct mmc_spi check condition
- Generate R1/R2/R1b response
- Read SSR for SD SPI

4 years agoMerge branch '2020-07-15-ci-updates'
Tom Rini [Wed, 15 Jul 2020 19:48:05 +0000 (15:48 -0400)]
Merge branch '2020-07-15-ci-updates'

- Make sure GRUB is copied to the right place for CI on GitLab/Azure
- Note in our GitHub PR template that you can use this to trigger Azure CI

4 years agoAzure: copy GRUB to correct build path
Heinrich Schuchardt [Mon, 13 Jul 2020 22:40:19 +0000 (00:40 +0200)]
Azure: copy GRUB to correct build path

The GRUB binaries are expected in $UBOOT_TRAVIS_BUILD_DIR.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
4 years ago.gitlab-ci.yml: copy GRUB to correct build path
Heinrich Schuchardt [Mon, 13 Jul 2020 22:23:58 +0000 (00:23 +0200)]
.gitlab-ci.yml: copy GRUB to correct build path

The GRUB binaries are expected in $UBOOT_TRAVIS_BUILD_DIR.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
4 years agogithub: azure: Update our GitHub template to note for CI
Tom Rini [Fri, 10 Jul 2020 20:00:08 +0000 (16:00 -0400)]
github: azure: Update our GitHub template to note for CI

While the general policy of not taking changes to the project via pull
requests directly on GitHub has not changed, it can be useful to submit
a PR there in order to trigger a CI run on Azure.  These are run
automatically and the results are populated back to GitHub.  Add a note
to the template to reflect this.

Signed-off-by: Tom Rini <trini@konsulko.com>
4 years agoMerge tag 'ti-v2020.10-rc1' of https://gitlab.denx.de/u-boot/custodians/u-boot-ti
Tom Rini [Tue, 14 Jul 2020 13:09:27 +0000 (09:09 -0400)]
Merge tag 'ti-v2020.10-rc1' of https://gitlab.denx.de/u-boot/custodians/u-boot-ti

- Sync DMA and CPSW DT bindings for K3 devices
- Other minor fixes for mmc and other TI devices

4 years agommc_spi: generate R1b response for erase and stop transmission command
Pragnesh Patel [Mon, 29 Jun 2020 09:47:29 +0000 (15:17 +0530)]
mmc_spi: generate R1b response for erase and stop transmission command

As per the SD physical layer specification version 7.10, erase
command (CMD38) and stop transmission command (CMD12) will generate
R1b response.

R1b = R1 + busy signal

A non-zero value after the R1 response indicates card is ready for
next command.

Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Tested-by: Bin Meng <bin.meng@windriver.com>
4 years agommc: mmc_spi: Generate R1 response for erase block start and end address
Pragnesh Patel [Mon, 29 Jun 2020 09:47:28 +0000 (15:17 +0530)]
mmc: mmc_spi: Generate R1 response for erase block start and end address

Erase block start address (CMD32) and erase block end address (CMD33)
command will generate R1 response for mmc SPI mode.

R1 response is 1 byte long for mmc SPI, so assign 1 byte as a response
for this commands.

Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Tested-by: Bin Meng <bin.meng@windriver.com>
4 years agommc: mmc_spi: Read R2 response for send status command - CMD13
Pragnesh Patel [Mon, 29 Jun 2020 09:47:27 +0000 (15:17 +0530)]
mmc: mmc_spi: Read R2 response for send status command - CMD13

Send status command (CMD13) will send R1 response under SD mode
but R2 response under SPI mode.

R2 response is 2 bytes long, so read 2 bytes for mmc SPI mode

Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Tested-by: Bin Meng <bin.meng@windriver.com>
4 years agommc: read ssr for SD spi
Pragnesh Patel [Mon, 29 Jun 2020 09:47:26 +0000 (15:17 +0530)]
mmc: read ssr for SD spi

The content of ssr is useful only for erase operations.
This saves erase time.

Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Tested-by: Bin Meng <bin.meng@windriver.com>
4 years agommc: mmc_spi: generate R1 response for different mmc SPI commands
Pragnesh Patel [Mon, 29 Jun 2020 09:47:25 +0000 (15:17 +0530)]
mmc: mmc_spi: generate R1 response for different mmc SPI commands

R1 response is 1 byte long for mmc SPI commands as per the updated
physical layer specification version 7.10.

So correct the resp and resp_size for existing commands

Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Tested-by: Bin Meng <bin.meng@windriver.com>
4 years agommc: mmc_spi: correct the while condition
Pragnesh Patel [Mon, 29 Jun 2020 09:47:24 +0000 (15:17 +0530)]
mmc: mmc_spi: correct the while condition

When variable i will become 0, while(i--) loop breaks but variable i will
again decrement to -1 because of i-- and that's why below condition
"if (!i && (r != resp_match_value)" will never execute, So doing "i--"
inside of while() loop solves this problem.

Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Tested-by: Bin Meng <bin.meng@windriver.com>
4 years agoMerge tag 'efi-2020-10-rc1-3' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi
Tom Rini [Mon, 13 Jul 2020 15:29:51 +0000 (11:29 -0400)]
Merge tag 'efi-2020-10-rc1-3' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi

Pull request for UEFI sub-system for efi-2020-10-rc1 (3)

Up to now UEFI variables where stored in U-Boot environment variables.
Saving UEFI variables was not possible without saving the U-Boot
environment variables. With this patch series file ubootefi.var in the
EFI system partition is used for saving UEFI variables. Furthermore the
UEFI variables are exposed for reading at runtime.

Code corrections for UEFI secure boot are provided.

A buffer overrun in the RSA library is fixed.

4 years agoarm: k3: use correct weak function name spl_board_prepare_for_linux
Patrick Delaunay [Tue, 7 Jul 2020 12:25:15 +0000 (14:25 +0200)]
arm: k3: use correct weak function name spl_board_prepare_for_linux

Replace the function spl_board_prepare_for_boot_linux by the correct
name of the weak function spl_board_prepare_for_linux defined in spl.h.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
4 years agommc: omap_hsmmc: Set 3.3V for IO voltage on all places
Pali Rohár [Fri, 3 Jul 2020 20:58:23 +0000 (22:58 +0200)]
mmc: omap_hsmmc: Set 3.3V for IO voltage on all places

In commit commit d2c05f50e12f ("mmc: omap_hsmmc: Set 3.3V for IO voltage")
was changed 3.0V IO voltage to 3.3V but it was not done on all places in
omap_hsmmc driver. That commit broke eMMC support on Nokia N900.

This patch fixes that problematic commit and changes 3.0V to 3.3V on all
remaining places in omap_hsmmc driver.

Fixes: d2c05f50e12f ("mmc: omap_hsmmc: Set 3.3V for IO voltage")
Signed-off-by: Pali Rohár <pali@kernel.org>
Acked-by: Pavel Machek <pavel@ucw.cz>
Reviewed-by: Faiz Abbas <faiz_abbas@ti.com>
4 years agoarm: k3: Consolidate and silence k3_fit_atf.sh call
Jan Kiszka [Wed, 1 Jul 2020 18:09:40 +0000 (20:09 +0200)]
arm: k3: Consolidate and silence k3_fit_atf.sh call

Buiding u-boot-spl-k3[_HS].its is currently unconditionally verbose
about what it does. Change that by wrapping the call to k3_fit_atf.sh
into a cmd, also using that chance to reduce duplicate lines of makefile
code - only IS_HS=1 is different when CONFIG_TI_SECURE_DEVICE is on.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Acked-by: Lokesh Vutla <lokeshvutla@ti.com>
4 years agoomap3_beagle: Finish current outstanding DM migrations
Tom Rini [Tue, 30 Jun 2020 19:02:27 +0000 (15:02 -0400)]
omap3_beagle: Finish current outstanding DM migrations

At this point in time we can now remove our legacy code and switch to
enabling DM for USB and Ethernet.

Cc: Derald D. Woods <woods.technical@gmail.com>
Cc: Adam Ford <aford173@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tested-by: Derald D. Woods <woods.technical@gmail.com>
4 years agoARM: da850-evm: Unify config options with Kconfig
Adam Ford [Mon, 29 Jun 2020 23:49:41 +0000 (18:49 -0500)]
ARM: da850-evm: Unify config options with Kconfig

There are two options that are currently whitelisted, but they
are redundant, because there are not necessary since Kconfig options
exist to basically state the same thing.

CONFIG_DIRECT_NOR_BOOT and CONFIG_USE_NOR are both set together and
only used by the da850 when booting from NOR, however the only time
CONFIG_MTD_NOR_FLASH is configured is when booting from NOR. Since
NOR doesn't need SPL, the options for SPL can be moved to a check for
building SPL instead of checking for NOR.

This patch removes the checks for these two config options and unifies
the checks around the Kconfig option of CONFIG_MTD_NOR_FLASH.

Since this board is the only board that uses these two config options,
they can be removed from the whitelist table.

Signed-off-by: Adam Ford <aford173@gmail.com>
4 years agoREADME: davinci: Clarify when SPL is used and the target devices.
Adam Ford [Mon, 29 Jun 2020 23:32:02 +0000 (18:32 -0500)]
README: davinci: Clarify when SPL is used and the target devices.

The documentation states that SPL is enabled in all config options
for the da850.  This incorrect, because devices booting from NOR
do not need the SPL to do the low level initializion because when
booting from NOR, the board is able to execute in place (XIP)

This also clarifies that SPL isn't only used for booting from SPI,
because it is also used for booting from MMC and NAND for those
devices supporting those boot options.

Signed-off-by: Adam Ford <aford173@gmail.com>
4 years agoarm: dts: k3-am65: Sync CPSW DT node from kernel
Vignesh Raghavendra [Mon, 6 Jul 2020 08:06:56 +0000 (13:36 +0530)]
arm: dts: k3-am65: Sync CPSW DT node from kernel

Sync CPSW DT node from kernel and move it out of -u-boot.dtsi file.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
4 years agoarm: dts: k3-j721e: Sync CPSW DT node from kernel
Vignesh Raghavendra [Mon, 6 Jul 2020 08:06:55 +0000 (13:36 +0530)]
arm: dts: k3-j721e: Sync CPSW DT node from kernel

Sync CPSW DT node from Kernel and move it out of -u-boot.dtsi file.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
4 years agonet: ti: am65-cpsw-nuss: Update driver to use kernel DT
Vignesh Raghavendra [Mon, 6 Jul 2020 08:06:54 +0000 (13:36 +0530)]
net: ti: am65-cpsw-nuss: Update driver to use kernel DT

Kernel DT has CPSW ports under ethernet-ports subnode. Update the driver
to look for the same.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
4 years agonet: ti: am65-cpsw-nuss: Set ALE default thread enable
Vignesh Raghavendra [Mon, 6 Jul 2020 08:06:53 +0000 (13:36 +0530)]
net: ti: am65-cpsw-nuss: Set ALE default thread enable

Force default thread to be used for RX as ALE is anyways set to Bypass
mode.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>