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4 years agoglobal_data: Add a generic global_data flag for SMP state
Simon Glass [Fri, 17 Jul 2020 14:48:17 +0000 (08:48 -0600)]
global_data: Add a generic global_data flag for SMP state

Allow keeping track of whether all CPUs have been enabled yet. This allows
us to know whether other CPUs need to be considered when updating
CPU-specific settings such as MTRRs on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: mp: Support APs waiting for instructions
Simon Glass [Fri, 17 Jul 2020 14:48:16 +0000 (08:48 -0600)]
x86: mp: Support APs waiting for instructions

At present the APs (non-boot CPUs) are inited once and then parked ready
for the OS to use them. However in some cases we want to send new requests
through, such as to change MTRRs and keep them consistent across CPUs.

Change the last state of the flight plan to go into a wait loop, accepting
instructions from the main CPU.

Drop cpu_map since it is not used.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: cpu: Remove unnecessary #ifdefs
Simon Glass [Fri, 17 Jul 2020 14:48:15 +0000 (08:48 -0600)]
x86: cpu: Remove unnecessary #ifdefs

Drop some #ifdefs that are not needed or can be converted to compile-time
checks.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: mp_init: Adjust bsp_init() to return more information
Simon Glass [Fri, 17 Jul 2020 14:48:14 +0000 (08:48 -0600)]
x86: mp_init: Adjust bsp_init() to return more information

This function is misnamed since it does not actually init the BSP. Also
it is convenient to adjust it to return a little more information.

Rename and update the function, to allow it to return the BSP CPU device
and number, as well as the total number of CPUs.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: mp_init: Set up the CPU numbers at the start
Simon Glass [Fri, 17 Jul 2020 14:48:13 +0000 (08:48 -0600)]
x86: mp_init: Set up the CPU numbers at the start

At present each CPU is given a number when it starts itself up. While this
saves a tiny amount of time by doing the device-tree read in parallel, it
is confusing that the numbering happens on the fly.

Move this code into mp_init() and do it at the start.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: mtrr: Fix 'ensable' typo
Simon Glass [Fri, 17 Jul 2020 14:48:12 +0000 (08:48 -0600)]
x86: mtrr: Fix 'ensable' typo

Fix a typo in the command help.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: mp_init: Drop the num_cpus static variable
Simon Glass [Fri, 17 Jul 2020 14:48:11 +0000 (08:48 -0600)]
x86: mp_init: Drop the num_cpus static variable

This does not need to be global across all functions in this file. Pass a
parameter instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: mp_init: Switch parameter names in start_aps()
Simon Glass [Fri, 17 Jul 2020 14:48:10 +0000 (08:48 -0600)]
x86: mp_init: Switch parameter names in start_aps()

These parameters are named differently from elsewhere in this file. Switch
them to avoid confusion.

Also add comments to this function.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
4 years agox86: mp_init: Avoid declarations in header files
Simon Glass [Fri, 17 Jul 2020 14:48:09 +0000 (08:48 -0600)]
x86: mp_init: Avoid declarations in header files

The functions used by the flight plan are declared in the header file but
are not used in any other file.

Move the flight plan steps down to just above where it is used so that we
can make these function static.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: Move MP code into mp_init
Simon Glass [Fri, 17 Jul 2020 14:48:08 +0000 (08:48 -0600)]
x86: Move MP code into mp_init

At present the 'flight plan' for CPUs is passed into mp_init. But it is
always the same. Move it into the mp_init file so everything is in one
place. Also drop the SMI function since it does nothing. If we implement
SMIs, more refactoring will be needed anyway.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: mp_init: Switch to livetree
Simon Glass [Fri, 17 Jul 2020 14:48:07 +0000 (08:48 -0600)]
x86: mp_init: Switch to livetree

Update this code to use livetree calls instead of flat-tree.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agodm: core: Don't show an ACPI warning if there is no ordering
Simon Glass [Fri, 17 Jul 2020 14:49:25 +0000 (08:49 -0600)]
dm: core: Don't show an ACPI warning if there is no ordering

Some boards don't care about the ordering of ACPI code fragments. Change
the warning to a debug message.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
4 years agoMerge tag 'mips-pull-2020-07-18' of https://gitlab.denx.de/u-boot/custodians/u-boot...
Tom Rini [Sat, 18 Jul 2020 15:34:49 +0000 (11:34 -0400)]
Merge tag 'mips-pull-2020-07-18' of https://gitlab.denx.de/u-boot/custodians/u-boot-mips

- MIPS: refactor cache init and setup in start.S
- MIPS: sync asm header files with Linux 5.7
- MIPS: add initial support for Marvell Octeon MIPS64

4 years agomips: octeon: Add minimal Octeon 3 EBB7304 EVK support
Stefan Roese [Tue, 30 Jun 2020 10:08:58 +0000 (12:08 +0200)]
mips: octeon: Add minimal Octeon 3 EBB7304 EVK support

This patch adds very basic minimal support for the Marvell Octeon 3
CN73xx based EBB7304 EVK. Please note that the basic Octeon port does
not support DDR3/4 initialization yet. To still use U-Boot on with this
port, the L2 cache (4MiB) is used as RAM. This way, U-Boot can boot
to the prompt on this board.

Supported devices:
- UART
- reset
- CFI parallel NOR flash

Signed-off-by: Stefan Roese <sr@denx.de>
4 years agomips: octeon: use mips_mach_early_init() to copy to L2 cache
Stefan Roese [Tue, 30 Jun 2020 10:33:17 +0000 (12:33 +0200)]
mips: octeon: use mips_mach_early_init() to copy to L2 cache

This patch adds the code to copy itself from bootrom location to a
different location (TEXT_BASE) to the Octeon platform. Its used in
this case to copy the complete U-Boot image into L2 cache, which
greatly improves the bootup time - especially in regard to the
very long and complex DDR4 init code.

The Kconfig symbol CONFIG_MIPS_MACH_EARLY_INIT is enabled with this
patch for Octeon.

Signed-off-by: Stefan Roese <sr@denx.de>
4 years agomips: octeon: dts: Add Octeon 3 cn73xx base dtsi file
Stefan Roese [Tue, 30 Jun 2020 10:08:57 +0000 (12:08 +0200)]
mips: octeon: dts: Add Octeon 3 cn73xx base dtsi file

This patch adds the base dtsi file for the Octeon 3 cn73xx SoC.

Signed-off-by: Stefan Roese <sr@denx.de>
4 years agomips: octeon: Initial minimal support for the Marvell Octeon SoC
Aaron Williams [Tue, 30 Jun 2020 10:08:56 +0000 (12:08 +0200)]
mips: octeon: Initial minimal support for the Marvell Octeon SoC

This patch adds very basic support for the Octeon III SoCs. Only
CFI parallel NOR flash and UART is supported for now.

Please note that the basic Octeon port does not include the DDR3/4
initialization yet. This will be added in some follow-up patches
later. To still use U-Boot on with this port, the L2 cache (4MiB on
Octeon III CN73xx) is used as RAM. This way, U-Boot can boot to the
prompt on such boards.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
4 years agosysreset: Add Octeon sysreset driver
Stefan Roese [Tue, 30 Jun 2020 10:08:55 +0000 (12:08 +0200)]
sysreset: Add Octeon sysreset driver

This patch adds a UCLASS_SYSRESET sysreset driver for the Octeon SoC
family.

Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
4 years agomips: Add CONFIG_MIPS_MACH_EARLY_INIT for very early mach init code
Stefan Roese [Tue, 30 Jun 2020 10:33:16 +0000 (12:33 +0200)]
mips: Add CONFIG_MIPS_MACH_EARLY_INIT for very early mach init code

This patch adds the optional call to mips_mach_early_init() to start.S
at a very early stage. Its disabled per default. It can be used for
very early machine / platform specific init code.  Its called very
early and at this stage the PC is allowed to differ from the linking
address (CONFIG_TEXT_BASE) as no absolute jump has been performed until
this call.

It will be used by thje Octeon platform.

Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
4 years agomips: sync asm/mipsregs.h with Linux 5.7
Daniel Schwierzeck [Sat, 11 Jul 2020 23:46:18 +0000 (01:46 +0200)]
mips: sync asm/mipsregs.h with Linux 5.7

Sync asm/mipsregs.h with Linux 5.7. Also replace the custom
symbols EBASE_CPUNUM and EBASE_WG with the according symbols
from Linux.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
4 years agomips: sync asm/addrspace.h with Linux 5.7
Daniel Schwierzeck [Sat, 11 Jul 2020 23:46:17 +0000 (01:46 +0200)]
mips: sync asm/addrspace.h with Linux 5.7

Sync asm/addrspace.h with Linux 5.7

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
4 years agomips: sync asm/asm.h with Linux 5.7
Daniel Schwierzeck [Sat, 11 Jul 2020 23:46:16 +0000 (01:46 +0200)]
mips: sync asm/asm.h with Linux 5.7

Sync asm/asm.h with Linux 5.7.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
4 years agomips: remove deprecated UNCACHED_SDRAM() macro
Daniel Schwierzeck [Sat, 11 Jul 2020 23:46:15 +0000 (01:46 +0200)]
mips: remove deprecated UNCACHED_SDRAM() macro

This macro only served as a wrapper for CKSEG1ADDR() with an
exception for CONFIG_TB0229. CONFIG_TB0229 doesn't exist, thus
use CKSEG1ADDR() directly.

This also prepares for an upcoming asm header sync with Linux.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
4 years agomips: add config options for generic cache setup code
Daniel Schwierzeck [Sat, 11 Jul 2020 22:45:57 +0000 (00:45 +0200)]
mips: add config options for generic cache setup code

Add an own Kconfig symbol for the initial disabling of caches
invoked from generic start code.

Also add an own Kconfig symbols for the initialization of caches
invoked from generic start code.

Until now both code paths could only be disabled with
CONFIG_SKIP_LOWLEVEL_INIT. But this is not flexible enough for
RAM boot scenarios like EJTAG or SPL payload or for machines
which don't require cache initialization or which want to
provide their own cache implementation.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
4 years agomips: refactor disabling of caches
Daniel Schwierzeck [Sat, 11 Jul 2020 22:45:56 +0000 (00:45 +0200)]
mips: refactor disabling of caches

Logically this code belongs to cache_init.S.

If a complex SoC needs to replace the generic cache init,
mips_cache_disable() can now be called from custom start.S files.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
4 years agomips: add KSEG1 wrapper for change_k0_cca
Daniel Schwierzeck [Sat, 11 Jul 2020 22:45:55 +0000 (00:45 +0200)]
mips: add KSEG1 wrapper for change_k0_cca

change_k0_cca() is called multiple times. Move the code for
changing to KSEG1 to a macro to avoid code duplication.

Also fix missing change to KSEG1 when changing to CONF_CM_CACHABLE_COW.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
4 years agomips: start.S: remove dead code
Daniel Schwierzeck [Sat, 11 Jul 2020 22:45:54 +0000 (00:45 +0200)]
mips: start.S: remove dead code

Since commit 703ec9ddf965 ("MIPS: Stop building position independent code")
the relocation code was completely reworked and removed from start.S.
Remove some left-overs of the old code.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
4 years agomips: cache: Make invalidate_dcache_range() weak to enable overwrite
Stefan Roese [Tue, 30 Jun 2020 10:33:19 +0000 (12:33 +0200)]
mips: cache: Make invalidate_dcache_range() weak to enable overwrite

This patch adds __weak to invalidate_dcache_range() in lib/cache.c. This
makes it possible to overwrite this function by a platforms specific
version, which will be done for Octeon.

Signed-off-by: Stefan Roese <sr@denx.de>
4 years agomips: cache: Make flush_cache() weak to enable overwrite
Stefan Roese [Thu, 14 May 2020 09:59:04 +0000 (11:59 +0200)]
mips: cache: Make flush_cache() weak to enable overwrite

This patch adds __weak to flush_cache() in lib/cache.c. This makes it
possible to overwrite this function by a platforms specific version,
like done with the Octeon base port.

Signed-off-by: Stefan Roese <sr@denx.de>
4 years agomips: cache: Allow using CONFIG_MIPS_L2_CACHE without CONFIG_MIPS_CM
Stefan Roese [Thu, 14 May 2020 09:59:03 +0000 (11:59 +0200)]
mips: cache: Allow using CONFIG_MIPS_L2_CACHE without CONFIG_MIPS_CM

This patch enables the usage of CONFIG_MIPS_L2_CACHE without
CONFIG_MIPS_CM, which is what is needed for the newly added Octeon
platform.

Signed-off-by: Stefan Roese <sr@denx.de>
4 years agomips: reloc: Change R_MIPS_NONE to catch pre-reloc BSS usage
Stefan Roese [Fri, 5 Jun 2020 08:29:25 +0000 (10:29 +0200)]
mips: reloc: Change R_MIPS_NONE to catch pre-reloc BSS usage

This patch changes the R_MIPS_NONE define from 0 to a magic value. This
makes it possible to better detect any forbidden pre-relocation usage
of BSS variables, as they are often zero'ed and then relocation is
stopped too early.

Additionally the error message is improved to also print the faulting
address. This helps finding the root-cause for this breakage by
comparing this address with the values in System.map.

This patch helps a lot when working on pre-relocation code, like the
Octeon DDR init code, where such variables have hit me multiple times
now.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
4 years agomips: traps: Set WG bit in EBase register on Octeon
Stefan Roese [Thu, 14 May 2020 09:59:06 +0000 (11:59 +0200)]
mips: traps: Set WG bit in EBase register on Octeon

WG (bit 11) needs to be set on Octeon to enable writing bits 63:30 of
the exception base register.

Signed-off-by: Stefan Roese <sr@denx.de>
4 years agomips: time: Only compile the weak get_tbclk() when needed
Stefan Roese [Thu, 14 May 2020 09:59:05 +0000 (11:59 +0200)]
mips: time: Only compile the weak get_tbclk() when needed

This patch opts-out the compilation of get_tbclk() if
CONFIG_SYS_MIPS_TIMER_FREQ is not defined. This is used on the Octeon
platform, where the weak get_tbclk() function is overwritten by its
platform specific one.

Signed-off-by: Stefan Roese <sr@denx.de>
4 years agoMerge branch '2020-07-17-misc-fixes'
Tom Rini [Fri, 17 Jul 2020 20:08:54 +0000 (16:08 -0400)]
Merge branch '2020-07-17-misc-fixes'

A large number of assorted fixes, including but not limited to:
- Correct fixdep and CONFIG_IS_ENABLED(...)
- lz4 on big endian
- Assorted LMB hardening
- Remove bd_t typedef

4 years agoinclude: pci_ids: Add Cavium devices
Suneel Garapati [Fri, 17 Jul 2020 06:06:22 +0000 (08:06 +0200)]
include: pci_ids: Add Cavium devices

Add VendorID and DeviceID for supported devices on OcteonTX/TX2
platforms.

Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
4 years agodoc: fit: Write hex address as hex instead of int
Michal Simek [Wed, 15 Jul 2020 13:10:17 +0000 (15:10 +0200)]
doc: fit: Write hex address as hex instead of int

When update_uboot.its is used directly there is syntax error for no reason.

Error report:
mkimage -f update_uboot.its boot
Error: update_uboot.its:18.12-13 syntax error
FATAL ERROR: Unable to parse input tree
mkimage: Can't read boot.tmp: Invalid argument

Fixes: 4bae90904b69 ("Automatic software update from TFTP server")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agomtd: mtdpart: use uint64_t instead of int for cur_off
Martin Kaistra [Mon, 13 Jul 2020 12:40:02 +0000 (14:40 +0200)]
mtd: mtdpart: use uint64_t instead of int for cur_off

The types of "offset" and "size" of "struct mtd_partition" are uint64_t,
while mtd_parse_partitions() uses int to work with these values. When
the offset reaches 2GB, it is interpreted as a negative value, which
leads to error messages like

mtd: partition "<partition name>" is out of reach -- disabled

eg. when using the "ubi part" command.

Fix this by using uint64_t for cur_off and cur_sz.

Signed-off-by: Martin Kaistra <martin.kaistra@linutronix.de>
Reviewed-by: Kurt Kanzenbach <kurt@linutronix.de>
Reviewed-by: Heiko Schocher <hs@denx.de>
4 years agoboard/km: update MAINTAINERS email
Holger Brunck [Thu, 9 Jul 2020 15:31:23 +0000 (17:31 +0200)]
board/km: update MAINTAINERS email

Signed-off-by: Holger Brunck <holger.brunck@hitachi-powergrids.com>
CC: Valentin Longchamp <valentin.longchamp@hitachi-powergrids.com>
4 years agodoc: correct description of crash dumps
Heinrich Schuchardt [Thu, 9 Jul 2020 06:12:06 +0000 (08:12 +0200)]
doc: correct description of crash dumps

Correct the description of the ESR register.

Fix a typo.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
4 years agofixdep: fix CONFIG_IS_ENABLED etc. handling
Stephen Warren [Wed, 8 Jul 2020 21:45:56 +0000 (15:45 -0600)]
fixdep: fix CONFIG_IS_ENABLED etc. handling

When fixdep detects CONFIG_IS_ENABLED and other similar macros, it must
parse the macro parameter to determine which actual CONFIG_ option is
being referenced. This involves moving a pointer forward through the
entire CONFIG_ option "word". Currently, the code uses variable q to walk
through the word, but doesn't actually initialize it to point at the
parameter before doing so. Consequently, the walking process immediately
fails since it sees the macro invocatoins's ( rather than the expected
alpha-numeric characters in the macro parameter. Fix this by adding the
missing initialization.

Fixes: 67f2ee86ccbe ("kbuild: fixdep: Resync this with v4.17")
Fixes: 7012865e961c ("gpio: fix test.py for gpio label lookup")
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agomkimage: Fix error message if write less data then expected
Mylène Josserand [Wed, 8 Jul 2020 09:52:50 +0000 (11:52 +0200)]
mkimage: Fix error message if write less data then expected

Add a new error message in case the size of data written
are shorter than the one expected.

Currently, it will lead to the following error message:

"mkimage: Write error on uImage: Success"

This is not explicit when the error is because the device
doesn't have enough space. Let's use a more understandable message:

"mkimage: Write only 4202432/4682240 bytes, probably no space left on the device"

Signed-off-by: Mylène Josserand <mylene.josserand@collabora.com>
Reviewed-by: Walter Lozano <walter.lozano@collabora.com>
4 years agoremove include/config_defaults.h
Rasmus Villemoes [Tue, 7 Jul 2020 08:40:26 +0000 (10:40 +0200)]
remove include/config_defaults.h

Since commit 4b0bcfa7c4ec (Kconfig: Migrate CONFIG_BOOTM_* options),
the config_defaults.h file has been void of any actual content - and
these days, "sane defaults for everyone" is achieved by appropriate
default values in Kconfig. Remove it, and thus make every translation
unit process one less header file.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
4 years agodoc: multi-dtb-fit: Remove double underscores
Fabio Estevam [Sun, 5 Jul 2020 22:04:50 +0000 (19:04 -0300)]
doc: multi-dtb-fit: Remove double underscores

Remove the incorrect usage of double underscores for the
CONFIG_OF_LIST and CONFIG_SPL_OF_LIST symbols.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
4 years agofs: error handling in do_load()
Heinrich Schuchardt [Mon, 29 Jun 2020 18:08:49 +0000 (20:08 +0200)]
fs: error handling in do_load()

If a file cannot be loaded, show an error message.
Set the EFI boot device only after successfully loading a file.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agoasm/u-boot.h: remove bd_t definitions
Masahiro Yamada [Fri, 26 Jun 2020 06:13:35 +0000 (15:13 +0900)]
asm/u-boot.h: remove bd_t definitions

All the users of bd_t were converted to struct bd_info.

Remove the definitions.

Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
4 years agotreewide: convert bd_t to struct bd_info manually
Masahiro Yamada [Fri, 26 Jun 2020 06:13:34 +0000 (15:13 +0900)]
treewide: convert bd_t to struct bd_info manually

Some code was not converted by coccinelle, somehow.

I manually fixed up the remaining, and comments, README docs.

Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
[trini: Add arch/arm/mach-davinci/include/mach/sdmmc_defs.h and
        include/fdt_support.h]
Signed-off-by: Tom Rini <trini@konsulko.com>
4 years agotreewide: convert bd_t to struct bd_info by coccinelle
Masahiro Yamada [Fri, 26 Jun 2020 06:13:33 +0000 (15:13 +0900)]
treewide: convert bd_t to struct bd_info by coccinelle

The Linux coding style guide (Documentation/process/coding-style.rst)
clearly says:

  It's a **mistake** to use typedef for structures and pointers.

Besides, using typedef for structures is annoying when you try to make
headers self-contained.

Let's say you have the following function declaration in a header:

  void foo(bd_t *bd);

This is not self-contained since bd_t is not defined.

To tell the compiler what 'bd_t' is, you need to include <asm/u-boot.h>

  #include <asm/u-boot.h>
  void foo(bd_t *bd);

Then, the include direcective pulls in more bloat needlessly.

If you use 'struct bd_info' instead, it is enough to put a forward
declaration as follows:

  struct bd_info;
  void foo(struct bd_info *bd);

Right, typedef'ing bd_t is a mistake.

I used coccinelle to generate this commit.

The semantic patch that makes this change is as follows:

  <smpl>
  @@
  typedef bd_t;
  @@
  -bd_t
  +struct bd_info
  </smpl>

Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
4 years agoarm64: Remove CONFIG_SYS_FULL_VA macro
Michal Simek [Thu, 25 Jun 2020 07:26:57 +0000 (09:26 +0200)]
arm64: Remove CONFIG_SYS_FULL_VA macro

All configurations have been removed in 2016 by commit 7985cdf74b28
("arm64: Remove non-full-va map code").

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agoMakefile: Silence relocate-rela call
Jan Kiszka [Thu, 25 Jun 2020 06:39:45 +0000 (08:39 +0200)]
Makefile: Silence relocate-rela call

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
4 years agolib: zlib: Remove offset pointer optimization in inftrees.c
Chin Liang See [Wed, 24 Jun 2020 08:31:08 +0000 (16:31 +0800)]
lib: zlib: Remove offset pointer optimization in inftrees.c

This fixes the CVE-2016-9840. Commit imported from [1].

inftrees.c was subtracting an offset from a pointer to an array,
in order to provide a pointer that allowed indexing starting at
the offset. This is not compliant with the C standard, for which
the behavior of a pointer decremented before its allocated memory
is undefined. Per the recommendation of a security audit of the
zlib code by Trail of Bits and TrustInSoft, in support of the
Mozilla Foundation, this tiny optimization was removed, in order
to avoid the possibility of undefined behavior.

[1]: https://github.com/madler/zlib/commit/6a043145ca6e9c55184013841a67b2fef87e44c0

Signed-off-by: Mark Adler <madler@alumni.caltech.edu>
Signed-off-by: Chin Liang See <chin.liang.see@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
4 years agoConvert CONFIG_ARMV7_PSCI_1_0 and CONFIG_ARMV7_PSCI_0_2 to Kconfig
Patrick Delaunay [Wed, 17 Jun 2020 16:19:18 +0000 (18:19 +0200)]
Convert CONFIG_ARMV7_PSCI_1_0 and CONFIG_ARMV7_PSCI_0_2 to Kconfig

This converts the following to Kconfig:
CONFIG_ARMV7_PSCI_1_0
CONFIG_ARMV7_PSCI_0_2

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
4 years agospl: fix ext4fs_mount return code handling
Thomas Schaefer [Tue, 16 Jun 2020 20:03:52 +0000 (22:03 +0200)]
spl: fix ext4fs_mount return code handling

- Despite other ext4 filesystem functions, ext4fs_mount returns
  0 in case of error.
- This leads to u-boot crash in case that an SD card
  with valid partition table but without ext4 filesystem created
  in a partition is found on SD card.
- Fix this by returning a proper error code of '-1' from spl_load_image_ext
  function in case of ext4fs_mount error.

Signed-off-by: Thomas Schaefer <thomas.schaefer@kontron.com>
[hthiery: slightly reword the commit message]
Signed-off-by: Heiko Thiery <heiko.thiery@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
4 years agocmd: booti: convert the debug print about image move to printf
Tero Kristo [Fri, 12 Jun 2020 12:41:21 +0000 (15:41 +0300)]
cmd: booti: convert the debug print about image move to printf

Moving of the OS image may have some nasty side effects like corrupting
DTB. Convert the current debug print to printf so that the relocation of
the OS is always obvious to the user.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
4 years agocommon: bootm: add checks to verify if ramdisk / fdtimage overlaps OS image
Tero Kristo [Fri, 12 Jun 2020 12:41:20 +0000 (15:41 +0300)]
common: bootm: add checks to verify if ramdisk / fdtimage overlaps OS image

These cases are typically fatal and are difficult to debug for random
users. Add checks for detecting overlapping images and abort if overlap
is detected.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
4 years agoimage: fdt: bail out with error if no boot time FDT image found
Tero Kristo [Fri, 12 Jun 2020 12:41:19 +0000 (15:41 +0300)]
image: fdt: bail out with error if no boot time FDT image found

Currently the boot continues if the FDT image is clearly corrupted,
which just causes the loaded OS to hang. Abort boot properly if the FDT
is corrupted.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
4 years agoConvert CONFIG_MXC_UART to Kconfig
Tom Rini [Tue, 9 Jun 2020 14:46:46 +0000 (10:46 -0400)]
Convert CONFIG_MXC_UART to Kconfig

This converts the following to Kconfig:
   CONFIG_MXC_UART

Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
4 years agolz4: fix decompressor on big-endian powerpc
Rasmus Villemoes [Sun, 7 Jun 2020 12:29:18 +0000 (14:29 +0200)]
lz4: fix decompressor on big-endian powerpc

Booting an lz4-compressed kernel image fails on our powerpc board with
-EPROTONOSUPPORT. Adding a bit of debug prints, we get

  magic: 0x184d2204
  flags: 0x64
  reserved0: 1
  has_content_checksum: 1
  has_content_size: 0
  has_block_checksum: 0
  independent_blocks: 1
  version: 0
  block_descriptor: 70
  reserved1: 7
  max_block_size: 0
  reserved2: 0

So the magic is ok, but the version check fails, also some reserved
bits are apparently set. But that's because the code interprets the
"flags" and "block_descriptor" bytes wrongly:

Using bit-fields to access individual bits of an "on the wire" format
is not portable, not even when restricted to the C flavour implemented
by gcc. Quoting the gcc manual:

   * 'The order of allocation of bit-fields within a unit (C90 6.5.2.1,
     C99 and C11 6.7.2.1).'

     Determined by ABI.

and indeed, the PPC Processor ABI supplement says

   * Bit-fields are allocated from right to left (least to most
     significant) on Little-Endian implementations and from left to
     right (most to least significant) on Big-Endian implementations.

The upstream code (github.com/lz4/lz4) uses explicit shifts and masks
for encoding/decoding:

    /* FLG Byte */
    *dstPtr++ = (BYTE)(((1 & _2BITS) << 6)    /* Version('01') */
        + ((cctxPtr->prefs.frameInfo.blockMode & _1BIT ) << 5)
        + ((cctxPtr->prefs.frameInfo.blockChecksumFlag & _1BIT ) << 4)
        + ((unsigned)(cctxPtr->prefs.frameInfo.contentSize > 0) << 3)
        + ((cctxPtr->prefs.frameInfo.contentChecksumFlag & _1BIT ) << 2)
        +  (cctxPtr->prefs.frameInfo.dictID > 0) );

    /* Flags */
    {   U32 const FLG = srcPtr[4];
        U32 const version = (FLG>>6) & _2BITS;
        blockChecksumFlag = (FLG>>4) & _1BIT;
        blockMode = (FLG>>5) & _1BIT;
        contentSizeFlag = (FLG>>3) & _1BIT;
        contentChecksumFlag = (FLG>>2) & _1BIT;
        dictIDFlag = FLG & _1BIT;
        /* validate */
        if (((FLG>>1)&_1BIT) != 0) return err0r(LZ4F_ERROR_reservedFlag_set); /* Reserved bit */
        if (version != 1) return err0r(LZ4F_ERROR_headerVersion_wrong);        /* Version Number, only supported value */
    }

Do the same here, and while at it, be more careful to use unaligned
accessors to what is most likely unaligned. Also update the comment to
make it clear that it only refers to the lz4.c file, not the following
code of lz4_wrapper.c.

This has been tested partly, of course, by seeing that my
lz4-compressed kernel now boots, partly by running the (de)compression
test-suite in the (x86_64) sandbox - i.e., it should still work just
fine on little-endian hosts.

Reviewed-by: Julius Werner <jwerner@chromium.org>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
4 years agodoc: Coccinelle: move to HTML doc
Heinrich Schuchardt [Fri, 5 Jun 2020 03:13:44 +0000 (05:13 +0200)]
doc: Coccinelle: move to HTML doc

Move doc/README.coccinelle to doc/develop/coccinelle.rst using the current
linux-next version of the text.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
4 years agoMerge https://gitlab.denx.de/u-boot/custodians/u-boot-x86
Tom Rini [Fri, 17 Jul 2020 12:04:48 +0000 (08:04 -0400)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86

- New timer API to allow delays with a 32-bit microsecond timer
- Add dynamic ACPI structs (DSDT/SSDT) generations to the DM core
- x86: Enable ACPI table generation by default
- x86: Enable the copy framebuffer on Coral
- x86: A few fixes to FSP2 with ApolloLake
- x86: Drop setup_pcat_compatibility()
- x86: Primary-to-Sideband Bus minor fixes

4 years agoMerge tag 'u-boot-imx-20200716' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
Tom Rini [Fri, 17 Jul 2020 12:04:28 +0000 (08:04 -0400)]
Merge tag 'u-boot-imx-20200716' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

i.MX for 2020.10
----------------

- i.MX DDR driver fix/update for i.MX8M
- i.MX pinctrl driver fix.
- Use arm_smccc_smc to remove imx sip function
- i.MX8M clk update
- support booting aarch32 kernel on aarch64 hardware
- fused part support for i.MX8MP
- imx6: pcm058 to DM

Travis: https://travis-ci.org/github/sbabic/u-boot-imx/builds/708734785

4 years agoacpi: Enable ACPI table generation by default on x86
Simon Glass [Fri, 17 Jul 2020 03:22:39 +0000 (21:22 -0600)]
acpi: Enable ACPI table generation by default on x86

This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: Rename board_final_cleanup() to board_final_init()
Simon Glass [Fri, 17 Jul 2020 03:22:38 +0000 (21:22 -0600)]
x86: Rename board_final_cleanup() to board_final_init()

This function sounds like something that is called when U-Boot is about to
jump to Linux. In fact it is an init function.

Rename it to reduce confusion.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
4 years agox86: acpi: Correct the version of the MADT
Simon Glass [Fri, 17 Jul 2020 03:22:37 +0000 (21:22 -0600)]
x86: acpi: Correct the version of the MADT

Currently U-Boot implements version 2 but reports version 4. Correct it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
4 years agox86: Drop setup_pcat_compatibility()
Simon Glass [Fri, 17 Jul 2020 03:22:36 +0000 (21:22 -0600)]
x86: Drop setup_pcat_compatibility()

This function does not exist anymore. Drop it from the header file.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: Update the comment about booting for FSP2
Simon Glass [Fri, 17 Jul 2020 03:22:35 +0000 (21:22 -0600)]
x86: Update the comment about booting for FSP2

The comment here applies only to FSP1, so update it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
4 years agox86: Store the coreboot table address in global_data
Simon Glass [Fri, 17 Jul 2020 03:22:34 +0000 (21:22 -0600)]
x86: Store the coreboot table address in global_data

At present this information is used to locate and parse the tables but is
not stored. Store it so that we can display it to the user, e.g. with the
'bdinfo' command.

Note that now the GD_FLG_SKIP_LL_INIT flag is set in get_coreboot_info(),
so it is always set when booting from coreboot.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
4 years agox86: apl: Adjust FSP-M code to avoid hard-coded address
Simon Glass [Fri, 17 Jul 2020 03:22:33 +0000 (21:22 -0600)]
x86: apl: Adjust FSP-M code to avoid hard-coded address

Update this code to calculate the address to use, rather than hard-coding
it. Obtain the requested stack size from the FSP.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: apl: Set the correct boot mode in the FSP-M code
Simon Glass [Fri, 17 Jul 2020 03:22:32 +0000 (21:22 -0600)]
x86: apl: Set the correct boot mode in the FSP-M code

If there is MRC information we should run FSP-M with a different
boot_mode flag since it is supposed to do a 'fast path' through the
memory init. Fix this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: Add debugging to table writing
Simon Glass [Fri, 17 Jul 2020 03:22:31 +0000 (21:22 -0600)]
x86: Add debugging to table writing

Writing tables is currently pretty opaque. Add a bit of debugging to the
process so we can see what tables are written and where they start/end in
memory.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
4 years agox86: apl: Fix save/restore of ITSS priorities
Simon Glass [Fri, 17 Jul 2020 03:22:30 +0000 (21:22 -0600)]
x86: apl: Fix save/restore of ITSS priorities

The FSP-S changes the ITSS priorities. The code that tries to save it
before running FSP-S and restore it afterwards does not work as U-Boot
relocates in between the save and restore. This means that the driver
data saved before relocation is lost and the new driver just sees zeroes.

Fix this by allocating space in the relocated memory for the ITSS data.
Save it there and access it from the driver after relocation.

This fixes interrupt handling on coral.

Also drop the log_msg_ret() in irq_first_device_type() since this function
can be called speculatively in places where we are not sure if there is
an interrupt controller of that type. The resulting log errors are
confusing when there is no error.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
4 years agox86: irq: Support flags for acpi_gpe
Simon Glass [Wed, 8 Jul 2020 03:32:34 +0000 (21:32 -0600)]
x86: irq: Support flags for acpi_gpe

This binding currently has a flags cell but it is not used. Make use of it
to create ACPI tables for interrupts.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
4 years agopmc: Move common registers to the header file
Simon Glass [Wed, 8 Jul 2020 03:32:33 +0000 (21:32 -0600)]
pmc: Move common registers to the header file

These registers need to be accesses from ACPI code, so move them to the
header file.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: apl: Hide the p2sb on exit from U-Boot
Simon Glass [Wed, 8 Jul 2020 03:32:32 +0000 (21:32 -0600)]
x86: apl: Hide the p2sb on exit from U-Boot

This confuses Linux's PCI probing so needs to be hidden when booting
Linux. Add a remove() method to handle this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
4 years agox86: apl: Support set_hide() in p2sb driver
Simon Glass [Wed, 8 Jul 2020 03:32:31 +0000 (21:32 -0600)]
x86: apl: Support set_hide() in p2sb driver

Add support for this new method in the driver and in the fsp-s setup.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
4 years agop2sb: Add a method to hide the bus
Simon Glass [Wed, 8 Jul 2020 03:32:30 +0000 (21:32 -0600)]
p2sb: Add a method to hide the bus

The P2SB bus needs to be hidden in some cases so that it does not get
auto-configured by Linux. Add a method for this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
4 years agoi2c: designware_i2c: Support ACPI table generation
Simon Glass [Wed, 8 Jul 2020 03:32:29 +0000 (21:32 -0600)]
i2c: designware_i2c: Support ACPI table generation

Update the PCI driver to generate ACPI information so that Linux has the
full information about each I2C bus.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
[bmeng: Correct one typo in dw_i2c_gen_speed_config() comments]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
4 years agoi2c: Add log_ret() on error
Simon Glass [Wed, 8 Jul 2020 03:32:28 +0000 (21:32 -0600)]
i2c: Add log_ret() on error

Add a few of these calls to make it easier to see where an error occurs,
if CONFIG_LOG_ERROR_RETURN is enabled.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
4 years agoi2c: designware_i2c: Add a little more debugging
Simon Glass [Wed, 8 Jul 2020 03:32:27 +0000 (21:32 -0600)]
i2c: designware_i2c: Add a little more debugging

Add debugging for a few more values and also use log to show return values
when something goes wrong. This makes it easier to see the root cause.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
4 years agox86: gpio: Add support for obtaining ACPI info for a GPIO
Simon Glass [Wed, 8 Jul 2020 03:32:26 +0000 (21:32 -0600)]
x86: gpio: Add support for obtaining ACPI info for a GPIO

Implement the method that converts a GPIO into the form used by ACPI, so
that GPIOs can be added to ACPI tables.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: apl: Use memory-mapped access for VBT
Simon Glass [Wed, 8 Jul 2020 03:32:25 +0000 (21:32 -0600)]
x86: apl: Use memory-mapped access for VBT

Use the new binman memory-mapping function to access the VBT, to simplify
the code.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: Add error checking for csrt table generation
Simon Glass [Wed, 8 Jul 2020 03:32:24 +0000 (21:32 -0600)]
x86: Add error checking for csrt table generation

Generation of this table can fail, so update the function to return an
error code.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
4 years agox86: pinctrl: Drop the acpi_path member
Simon Glass [Wed, 8 Jul 2020 03:32:23 +0000 (21:32 -0600)]
x86: pinctrl: Drop the acpi_path member

This is in the device tree now, so drop the unnecessary field here.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: pinctrl: Set up itss in the probe() method
Simon Glass [Wed, 8 Jul 2020 03:32:22 +0000 (21:32 -0600)]
x86: pinctrl: Set up itss in the probe() method

At present the itss is probed in the ofdata_to_platdata() method. This is
incorrect since itss is a child of p2sb which itself needs to probe the
pinctrl device. This means that p2sb is effectively not probed when the
itss is probed, so we get the wrong register address from p2sb.

Fix this by moving the itss probe to the correct place.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
4 years agox86: pinctrl: Add multi-ACPI control
Simon Glass [Wed, 8 Jul 2020 03:32:21 +0000 (21:32 -0600)]
x86: pinctrl: Add multi-ACPI control

Add a Kconfig to control whether pinctrl is represented as a single ACPI
device or as multiple devices. In the latter case (the default) we should
return the pin number relative to the pinctrl device.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
4 years agox86: pinctrl: Update comment for intel_pinctrl_get_pad()
Simon Glass [Wed, 8 Jul 2020 03:32:20 +0000 (21:32 -0600)]
x86: pinctrl: Update comment for intel_pinctrl_get_pad()

Add information about what is returned on error.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: pinctrl: Add a way to get the pinctrl reg address
Simon Glass [Wed, 8 Jul 2020 03:32:19 +0000 (21:32 -0600)]
x86: pinctrl: Add a way to get the pinctrl reg address

At present we can query the offset of a pinctrl register within the p2sb.
For ACPI we need to get the actual address of the register. Add a function
to handle this and rename the old one to more accurately reflect its
purpose.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
4 years agosound: Add an ACPI driver for Maxim MAX98357ac
Simon Glass [Wed, 8 Jul 2020 03:32:18 +0000 (21:32 -0600)]
sound: Add an ACPI driver for Maxim MAX98357ac

This chip is used on coral and we need to generate ACPI tables for sound
to make it work. Add a driver that does just this (i.e. at present does
not actually support playing sound).

Signed-off-by: Simon Glass <sjg@chromium.org>
[bmeng: Use the correct acpi_irq_polarity enum number]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
4 years agosound: Add an ACPI driver for Dialog Semicondutor da7219
Simon Glass [Wed, 8 Jul 2020 03:32:17 +0000 (21:32 -0600)]
sound: Add an ACPI driver for Dialog Semicondutor da7219

This chip is used on coral and we need to generate ACPI tables for sound
to make it work. Add a driver that does just this (i.e. at present does
not actually support playing sound).

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agox86: Add support for building up an NHLT structure
Simon Glass [Wed, 8 Jul 2020 03:32:16 +0000 (21:32 -0600)]
x86: Add support for building up an NHLT structure

The Intel Non-High-Definition-Audio Link Table (NHLT) table describes the
audio codecs and connections in a system. Various devices can contribute
information to produce the table.

Add functions to allow adding to the structure that is eventually written
to the ACPI tables. Also add the device-tree bindings.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agoacpi: Support writing named values
Simon Glass [Wed, 8 Jul 2020 03:32:15 +0000 (21:32 -0600)]
acpi: Support writing named values

Allow writing named integers and strings to the generated ACPI code.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
[bmeng: Fix the "new blank line at EOF" warning]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
4 years agoacpi: Support generation of a device
Simon Glass [Wed, 8 Jul 2020 03:32:14 +0000 (21:32 -0600)]
acpi: Support generation of a device

Allow writing an ACPI device to the generated ACPI code.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
[bmeng: Fix build failures on Sandbox]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: Add bindings for NHLT
Simon Glass [Wed, 8 Jul 2020 03:32:13 +0000 (21:32 -0600)]
x86: Add bindings for NHLT

Add devicetree bindings for the Intel Non-High-Definition-Audio Link Table
(NHLT).

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agoacpi: mmc: Generate ACPI info for the PCI SD Card
Simon Glass [Wed, 8 Jul 2020 03:32:12 +0000 (21:32 -0600)]
acpi: mmc: Generate ACPI info for the PCI SD Card

Write required information into the SSDT to describe the SD card
card-detect pin. Since the required GPIO properties are not present in
the device-tree binding, set them manually for now.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agoacpi: Support generation of a generic register
Simon Glass [Wed, 8 Jul 2020 03:32:11 +0000 (21:32 -0600)]
acpi: Support generation of a generic register

Allow writing out a generic register.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
[bmeng: Fix build failures on Sandbox]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
4 years agoacpi: Support generation of a scope
Simon Glass [Wed, 8 Jul 2020 03:32:10 +0000 (21:32 -0600)]
acpi: Support generation of a scope

Add a function to write a scope to the generated ACPI code.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: Fix build failures on Sandbox]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
4 years agoacpi: Export functions to write sized values
Simon Glass [Wed, 8 Jul 2020 03:32:09 +0000 (21:32 -0600)]
acpi: Export functions to write sized values

At present only acpigen_write_integer() is exported for use by other code.
But in some cases it is useful to call the specific function depending on
the size of the value.

Export these functions and add a test.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: Fix the "new blank line at EOF" warning]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
4 years agodm: acpi: Add support for the NHLT table
Simon Glass [Wed, 8 Jul 2020 03:32:08 +0000 (21:32 -0600)]
dm: acpi: Add support for the NHLT table

The Intel Non-High-Definition-Audio Link Table (NHLT) table describes the
audio codecs and connections in a system. Various devices can contribute
information to produce the table.

Add core support for this, based on a structure which is built up through
calls to the driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
4 years agodm: core: Add a way of overriding the ACPI device path
Simon Glass [Wed, 8 Jul 2020 03:32:07 +0000 (21:32 -0600)]
dm: core: Add a way of overriding the ACPI device path

Some devices such as GPIO need to override the normal path that would be
generated by driver model. Add a device-tree property for this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
4 years agodtoc: Support ACPI paths in of-platdata
Simon Glass [Wed, 8 Jul 2020 03:32:06 +0000 (21:32 -0600)]
dtoc: Support ACPI paths in of-platdata

The start of an ACPI path typically has backslashes in it. These are not
preserved during the translation from device tree to C code, since dtc
(correctly) uses the first backslash as an escape character, and dtoc
therefore leaves it out of the C string.

Fix this with special-case handling.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agoacpi: Allow creating the GNVS to fail
Simon Glass [Wed, 8 Jul 2020 03:32:05 +0000 (21:32 -0600)]
acpi: Allow creating the GNVS to fail

In some cases an internal error may prevent this from working. Update the
function return value and report the error. At present the API for writing
tables does not easily support reporting errors, but once it is fully
updated to use a context pointer, this will be easier.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>