Sam Protsenko [Fri, 4 Jan 2019 20:09:08 +0000 (22:09 +0200)]
arm: ti: boot: Remove legacy Android partitions
Remove unused Android partitions:
- efs, crypto, cache: we don't use it anymore (images are not built
in AOSP
- ipu1, ipu2: IPU firmware is now a part of vendor image and doesn't
reside as a separate partition
While at it, rename "reserved" partition to "uboot-env", as it's
actually stores U-Boot environment.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
Ye Li [Fri, 4 Jan 2019 09:34:24 +0000 (09:34 +0000)]
env: sata: Add missed env location for SATA boot
The env location label ENVL_ESATA is missed in location tables, so
when we configure the ENV in SATA, u-boot fails to get correct env
location and cause boot hang in board_f.
Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
Ye Li [Fri, 4 Jan 2019 09:24:14 +0000 (09:24 +0000)]
arm: Round the dma_alloc_coherent memory size to cache line aligned
When running usb dwc3 gadget driver, we meet random USB enumeration failure in fastboot.
The root cause is a cache coherence issue. When it happens, the ctrl_req in
gadget driver is allocated at 0xfe932f40, and the usb_composite_dev (cdev)
is allocated at 0xfe932f60. So after we submit the setup request (cache flushed) to USB
controller, any accessing to usb_composite_dev variable will cause the cache line refill, then
when setup transfer is completed, reading the setup data in ctrl_req will gets old value from
cache not from memory.
The ctrl_req is allocated by API dma_alloc_coherent, but u-boot don't have cohernet memory.
so it still needs cache maintain operations before/after HW accessing. Since the cache flush or
invalidate bases on cache line, so when the allocated memory size is not cache line aligned,
potentially it may meet such issue.
This patch modifies the dma_alloc_coherent API to round the size to cache line aligned.
Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
igep003x: MAINTAINER: Remove myself as maintainer and add Javier
I can't continue maintaining the board because I don't have access to the
hardware anymore, so remove myself from the entry and add Javier who has
volunteered to help and maintain the board.
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Signed-off-by: Javier MartÃnez Canillas <javier@dowhile0.org>
Tom Rini [Thu, 27 Dec 2018 14:22:55 +0000 (09:22 -0500)]
Add a github template telling people to not use pull requests there
On our mirror account on github we have gotten a handful of pull
requests. At this time github does not allow you to disable pull
requests on a project. The generally suggested work-around is to add a
pull request template that tells people to not use that workflow. Add
one here that points to the wiki page on submitted patches.
Andre Przywara [Mon, 17 Dec 2018 10:05:45 +0000 (10:05 +0000)]
mmc: bring back partition init for non-DM MMC drivers
Commit d0851c893706 ("blk: Call part_init() in the post_probe() method")
removed the call to part_init() in mmc.c, as this is done by the DM_MMC
framework.
However Allwinner is (still) relying on a non-DM MMC driver, so we are
now missing the implicit partition init, leading to failing MMC accesses
due to the missing partition information.
Bring the call back just for non-DM MMC driver to fix this regression.
Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Soeren Moch <smoch@web.de>
Andre Przywara [Mon, 17 Dec 2018 10:05:44 +0000 (10:05 +0000)]
sunxi: drop default SPL_LIBDISK_SUPPORT enablement
There is no code for using partition labels in the Allwinner SPL port.
Even so the name is slightly misleading, CONFIG_SPL_LIBDISK_SUPPORT was
meant to guard partition code for the SPL.
Remove the "imply" line in the Kconfig to make this obvious and avoid
unneeded code inclusions, helping to keep the H6 SPL code small.
Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Tom Rini [Tue, 8 Jan 2019 03:57:56 +0000 (22:57 -0500)]
Makefile: Correct logic for DM_SCSI + unconverted drivers check
When checking for boards that are enabling a SATA driver that isn't
converted to DM yet we need to be sure to not also trip over boards that
do set CONFIG_DM_SCSI by itself, as that is not a bug.
Reported-by: Andy Shevchenko <andy.shevchenko@gmail.com> Fixes: ea9d7c17fc4c ("dm: MIGRATION: Add migration plan for CONFIG_SATA") Signed-off-by: Tom Rini <trini@konsulko.com>
Philipp Tomsich [Fri, 4 Jan 2019 18:09:08 +0000 (19:09 +0100)]
rockchip: rk3399: fix missing braces in full pinctrl
Braces around the error-case for rk3399_pinctrl_set_pin_pupd lead to
an unconditional (and unintended) return from the function without it
ever setting pin-configurations.
Fix it.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Tom Rini [Thu, 3 Jan 2019 13:39:44 +0000 (08:39 -0500)]
Merge tag 'for-master-20190103' of git://git.denx.de/u-boot-rockchip
Last-minute fixes for 2019.1:
- clamp DRAM size to below 32bit for 32bit targets to support 4GB
- fix copyright notice on some Rockchip-contributed files
- adjust vdd_log for the RK3399-Q7 to improve stability in some workloads
Building peach-pi smdk5420 and peach-pit with thumb mode for SPL
ends-up in the following error:
Error: Thumb encoding does not support an immediate here -- `msr cpsr_c,#0x13|0xC0'
Use an intermediate register to be able to use thumb for exynos5 SPL.
Signed-off-by: Guillaume GARDET <guillaume.gardet@free.fr> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Tom Rini <trini@konsulko.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
rockchip: rk3399: Add Kconfig option for full pinctrl driver
This patch adds a Kconfig option to enable the full pinctrl driver
for the RK3399. This flag needs to be enabed in order to get the
features of the full pinctrl driver compiled in (i.e. a .set_state()
callback).
Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
The current pinctrl driver for the RK3399 has a range of qulity issues.
E.g. it only implements the .set_state_simple() callback, it
does not parse the available pinctrl information from the DTS
(instead uses hardcoded values), is not flexible enough to cover
devices without 'interrupt' field in the DTS (e.g. PWM),
is not written generic enough to make code reusable among other
rockchip SoCs...
This patch addresses these issues by reimplementing the whole driver
from scratch using the .set_state() callback.
The new implementation covers all featurese of the old code
(i.e. it supports pinmuxing and pullup/pulldown configuration).
This patch has been tested on a RK3399-Q7 SoM (Puma).
Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
pinctrl_decode_pin_config_dm() is basically a feature-equivalent
implementation of pinctrl_decode_pin_config(), which operates
on struct udevice devices and uses the dev_read_*() API.
Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Kever Yang [Fri, 28 Dec 2018 01:56:48 +0000 (09:56 +0800)]
rockchip: sdram-common: fix wrong size for 4GB in 32bit SoC
This is workaround for issue we can't get correct size for 4GB ram
in 32bit system and available before we really need ram space
out of 4GB, eg.enable ARM LAPE(rk3288 supports 8GB ram).
The size of 4GB is '0x1 00000000', and this value will be truncated
to 0 in 32bit system, and system can not get correct ram size.
Rockchip SoCs reserve a blob of space for peripheral near 4GB,
and we are now setting SDRAM_MAX_SIZE as max available space for
ram in 4GB, so we can use this directly to workaround the issue.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-By: Vagrant Cascadian <vagrant@debian.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
Current driver doesn't check if the destination pointer is NULL.
This cause the data from the FIFO to be stored inside the internal
SDRAM ( address 0 ).
The patch add simple check if the destination pointer is NULL.
Signed-off-by: Stefan Mavrodiev <stefan@olimex.com> Acked-by: Jagan Teki <jagan@openedev.com>
[jagan: fix commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Lukasz Majewski [Mon, 3 Dec 2018 09:20:47 +0000 (10:20 +0100)]
nand: vybrid: Use calloc() instead of malloc() to allocate struct nfc
Without this change it is possible that Vybrid's NFC driver malloc() call
will obtain some memory used (and correctly free'd) by some previous
driver (in this case pinctrl for Vybrid).
As a result some fields of struct nfc - in out case mtd->_get_device - are
"pre initialized" with some random values.
On the latter stage of booting, when e.g. somebody calls 'mtdparts default'
the "data abort" is observed when __get_mtd_device() function is called.
The mtd->_get_device pointer is not NULL and wrong value is referenced.
Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Stefan Agner <stefan.agner@toradex.com>
Harald Seiler [Fri, 7 Dec 2018 09:19:36 +0000 (10:19 +0100)]
pcm058: fix NAND flash not using badblock table
Currently, U-Boot ignores the BBT stored in the last 4 blocks of NAND
flash because the NAND_BBT_USE_FLASH flag is not set. This leads to
two issues:
* U-Boot silently uses a memory-only BBT which is initialized with all
blocks marked as good. This means, actual bad blocks are marked good
and U-Boot might try writing to or reading from them.
* The BBT in flash, which will be created once Linux boots up, is not
off limits for a driver ontop, like UBI. While it does not seem to
consistently produce an error, sometimes UBI will fail to attach
because the BBT blocks obviously don't contain valid UBI data.
To fix this, this patch sets the CONFIG_SYS_NAND_USE_FLASH_BBT option,
which is used in ./drivers/mtd/nand/raw/mxs_nand.c to decide whether
a BBT in flash is used.
CPU: Freescale i.MX8MQ rev2.0 at 1000 MHz
Reset cause: POR
Model: Freescale i.MX8MQ EVK
DRAM: 3 GiB
MMC: FSL_SDHC: 0, FSL_SDHC: 1
In: serial
Out: serial
Err: serial
Net:
Warning: ethernet@30be0000 using MAC address from ROM
eth0: ethernet@30be0000
Hit any key to stop autoboot: 0
"
Peng Fan [Tue, 20 Nov 2018 10:19:46 +0000 (10:19 +0000)]
imx: imx8mq: build flash.bin
Build flash.bin for i.MX8MQ, it will include signed hdmi firmware,
spl, ddr firmware, fit image(bl31.bin, u-boot-nodtb.bin, dtb).
Burn it to 33KB offset of SD card.
Ye Li [Tue, 20 Nov 2018 10:19:15 +0000 (10:19 +0000)]
imx8m: Enable CONFIG_SPL_FIT_IMAGE_TINY for iMX8M
If we don't define CONFIG_SPL_FIT_IMAGE_TINY, when loading images from FIT,
the SPL will record all loadables' info to u-boot's FDT. This causes
problem when HAB is enabled, because FDT's content is modified before
we authenticate it.
Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
imx: hab: extend hab_auth_img to calculate ivt_offset
Current implementation of hab_auth_img command needs ivt_offset to
authenticate the image. But ivt header is placed at the end of image
date after padding.
This leaves the usage of hab_auth_img command to fixed size or static
offset for ivt header. New function "get_image_ivt_offset" is introduced
to find the ivt offset during runtime. The case conditional check in this
function is same as boot_get_kernel in common/bootm.c
With this variable length image e.g. FIT image with any random size can
have IVT at the end and ivt_offset option can be left optional
Can be used as "hab_auth_img $loadaddr $filesize" from u-boot script
Signed-off-by: Parthiban Nallathambi <pn@denx.de> Reviewed-by: Breno Lima <breno.lima@nxp.com>
Ye Li [Sat, 17 Nov 2018 09:10:25 +0000 (09:10 +0000)]
SPL: Add HAB image authentication to FIT
Introduce two board level callback functions to FIT image loading process, and
a SPL_FIT_FOUND flag to differentiate FIT image or RAW image.
Implement functions in imx common SPL codes to call HAB funtion
to authenticate the FIT image. Generally, we have to sign multiple regions
in FIT image:
1. Sign FIT FDT data (configuration)
2. Sign FIT external data (Sub-images)
Because the CSF supports to sign multiple memory blocks, so that we can use one
signature to cover all regions in FIT image and only authenticate once.
The authentication should be done after the entire FIT image is loaded into
memory including all sub-images.
We use "-p" option to generate FIT image to reserve a space for FIT IVT
and FIT CSF, also this help to fix the offset of the external data (u-boot-nodtb.bin,
ATF, u-boot DTB).
The signed FIT image layout is as below:
--------------------------------------------------
| | | | | | | |
| FIT | FIT | FIT | | U-BOOT | ATF | U-BOOT |
| FDT | IVT | CSF | | nodtb.bin | | DTB |
| | | | | | | |
--------------------------------------------------
Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
CONFIG_CMD_BOOTEFI is enabled by Kconfig default, but rarely
used on this board/platform.
So let's disable it for the boards default config.
This also saves around 16 KiB in the final u-boot.sb.
Signed-off-by: Michael Heimpold <mhei@heimpold.de>
Michael Heimpold [Mon, 29 Oct 2018 19:21:51 +0000 (20:21 +0100)]
configs: mx23_olinuxino_defconfig: fix status led definition
While migrating individual status led usages to Kconfig stuff,
a (random) value was introduced for this board which does not
work but produces the following error message during boot:
__led_init: failed requesting GPIO59!
Since Kconfig does not seem to accept a define as this point,
but the mxs gpio driver requires not only a simple integer value,
we need to use the plain value of MX23_PAD_SSP1_DETECT__GPIO_2_1.
Signed-off-by: Michael Heimpold <mhei@heimpold.de> Fixes: 2d8d190c8394 ("status_led: Kconfig migration")
Martin Fuzzey [Wed, 24 Oct 2018 08:21:18 +0000 (10:21 +0200)]
w1: Add driver for i.MX bus master controller
Two variants of controllers are supported:
V1 (bitwise only) found in
i.MX21, i.MX27, i.MX31, i.MX51
V2 (byte operations) found in
i.MX25, i.MX35, i.MX50, i.MX53
Only tested on i.MX53 hardware but in both modes
(by modifying the device tree).
Signed-off-by: Martin Fuzzey <martin.fuzzey@flowbird.group>
Xiaoliang Yang [Thu, 18 Oct 2018 10:27:46 +0000 (18:27 +0800)]
watchdog: imx: add config to disable wdog reset
Add Kconfig option WATCHDOG_RESET_DISABLE to disable watchdog reset
in imx_watchdog driver, so that the watchdog will not be fed in
u-boot if CONFIG_WATCHDOG_RESET_DISABLE is enabled.
Signed-off-by: Xiaoliang Yang <xiaoliang.yang_1@nxp.com>
Xiaoliang Yang [Thu, 18 Oct 2018 10:27:45 +0000 (18:27 +0800)]
watchdog: driver support for fsl-lsch2
Support watchdog driver for fsl-lsch2. It's disabled in default.
If you want to use it, please enable CONFIG_IMX_WATCHDOG.
Define CONFIG_WATCHDOG_TIMEOUT_MSECS to set watchdog timeout.
Signed-off-by: Xiaoliang Yang <xiaoliang.yang_1@nxp.com>
Denis Zalevskiy [Wed, 17 Oct 2018 08:33:30 +0000 (10:33 +0200)]
board: ge: Move VPD reading to the vpd_reader
Merge functionality duplicated in bx50v3 and mx53ppd: the logic
is the same except that process_vpd is called at different phases.
Also read_vpd could end up in error, so there is no VPD data in this
case - it shouldn't be processed.
Bin Meng [Sat, 22 Dec 2018 09:55:49 +0000 (01:55 -0800)]
fs: cbfs: Fix out of bound access during CBFS walking through
The call to file_cbfs_fill_cache() is given with the parameter
'start' pointing to the offset by the CBFS base address, but
with the parameter 'size' that equals to the whole CBFS size.
During CBFS walking through, it checks files one by one and
after it pass over the end of the CBFS which is 4GiB boundary
it tries to check files from address 0 and so on, until the
overall size the codes checked hits to the given 'size'.
Fix this by passing 'start' pointing to the CBFS base address.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
cbfs_fileheader.len indicates the content size of the file in the
cbfs, and it has nothing to do with cbfs_fileheader.offset which
is the starting address of the file in the cbfs.
Remove such check in file_cbfs_next_file(). Before this change
'cbfsinit' failed with 'Bad CBFS file'. After this change all cbfs
commands are working as expected.
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
[bmeng: keep the necessary header sanity check] Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Revert "sunxi: board: Print error after power initialization fails"
Commit a8011eb84dfa("sunxi: board: Print error after power initialization
fails") moved the DRAM init after the increase of the CPU clock
frequency. This lead to various DRAM initialisation failures on some
boards (hangs or wrong size reported, on a NanoPi Duo2 and OrangePi
Zero, for instance). Lowering the CPU frequency significantly (for instance
to 408 MHz) seems to work around the problem, so this points to some timing
issues in the DRAM code.
Debugging this sounds like a larger job, so let's just revert this patch
to bring back those boards.
Beside this probably unintended change the patch just moved the error
message around, so reverting this is not a real loss.
Tested-By: Priit Laes <plaes@plaes.org> Signed-off-by: Karl Palsson <karlp@tweak.net.au> Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
Tom Rini [Sat, 29 Dec 2018 03:00:24 +0000 (22:00 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-uniphier
Please pull UniPhier updates v2019.01
- import DIV_ROUND_CLOSEST_ULL macro from Linux
- import improvement and fix of Denali NAND driver from Linux
- add NAND 200MHz clock to clk driver
- allow CONFIG_BOOTCOMMAND to run custom boot command/script
- sync DT with Linux 4.20
This commit improves the ->setup_data_interface() hook.
The denali_setup_data_interface() needs the frequency of clk_x
and the ratio of clk_x / clk.
The latter is currently hardcoded in the driver, like this:
#define DENALI_CLK_X_MULT 6
The IP datasheet requires that clk_x / clk be 4, 5, or 6. I just
chose 6 because it is the most defensive value, but it is not optimal.
By getting the clock rate of both "clk" and "clk_x", the driver can
compute the timing values more precisely.
To not break the existing platforms, the fallback value, 50 MHz is
provided. It is true for all upstreamed platforms.
Currently, denali_dt.c requires a single anonymous clock, but
the Denali User's Guide requires three clocks for this IP:
- clk: controller core clock
- clk_x: bus interface clock
- ecc_clk: clock at which ECC circuitry is run
This commit supports these named clocks to represent the real hardware.
For the backward compatibility, the driver still accepts a single clock
just as before. The clk_x_rate is taken from the clock driver again if
the named clock "clk_x" is available. This will happen only for future
DT, hence the existing DT files are not affected.
projects / u-boot.git / log