Commit bcc51c1512a3 ("ARM: uniphier: move lowlevel debug init code
after page table switch") was intended to support lowlevel debug for
sLD3. Now the sLD3 SoC support has been removed.
Revert it to allow to enable lowlevel debug earlier.
Do not dereference bmp before the check if it is NULL.
The problem was indicated by cppcheck.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Kever Yang [Thu, 3 Aug 2017 12:07:45 +0000 (20:07 +0800)]
rockchip: rk322x: update MACRO for mmc clksel reg
The description for eMMC/SDIO/SDMMC src is not correct,
update the CRU_CLKSEL11_CON value definition according to TRM.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Kever Yang [Fri, 21 Jul 2017 10:21:07 +0000 (18:21 +0800)]
rockchip: rk322x: update dram bank size
The DRAM start address is not 0, so need to update the last bank size
as:
DRAM start addr + DRAM_SIZE - last bank start addr
Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Sysam stmark2 board is a generic and fully (hw and sw) open board, with
a mcf54415 Coldfire CPU, 128MB of DDR2, 16MB of SPI flash and SD card
as non volatile memories, and a wifi module included on-board.
The board is actually used mainly for Coldfire custodian testing activity
related to the mcf5441x Coldfire family.
For further information please see: http://sysam.it/cff_stmark2.html
m68k: mcf5445x: move early ddr init as board-specific
For certain boot types and sbf, for V4 cpu's, an early ddr/sdram init
is required. This patch moves this ddr/sdram early initalization
away from start.S (to be board related).
Philipp Tomsich [Thu, 17 Aug 2017 08:06:59 +0000 (10:06 +0200)]
spl: fix Makefile for NOR, XIP and YMODEM
During the the conversion to $(SPL_TPL_), the SPL_ fragment was
left over for the NOR, XIP and YMODEM boot methods in SPL, making
these unselectable.
This commit fixes this by dropping the spurious 'SPL_' fragment
from each line.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reported-by: Bo Shen <voice.shen@gmail.com> Fixes: f94e643 (spl: consistently use $(SPL_TPL_) to select features for SPL and TPL builds)
Update the tx_delay and rx_delay to match the timing for
rk3399-firefly board to improve the stability of gmac data
transfer.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Simon Glass [Sat, 29 Jul 2017 17:35:28 +0000 (11:35 -0600)]
dm: imx: cm_fx6: Enable more driver model support
Enable driver model for MMC (including BLK), SATA and USB. Note that USB
does not yet work correctly since the nodes are disabled. Hopefully this
can be resolved by the maintainer.
Simon Glass [Sat, 29 Jul 2017 17:35:27 +0000 (11:35 -0600)]
dm: imx: cm_fx6: Add MMC support for CONFIG_BLK
When CONFIG_BLK is enabled our weak board_mmc_init() will not be called.
Since there is no clock driver for MX6 yet, we must manually enable the
clocks.
Simon Glass [Sat, 29 Jul 2017 17:35:20 +0000 (11:35 -0600)]
dm: mmc: fsl_esdhc: Detect init failure
Since esdhc_init_common() can fail it should return an error code. Update
this and also adjust the timeout mechanism to use get_timer(), which is a
more common approach.
Simon Glass [Sat, 29 Jul 2017 17:35:19 +0000 (11:35 -0600)]
dm: mmc: fsl_esdhc: Detect reset failure
Since esdhc_reset() can fail it should return an error code. Update this
and also adjust the timeout mechanism to use get_timer(), which is a more
common approach.
Simon Glass [Sat, 29 Jul 2017 17:35:18 +0000 (11:35 -0600)]
dm: mmc: fsl_esdhc: Set up common versions of operations
Driver model wants to use the core functions in this file but accesses the
driver-private data in a different way. Move the code into new 'common'
functions and set up stubs to call these. Also sort the operations into
alphabetical order for consistency.
Simon Glass [Sat, 29 Jul 2017 17:35:17 +0000 (11:35 -0600)]
dm: mmc: fsl_esdhc: Pass private data to internal functions
With driver model we will not use mmc->priv to access driver-private data.
To accomodate this, update internal functions so that we can pass the
private data directly. This will allow the caller to obtain it as it
prefers.
Simon Glass [Sat, 29 Jul 2017 17:35:12 +0000 (11:35 -0600)]
dm: sata: dw_sata: Set up common versions of operations
Driver model wants to use the core functions in this file but accesses the
uclass-private data in a different way. Move the code into new 'common'
functions and set up stubs to call these.
Simon Glass [Sat, 29 Jul 2017 17:35:06 +0000 (11:35 -0600)]
dm: sata: dw_sata: Pass uc_priv to internal functions
With driver model sata_dev_desc[] does not exist. We still want to use the
common code of this driver so update it to pass struct ahci_uc_priv * to
each of these functions, instead of an integer which must be looked up in
sata_dev_desc[].
Simon Glass [Sat, 29 Jul 2017 17:35:04 +0000 (11:35 -0600)]
dm: sata: dw_sata: Rename 'probe_ent' to uc_priv
With driver model this becomes uclass-private data. Rename the parameter
varable to reflect this.
With the driver model conversion we will not have any exported functions.
Move all exported functions to be together at the end of the file so that
we can deal with them in one #ifdef block.
Simon Glass [Sat, 29 Jul 2017 17:35:03 +0000 (11:35 -0600)]
dm: sata: dw_sata: Move exported functions to the end
With the driver model conversion we will not have any exported functions.
Move all exported functions to be together at the end of the file so that
we can deal with them in one #ifdef block.
Simon Glass [Sat, 29 Jul 2017 17:34:54 +0000 (11:34 -0600)]
dm: blk: Add a generic function for block device commands
Most block devices provide a command (e.g. 'sata', 'scsi', 'ide') and
these commands generally do the same thing. This makes it harder to
maintain this code and keep it consistent.
We now have a block device interface which is either implemented by driver
model (when CONFIG_BLK is enabled) or with a legacy interface. Therefore
it is possible to handle most of what these commands do with generic code.
Add a new generic function to process block-device commands using the
interface type and the current device number for that type.
mmc: gen_atmel_mci: Fix wrong arguments used of bind()
The bind() method is called before the device is probed and so the
device has no private data, should use the platform data, and set up
a new struct to hold the mmc and cfg members.
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Marek Vasut [Fri, 21 Jul 2017 21:22:55 +0000 (23:22 +0200)]
mmc: sh_sdhi: Fix the ACMD handling
The command handling in this driver is awful, esp. because the driver
depends on command numbers to determine whether this is APPCMD or not.
Also, handling of command RSP response types is totally wrong.
This patch at least plucks out some of the custom command encoding and
fixes the APPCMD handling. The RSP handling still needs work, yet that
might not be needed as it turns out the uniphier-sd.c driver is in much
better shape and supports the same IP, so we might be able to just drop
this driver in favor of the uniphier one.
Marek Vasut [Fri, 21 Jul 2017 21:22:54 +0000 (23:22 +0200)]
mmc: sh_sdhi: Add DM and DT probing support
Add MMC DM and DT probing support into the SH SDHI driver.
This patch abstracts out the common bits of the send command
and set ios functions, so they can be used both by DM and non
DM setups and adds the DM probe support.
Marek Vasut [Fri, 21 Jul 2017 21:11:59 +0000 (23:11 +0200)]
mmc: uniphier-sd: Fix long response processing
The long response entry 0..3 LSByte comes from the next response
register MSByte, not from the next response register LSByte. Fix
this to make the driver report correct values in response 136 .
Bin Meng [Sun, 23 Jul 2017 14:44:37 +0000 (07:44 -0700)]
sf: Preserve QE bit when clearing BP# bits for Macronix flash
On some flash (like Macronix), QE (quad enable) bit is in the same
status register as BP# bits, and we need preserve its original value
during a reboot cycle as this is required by some platforms (like
Intel ICH SPI controller working under descriptor mode).
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com>
[Refined code for readability] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Simon Glass [Thu, 3 Aug 2017 18:22:17 +0000 (12:22 -0600)]
env: Adjust the load() method to return an error
The load() methods have inconsistent behaviour on error. Some of them load
an empty default environment. Some load an environment containing an error
message. Others do nothing.
As a step in the right direction, have the method return an error code.
Then the caller could handle this itself in a consistent way.
Simon Glass [Thu, 3 Aug 2017 18:22:10 +0000 (12:22 -0600)]
env: Rename common functions related to setenv()
We are now using an env_ prefix for environment functions. Rename these
commonly used functions, for consistency. Also add function comments in
common.h.
Suggested-by: Wolfgang Denk <wd@denx.de> Signed-off-by: Simon Glass <sjg@chromium.org>
Peng Fan [Tue, 8 Aug 2017 08:21:38 +0000 (16:21 +0800)]
imx: mx6sx: select OSC as uart's clk parent
As M4 is sourcing UART clk from OSC, to make UART work
when M4 is enabled, need to select OSC as clk parent,
24M OSC is enough for debug UART in uboot.
Peng Fan [Tue, 8 Aug 2017 05:34:52 +0000 (13:34 +0800)]
arm: Implement workaround for Cortex-A9 errata 845369
Under very rare timing circumstances, transitioning into streaming
mode might create a data corruption. Present on Two or more processors
or 1 core with ACP, all revisions. This erratum can be worked round
by setting bit[22] of the undocumented Diagnostic Control Register to 1.
Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@konsulko.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Stefano Babic <sbabic@denx.de>
projects / u-boot.git / log