]> git.dujemihanovic.xyz Git - u-boot.git/log
u-boot.git
6 years agoARM: socfpga: Enable DM ethernet on A10
Marek Vasut [Mon, 13 Aug 2018 19:02:54 +0000 (21:02 +0200)]
ARM: socfpga: Enable DM ethernet on A10

Enable DM ethernet framework on Arria10, so that the designware GMAC
can be probed from DT as it should be.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
6 years agoARM: socfpga: Remove adhoc ethernet reset and configuration
Marek Vasut [Mon, 13 Aug 2018 18:06:46 +0000 (20:06 +0200)]
ARM: socfpga: Remove adhoc ethernet reset and configuration

Remove ad-hoc ethernet syscon registers configuration and reset support.
Reset is now handled by the reset framework and the syscon registers are
set in the dwmac_socfpga.c driver.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
6 years agoARM: socfpga: Zap unused reset code
Marek Vasut [Mon, 13 Aug 2018 16:57:08 +0000 (18:57 +0200)]
ARM: socfpga: Zap unused reset code

Remove code from the reset manager that is never called.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
6 years agonet: designware: socfpga: Add Arria10 extras
Marek Vasut [Mon, 13 Aug 2018 17:32:14 +0000 (19:32 +0200)]
net: designware: socfpga: Add Arria10 extras

Add wrapper around the designware MAC driver to handle the SoCFPGA
specific configuration bits. On Arria10, this is configuration of
syscon phy_intf.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
6 years agoARM: socfpga: Zap all the UART handling complexity
Marek Vasut [Sun, 15 Apr 2018 14:29:12 +0000 (16:29 +0200)]
ARM: socfpga: Zap all the UART handling complexity

The UART reset handling is now done via reset framework using the
SoCFPGA reset driver. The UART console assignment is done using the
DM and console framework. Nuke all this comlexity, since it is just
duplicating the same functionality, badly.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
6 years agoARM: socfpga: Enable DM I2C framework on A10
Marek Vasut [Mon, 13 Aug 2018 16:32:38 +0000 (18:32 +0200)]
ARM: socfpga: Enable DM I2C framework on A10

Enable the DM I2C framework on Arria10, so that the DM capable
Designware I2C driver can handle the reset via DM reset framework.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
6 years agoARM: socfpga: Enable DM reset framework on A10
Marek Vasut [Mon, 13 Aug 2018 16:32:38 +0000 (18:32 +0200)]
ARM: socfpga: Enable DM reset framework on A10

Enable the DM reset framework and DM reset driver on Arria10 both
in U-Boot and in SPL. This lets U-Boot parse reset control from DT.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
6 years agoARM: dts: socfpga: Add i2c alias to A10 SoCDK
Marek Vasut [Mon, 13 Aug 2018 18:40:54 +0000 (20:40 +0200)]
ARM: dts: socfpga: Add i2c alias to A10 SoCDK

The A10 SoCDK is missing the I2C bus alias, so DM I2C cannot assign
the I2C bus a bus number. Add the missing alias.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
6 years agoARM: dts: socfpga: Add missing I2C resets
Marek Vasut [Mon, 13 Aug 2018 18:40:44 +0000 (20:40 +0200)]
ARM: dts: socfpga: Add missing I2C resets

The I2Cx resets are missing from DT, so the reset manager
cannot control them. Add the missing DT reset entries.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
6 years agoARM: dts: socfpga: Fix Arria10 GMAC resets
Marek Vasut [Mon, 13 Aug 2018 18:24:20 +0000 (20:24 +0200)]
ARM: dts: socfpga: Fix Arria10 GMAC resets

Add the GMAC0,1 OCP resets, which must also be ungated for those GMACs
to work and add GMAC2 reset and OCP resets which were missing altogether.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
6 years agoARM: dts: socfpga: Add missing UART resets
Marek Vasut [Mon, 13 Aug 2018 16:42:39 +0000 (18:42 +0200)]
ARM: dts: socfpga: Add missing UART resets

The UART0 and UART1 resets are missing from DT, so the reset manager
cannot control them. Add the missing DT reset entries.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
6 years agoARM: dts: socfpga: Flag reset manager on A10 as pre-reloc
Marek Vasut [Mon, 13 Aug 2018 16:42:32 +0000 (18:42 +0200)]
ARM: dts: socfpga: Flag reset manager on A10 as pre-reloc

The Altera reset manager block must be available very early on, since
it controls ie. UART resets. Flag it as pre-reloc.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
6 years agoARM: socfpga: Register the FPGA on A10 in SPL again
Marek Vasut [Mon, 30 Jul 2018 11:58:54 +0000 (13:58 +0200)]
ARM: socfpga: Register the FPGA on A10 in SPL again

The restructuring of the SPL dropped registration of the FPGA in SPL,
readd it.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
Fixes: c859f2a77d98 ("arm: socfpga: Restructure the SPL file")
6 years agoarm: socfpga: gen5: combine some init code for SPL and U-Boot
Simon Goldschmidt [Mon, 13 Aug 2018 19:34:35 +0000 (21:34 +0200)]
arm: socfpga: gen5: combine some init code for SPL and U-Boot

Some of the code for low level system initialization in SPL's
board_init_f() and U-Boot's arch_early_init_r() is the same,
so let's combine it into a single function called from both.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
6 years agoarm: socfpga: fix device trees to work with DM serial
Simon Goldschmidt [Mon, 13 Aug 2018 19:34:33 +0000 (21:34 +0200)]
arm: socfpga: fix device trees to work with DM serial

Device trees need to have the serial console device available
before relocation and require a stdout-path in chosen at least
for SPL to have a console.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
6 years agoarm: socfpga: cyclone5: handle debug uart
Simon Goldschmidt [Mon, 13 Aug 2018 07:33:47 +0000 (09:33 +0200)]
arm: socfpga: cyclone5: handle debug uart

If CONFIG_DEBUG_UART is enabled, correctly initialize
the debug uart before console is initialized to debug
early boot problems in SPL.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
6 years agoarm: socfpga: spl_gen5: clean up malloc_base assignment
Simon Goldschmidt [Mon, 13 Aug 2018 07:33:46 +0000 (09:33 +0200)]
arm: socfpga: spl_gen5: clean up malloc_base assignment

In spl_gen5's board_init_f(), gd->malloc_base is manually assigned
at the end of the function to point to sdram.  This code is outdated
as by now, the heap is switched to sdram by the common function
spl_relocate_stack_gd() if the appropriate defines are set.

As it was, the value assigned manually was directly overwritten by
this common code, so remove the manual assignment.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
6 years agoarm: socfpga: fix SPL on gen5 after moving to DM serial
Simon Goldschmidt [Mon, 13 Aug 2018 07:33:44 +0000 (09:33 +0200)]
arm: socfpga: fix SPL on gen5 after moving to DM serial

There were NULL pointers dereferenced because DM was used
too early without correct initialization:
- malloc_simple returned NULL when called from preloader_console_init()
  because gd->malloc_limit was 0
- uclass_add dereferenced gd->uclass_root members which were NULL because
  dm_init (or one of its relatives) has not been called.

All this is fixed by calling spl_early_init before calling
preloader_console_init.

This fixes commit 73172753f4f3 ("ARM: socfpga: Convert to DM serial")

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
6 years agotravis: give every job a name
Stephen Warren [Mon, 30 Jul 2018 16:19:43 +0000 (10:19 -0600)]
travis: give every job a name

Travis CI now supports giving jobs an explicit name. Do this for all jobs.
This allows more direct control over jobs names than the previous
automatic or implicit naming based on the environment variables or script
text.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
[trini: Update names for jobs added/changed since posting]
Signed-off-by: Tom Rini <trini@konsulko.com>
6 years agoelf: Add support for PPC64 ELF V1 ABI in bootelf
Rob Bracero [Wed, 1 Aug 2018 02:57:42 +0000 (22:57 -0400)]
elf: Add support for PPC64 ELF V1 ABI in bootelf

This update adds PPC64 ELF V1 ABI support to bootelf for both the
program header and section header options. Elf64 support was already
present for the program header option, but it was not handling the
PPC64 ELF V1 ABI case. For the PPC64 ELF V1 ABI, the e_entry field of
the elf header must be treated as function descriptor pointer instead
of a function address. The first doubleword of the function descriptor
is the function's entry address.

Signed-off-by: Rob Bracero <robbracero@gmail.com>
[trini: Fix whitespace issues]
Signed-off-by: Tom Rini <trini@konsulko.com>
6 years agodb410c: Fixup DRAM
Ramon Fried [Tue, 31 Jul 2018 09:29:58 +0000 (12:29 +0300)]
db410c: Fixup DRAM

Call the MSM DRAM detection and fixup function to support
dynamic detection of onboard memory.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
6 years agosnapdragon: Add DRAM detection & FDT fixup
Ramon Fried [Tue, 31 Jul 2018 09:29:57 +0000 (12:29 +0300)]
snapdragon: Add DRAM detection & FDT fixup

Fixup the Linux FDT with the detection of onboard DRAM as
provided by SBL (Secondary boot loader) by reading
the shared-memory region.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
6 years agodisk: part: Don't show redundant error message
Sam Protsenko [Mon, 30 Jul 2018 16:19:27 +0000 (19:19 +0300)]
disk: part: Don't show redundant error message

Underlying API should already print some meaningful error message, so
this one is just brings more noise. E.g. we can see log like this:

    MMC: no card present
    ** Bad device mmc 0 **

Obviously, second error message is unwanted. Let's only print it in case
when DEBUG is defined to keep log short and clear.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
6 years agoenv: Don't show "Failed" error message
Sam Protsenko [Mon, 30 Jul 2018 16:19:26 +0000 (19:19 +0300)]
env: Don't show "Failed" error message

"Failed" error message from env_load() only clutters the log with
unnecessary details, as we already have all needed warnings by that
time. Example:

    Loading Environment from FAT... MMC: no card present
    ** Bad device mmc 0 **
    Failed (-5)

Let's only print it in case when DEBUG is defined to keep log clear.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
6 years agosmbios: fix checkstyle warning
Christian Gmeiner [Mon, 30 Jul 2018 11:22:07 +0000 (13:22 +0200)]
smbios: fix checkstyle warning

Fixes the following checkstyle warning:

WARNING: Missing a blank line after declarations
+               int tmp = smbios_write_funcs[i]((ulong *)&addr, handle++);
+               max_struct_size = max(max_struct_size, tmp);

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agosmbios: fix checkstyle error
Christian Gmeiner [Mon, 30 Jul 2018 11:22:06 +0000 (13:22 +0200)]
smbios: fix checkstyle error

Fixes the following chechpatch -f error:

ERROR: "(foo*)" should be "(foo *)"
+               strncpy((char*)t->uuid, serial_str, sizeof(t->uuid));

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agodoc: FIT image: clarify usage of "compression" property
Simon Goldschmidt [Mon, 30 Jul 2018 10:53:18 +0000 (12:53 +0200)]
doc: FIT image: clarify usage of "compression" property

Compressed images should have their compression property
set to "none" if U-Boot should leave them compressed.

This is especially the case for compressed ramdisks that
should be uncompressed by the kernel only.

Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
6 years agoconfigs: omap3_logic: Disable NAND ID during SPL
Adam Ford [Mon, 30 Jul 2018 01:16:49 +0000 (20:16 -0500)]
configs: omap3_logic: Disable NAND ID during SPL

For these boards, the GPMC timings are more determined by
processor speed/type than the NAND/PoP memory.  This code
is never invoked, so disable the config option, so it doesn't
take the time to compile it in.

Signed-off-by: Adam Ford <aford173@gmail.com>
6 years agoconfigs: omap: Remove dead config CONFIG_SYS_NAND_ADDR
Adam Ford [Sun, 29 Jul 2018 14:51:04 +0000 (09:51 -0500)]
configs: omap: Remove dead config CONFIG_SYS_NAND_ADDR

CONFIG_SYS_NAND_ADDR is defined and never referenced. This patch
removes the dead code.

Signed-off-by: Adam Ford <aford173@gmail.com>
6 years agodoc: README.iscsi: make compatible with restructured text
Heinrich Schuchardt [Sun, 29 Jul 2018 11:50:50 +0000 (13:50 +0200)]
doc: README.iscsi: make compatible with restructured text

The Sphinx documentation system uses restructured text.
Make the README.iscsi file compatible.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
6 years agodoc: add structure to Sphinx generated docs
Heinrich Schuchardt [Sun, 29 Jul 2018 11:45:47 +0000 (13:45 +0200)]
doc: add structure to Sphinx generated docs

Create separate html pages for linker lists, the serial subsystem,
and the EFI subsystem.

Add a table of content.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
6 years agoREADME: U_BOOT_ENV_CALLBACK functions
Heinrich Schuchardt [Sun, 29 Jul 2018 09:08:14 +0000 (11:08 +0200)]
README: U_BOOT_ENV_CALLBACK functions

Describe the interface of environment variable callback functions.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
6 years agodrivers: serial: document on_baudrate()
Heinrich Schuchardt [Sun, 29 Jul 2018 08:41:02 +0000 (10:41 +0200)]
drivers: serial: document on_baudrate()

Add parameter description.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
6 years agoomap3_logic: Fix CONS_INDEX
Adam Ford [Sat, 28 Jul 2018 19:03:21 +0000 (14:03 -0500)]
omap3_logic: Fix CONS_INDEX

The console index for SPL should be 1 not 3 in order to see text during
SPL.

Fixes: 6f6b7cfa89e5 ("Convert all of CONFIG_CONS_INDEX to Kconfig")
Signed-off-by: Adam Ford <aford173@gmail.com>
6 years agosata: fix sata_Probe return value check
Troy Kisky [Fri, 27 Jul 2018 23:45:26 +0000 (16:45 -0700)]
sata: fix sata_Probe return value check

sata_probe returns 1 for failure, so don't checkout for < 0

fixes: f19f1ecb6025 dm: sata: Support driver model with the 'sata' command

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agosandbox: led: use new function to configure default state
Patrick Delaunay [Fri, 27 Jul 2018 14:37:09 +0000 (16:37 +0200)]
sandbox: led: use new function to configure default state

Initialize the led with the default state defined in device tree
in board_init and solve issue with test for led default state.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
6 years agostm32mp1: use new function led default state
Patrick Delaunay [Fri, 27 Jul 2018 14:37:08 +0000 (16:37 +0200)]
stm32mp1: use new function led default state

Initialize the led with the default state defined in device tree.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
6 years agodm: led: move default state support in led uclass
Patrick Delaunay [Fri, 27 Jul 2018 14:37:07 +0000 (16:37 +0200)]
dm: led: move default state support in led uclass

This patch save common LED property "default-state" value
in post bind of LED uclass.
The configuration for this default state is only performed when
led_default_state() is called;
It can be called in your board_init()
or it could added in init_sequence_r[] in future.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
6 years agoRevert "dm: led: auto probe() LEDs with "default-state""
Patrick Delaunay [Fri, 27 Jul 2018 14:37:06 +0000 (16:37 +0200)]
Revert "dm: led: auto probe() LEDs with "default-state""

This reverts commit bc882f5d5c7b4d6ed5e927bf838863af43c786e7.
because this patch adds the probe of LED driver during the
binding phasis. It is not allowed in driver model because
the drivers (clock, pincontrol) needed by the LED driver can
be also probed before the binding of all the device and
it is a source of problems.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
6 years agostm32mp1: add gpio led support
Patrick Delaunay [Fri, 27 Jul 2018 14:37:05 +0000 (16:37 +0200)]
stm32mp1: add gpio led support

This patch add the 4 LED available on the ED1 board and activated
gpio led driver.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
6 years agoMerge branch 'master' of git://git.denx.de/u-boot-usb
Tom Rini [Fri, 10 Aug 2018 11:21:02 +0000 (07:21 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-usb

6 years agobcm968380gerg: Add MAINTAINERS file
Tom Rini [Thu, 9 Aug 2018 15:48:13 +0000 (11:48 -0400)]
bcm968380gerg: Add MAINTAINERS file

Add an initial MAINTAINERS file based on author of the code.

Cc: Philippe Reynes <philippe.reynes@softathome.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
6 years agoMerge git://git.denx.de/u-boot-dm
Tom Rini [Thu, 9 Aug 2018 15:10:41 +0000 (11:10 -0400)]
Merge git://git.denx.de/u-boot-dm

6 years agoMerge branch 'master' of git://git.denx.de/u-boot-mips
Tom Rini [Thu, 9 Aug 2018 00:02:39 +0000 (20:02 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-mips

6 years agodfu: Provide more verbose error message
Sam Protsenko [Fri, 13 Jul 2018 13:35:47 +0000 (16:35 +0300)]
dfu: Provide more verbose error message

It might be useful for user to see some human-readable root cause
message in addition to "configuration failed" message, so that the issue
can be fixed quickly.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
6 years agodfu: Fix memory leak in dfu_init_env_entities()
Sam Protsenko [Fri, 13 Jul 2018 13:35:46 +0000 (16:35 +0300)]
dfu: Fix memory leak in dfu_init_env_entities()

In case of error in dfu_init_env_entities(), env_bkp will leak. Fix it
by providing single return path.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
6 years agodfu: Fix data abort in dfu_free_entities()
Sam Protsenko [Fri, 13 Jul 2018 13:35:45 +0000 (16:35 +0300)]
dfu: Fix data abort in dfu_free_entities()

Commit 5d8fae79163e ("dfu: avoid memory leak") brings a regression which
described below. This patch is effectively reverting that commit, adding
corresponding comment to avoid such regressions in future.

In case of error in dfu_config_entities(), it frees "dfu" array, which
leads to "data abort" in dfu_free_entities(), which tries to free the
same array (and even tries to access it from linked list first). The
issue occurs e.g. when partition table on device does not match
$dfu_alt_info layout:

    => dfu 0 mmc 1
    Couldn't find part #2 on mmc device #1
    DFU entities configuration failed!
    data abort

To fix this issue, do not free "dfu" array in dfu_config_entities(). It
will be freed later in dfu_free_entities().

Tested on BeagleBone Black (where this regression was originally found).

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
6 years agousb: rockchip: on K_FW_LBA_WRITE_10 remove magic block size of 512 bytes
Alberto Panizzo [Thu, 12 Jul 2018 11:05:49 +0000 (13:05 +0200)]
usb: rockchip: on K_FW_LBA_WRITE_10 remove magic block size of 512 bytes

As well as in K_FW_LBA_READ_10 and K_FW_LBA_ERASE_10 take device's
block size from f_rkusb->desc->blksz instead of the fixed 512 bytes.

Keep original behaviour of retry probing assigned block device on
every host request to manage late SDCard plugs.

Signed-off-by: Alberto Panizzo <alberto@amarulasolutions.com>
6 years agousb: rockchip: fix printing csw debug info
Alberto Panizzo [Thu, 12 Jul 2018 11:05:48 +0000 (13:05 +0200)]
usb: rockchip: fix printing csw debug info

Workstation tool was happy while console on device were printing
random numbers..

Signed-off-by: Alberto Panizzo <alberto@amarulasolutions.com>
6 years agousb: rockchip: be quiet on serial port while transferring data
Alberto Panizzo [Thu, 12 Jul 2018 11:05:46 +0000 (13:05 +0200)]
usb: rockchip: be quiet on serial port while transferring data

While downloading or uploading megabytes of data we had thousands of
printf in console like:

transfer 0x10000 bytes done
OR
Uploading 0x1000 bytes

This because transfers are chunked and there is no way on target
side to know the overall transfer size (to print one string per
overall transfer).

All these prints on serial console do slow down significantly the
transfer and does not offer a significant information to the
developer: rkdeveloptool and Rockchip original tool do use small
chunks read/writes on big transfers. This allows on workstation
to print percentage of transfer complete and as well offers to
developer the information about: transfer is running OK.
On error, either the percentage will stop or an error will be shown
on workstation console.

Signed-off-by: Alberto Panizzo <alberto@amarulasolutions.com>
6 years agousb: rockchip: implement K_FW_LBA_ERASE_10 command
Alberto Panizzo [Thu, 12 Jul 2018 11:05:45 +0000 (13:05 +0200)]
usb: rockchip: implement K_FW_LBA_ERASE_10 command

This command is part of the write partition sequence performed by
rkdeveloptool: one partition is first completely erased and
than wrote.

Signed-off-by: Alberto Panizzo <alberto@amarulasolutions.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agousb: rockchip: implement K_FW_LBA_READ_10 command
Alberto Panizzo [Thu, 12 Jul 2018 11:05:44 +0000 (13:05 +0200)]
usb: rockchip: implement K_FW_LBA_READ_10 command

This patch implement reading blocks form selected device with
LBA addressing.

Corresponding command on workstation is:
rkdeveloptool rl <start_blk> <blk_cnt> <file>

While we support reading more than one blocks per K_FW_LBA_READ_10
request, rkdeveloptool and original rockchip tool do perform
chunk reads limiting the maximum size per chunk far lower
than max int values.

Signed-off-by: Alberto Panizzo <alberto@amarulasolutions.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agousb: rockchip: implement skeleton for K_FW_GET_CHIP_VER command
Alberto Panizzo [Thu, 12 Jul 2018 11:05:42 +0000 (13:05 +0200)]
usb: rockchip: implement skeleton for K_FW_GET_CHIP_VER command

Chip Version is a string saved in BOOTROM address space Little Endian.

Ex for rk3288: 0x33323041 0x32303134 0x30383133 0x56323030
which brings:  320A20140813V200

Note that memory version do invert MSB/LSB so printing the char
buffer would show: A02341023180002V

Signed-off-by: Alberto Panizzo <alberto@amarulasolutions.com>
6 years agousb: rockchip: fix command failed on host side due to missing data
Alberto Panizzo [Thu, 12 Jul 2018 11:05:41 +0000 (13:05 +0200)]
usb: rockchip: fix command failed on host side due to missing data

Two consecutive rockusb_tx_write without waiting for request complete
do results in transfer reset of first request and thus no or incomplete
data transfer. This because rockusb_tx_write do use just one USB request
to keep serialization.

So calls like:
rockusb_tx_write_str(emmc_id);
rockusb_tx_write_csw(cbw->tag, cbw->data_transfer_length, CSW_GOOD);

was succeeding only when DEBUG was defined because the time spent
printing debug info was enough for transfer to complete.

This patch fixes the issue adding a simple request complete handler
called rockusb_tx_write_csw to be set as complete handler of in_req
when sending back simple payload + CSW replies to commands.

This new handler will always send CSW_GOOD replies because in case
of error the command callback itself must send back an error CSW as
unique reply to command.

This patch fixes execution of:
$ rkdeveloptool rfi
when DEBUG is not defined.

Signed-off-by: Alberto Panizzo <alberto@amarulasolutions.com>
6 years agogadget: f_thor: fix hang-up with ctrl-c
Seung-Woo Kim [Mon, 4 Jun 2018 06:53:39 +0000 (15:53 +0900)]
gadget: f_thor: fix hang-up with ctrl-c

After the commit 6aae84769a0b ("gadget: f_thor: Fix memory leaks of
usb request and its buffer"), there is hang-up with ctrl-c in some
udc. It is because req of out_ep is freed before out_ep is disabled.
Fix hang-up with ctrl-c by disabling ep before free req of the ep.

Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
6 years agopatman: Correct unit test failure
Simon Glass [Thu, 26 Jul 2018 20:28:16 +0000 (14:28 -0600)]
patman: Correct unit test failure

A recent rename of the function did not rename the test file. Fix this.

Fixes: 12308b128fa (lib: fdtdec: Rename routine fdtdec_setup_memory_size())
Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agolibfdt: Update to latest pylibfdt implementation
Simon Glass [Thu, 26 Jul 2018 20:02:13 +0000 (14:02 -0600)]
libfdt: Update to latest pylibfdt implementation

The enhanced pylibfdt support in U-Boot needed for binman was a
placeholder while upstreaming of this work continued. This is now
complete, so bring in the changes and update the tools as needed.

There are quite a few changes since we decided to split the
implementation into three fdt classes instead of two.

The Fdt.del_node() method was unfortunately missed in this process and
will be dealt with later. It exists in U-Boot but not upstream.

Further syncing of libfdt probably needs to wait until we assess the
code-size impact of all the new checking code on SPL and possibly provide
a way to disable it.

Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agotest: dm: pci: Add cases for finding PCI capability APIs
Bin Meng [Fri, 3 Aug 2018 08:14:53 +0000 (01:14 -0700)]
test: dm: pci: Add cases for finding PCI capability APIs

Add several PCI capability and extended capability ID registers
in the swap_case driver, so that we can add test case for
dm_pci_find_capability() and dm_pci_find_ext_capability().

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agodm: pci: Add APIs to find capability and extended capability
Bin Meng [Fri, 3 Aug 2018 08:14:52 +0000 (01:14 -0700)]
dm: pci: Add APIs to find capability and extended capability

This introduces two new APIs dm_pci_find_capability() and
dm_pci_find_ext_capability() to get PCI capability address and
PCI express extended capability address for a given PCI device.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agopci: Add all known capability and extended capability ids
Bin Meng [Fri, 3 Aug 2018 08:14:51 +0000 (01:14 -0700)]
pci: Add all known capability and extended capability ids

Currently we don't have a complete list of capability and extended
capability ids. This adds them.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agotest: dm: pci: Add tests for mixed static and dynamic devices on the same bus
Bin Meng [Fri, 3 Aug 2018 08:14:50 +0000 (01:14 -0700)]
test: dm: pci: Add tests for mixed static and dynamic devices on the same bus

In the Sandbox test configuration, PCI bus#0 only has static devices
while bus#1 only has dynamic devices. Create a bus#2 that has both
types of devices and test such.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agopci: sandbox: emul: Rename priv structure
Bin Meng [Fri, 3 Aug 2018 08:14:49 +0000 (01:14 -0700)]
pci: sandbox: emul: Rename priv structure

We have "struct sandbox_pci_priv" in pci_sandbox driver. To avoid
confusion, rename the emul's priv to "struct sandbox_pci_emul_priv".

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agotest: dm: pci: Test driver binding with driver data provided
Bin Meng [Fri, 3 Aug 2018 08:14:48 +0000 (01:14 -0700)]
test: dm: pci: Test driver binding with driver data provided

With struct pci_device_id, it's possible to pass a driver data for
bound driver to use. This adds a test case for this functionality.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agosandbox: Update test.dts for dynamic PCI device driver matching
Bin Meng [Fri, 3 Aug 2018 08:14:47 +0000 (01:14 -0700)]
sandbox: Update test.dts for dynamic PCI device driver matching

At present we have two PCI buses in the test configuration. Both
buses have static device-tree config devices. Now we switch the
2nd bus to use dynamic PCI devices for testing.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agopci: sandbox: swap_case: Declare dynamic driver matching
Bin Meng [Fri, 3 Aug 2018 08:14:46 +0000 (01:14 -0700)]
pci: sandbox: swap_case: Declare dynamic driver matching

This adds a U_BOOT_PCI_DEVICE() declaration to the swap_case driver.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agopci: sandbox: Support dynamically binding device driver
Bin Meng [Fri, 3 Aug 2018 08:14:45 +0000 (01:14 -0700)]
pci: sandbox: Support dynamically binding device driver

At present all emulated sandbox pci devices must be present in the
device tree in order to be used. The real world pci uclass driver
supports pci device driver matching, and we should add such support
on sandbox too.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agodm: pci: Assign correct driver data when binding a driver
Bin Meng [Fri, 3 Aug 2018 08:14:44 +0000 (01:14 -0700)]
dm: pci: Assign correct driver data when binding a driver

The correct driver data comes from the matching 'id' instead of
'find_id' in pci_find_and_bind_driver().

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agopci: sandbox: emul: Fix the call to pci_bus_find_devfn()
Bin Meng [Fri, 3 Aug 2018 08:14:43 +0000 (01:14 -0700)]
pci: sandbox: emul: Fix the call to pci_bus_find_devfn()

With the newly added test cases for PCI configuration access, we get:

  => ut dm pci_busdev
  Test: dm_test_pci_busdev: pci.c
  test/dm/pci.c:49, dm_test_pci_busdev(): SANDBOX_PCI_VENDOR_ID == vendor:
  Expected 4660, got 65535
  Test: dm_test_pci_busdev: pci.c (flat tree)
  test/dm/pci.c:49, dm_test_pci_busdev(): SANDBOX_PCI_VENDOR_ID == vendor:
  Expected 4660, got 65535
  Failures: 2

The bug only shows up when bus number is not equal to zero. This is
caused by the plain find_devfn parameter is passed to function call
pci_bus_find_devfn(), inside which find_devfn is compared to devfn
in the device's pplat structure. However pplat->devfn does not carry
the bus number. Fix this by passing find_devfn with bus number masked.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agotest: dm: pci: Add tests for configuration space access
Bin Meng [Fri, 3 Aug 2018 08:14:42 +0000 (01:14 -0700)]
test: dm: pci: Add tests for configuration space access

So far we missed the testing for PCI configuration space access.
This adds tests for it, as well as removing some redundant asserts.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agotest: dm: pci: Test more than one PCI host controller
Bin Meng [Fri, 3 Aug 2018 08:14:41 +0000 (01:14 -0700)]
test: dm: pci: Test more than one PCI host controller

So far there is only one PCI host controller in the sandbox test
configuration. This is normally the case for x86, but it can be
common on other architectures like ARM/PPC to have more than one
PCI host controller in the system.

This updates the case to cover such scenario.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agopci: sandbox: swap_case: Preserve space indicator bit in BAR registers
Bin Meng [Fri, 3 Aug 2018 08:14:40 +0000 (01:14 -0700)]
pci: sandbox: swap_case: Preserve space indicator bit in BAR registers

With the newly added testing of more than one device, we get:

  => ut dm pci_swapcase
  Test: dm_test_pci_swapcase: pci.c
  test/dm/pci.c:88, dm_test_pci_swapcase(): "tHIS IS A tESt" = ptr:
  Expected "tHIS IS A tESt", got "this is a test"
  Test: dm_test_pci_swapcase: pci.c (flat tree)
  test/dm/pci.c:88, dm_test_pci_swapcase(): "tHIS IS A tESt" = ptr:
  Expected "tHIS IS A tESt", got "this is a test"
  Failures: 2

The failure only happens on the 2nd swap_case device on the PCI bus.
The case passes on the 1st device.

It turns out the swap_case driver does not emulate bit#0 in BAR
registers as a read-only bit. This corrects the implementation.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agotest: dm: pci: Test more than one device on the same bus
Bin Meng [Fri, 3 Aug 2018 08:14:39 +0000 (01:14 -0700)]
test: dm: pci: Test more than one device on the same bus

It's quite common to have more than one device on the same PCI bus.
This updates the test case to test such scenario.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agotest: dm: pci: Remove unnecessary steps in dm_test_pci_swapcase()
Bin Meng [Fri, 3 Aug 2018 08:14:38 +0000 (01:14 -0700)]
test: dm: pci: Remove unnecessary steps in dm_test_pci_swapcase()

The check on uclass_get_device() and device_active() is unnecessary
as the follow-up test operations will implicitly probe the driver.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agodm: pci: Fix scanning multi-function device
Bin Meng [Fri, 3 Aug 2018 08:14:37 +0000 (01:14 -0700)]
dm: pci: Fix scanning multi-function device

The flag to control whether to scan multi-function device during
enumeration should be cleared at the beginning of each iteration
if the device's function number equals to zero.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agodm: pci: Extract vendor/device id in child_post_bind()
Bin Meng [Fri, 3 Aug 2018 08:14:36 +0000 (01:14 -0700)]
dm: pci: Extract vendor/device id in child_post_bind()

Currently only devfn is extracted in child_post_bind(). Now that
we have the live-tree version API to look up PCI vendor and device
id from the compatible string, let's extract and save them too.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agodm: core: Add ofnode function to read PCI vendor and device id
Bin Meng [Fri, 3 Aug 2018 08:14:35 +0000 (01:14 -0700)]
dm: core: Add ofnode function to read PCI vendor and device id

We don't have the live-tree version of fdtdec_get_pci_vendev().
This adds the API.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agodm: Correct typos in uclass_first/next_device_check()
Bin Meng [Fri, 3 Aug 2018 08:14:34 +0000 (01:14 -0700)]
dm: Correct typos in uclass_first/next_device_check()

Correct typos in the comment block of uclass_first/next_device_check().

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agopci: Remove 440ep-specific macros
Bin Meng [Fri, 3 Aug 2018 08:14:33 +0000 (01:14 -0700)]
pci: Remove 440ep-specific macros

These macros should not be put in the generic pci.h header file.
Since they are not referenced anywhere, remove them completely.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agobcm968380gerg: add initial support
Philippe Reynes [Mon, 16 Jul 2018 17:06:15 +0000 (19:06 +0200)]
bcm968380gerg: add initial support

This add the initial support of the broadcom reference
board bcm968380gerg with a bcm68380 SoC.

This board has 512 MB of RAM, 128 MB of flash (nand),
2 USB port, 1 UART, 4 ethernet ports and BCM43217 (wifi).

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
6 years agobcm6838: add initial support
Philippe Reynes [Mon, 16 Jul 2018 17:06:14 +0000 (19:06 +0200)]
bcm6838: add initial support

This adds the initial support of the Broadcom BCM6838 SoC familly,
only cpu, dram, uart and leds are supported.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
6 years agobmips: ram: add an option to force the size of the ram
Philippe Reynes [Mon, 16 Jul 2018 17:06:13 +0000 (19:06 +0200)]
bmips: ram: add an option to force the size of the ram

This adds an option to force the size of the ram, and
avoid the detection of ram size.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
6 years agomips: au1x00: Remove support for these SoCs
Tom Rini [Wed, 11 Jul 2018 13:05:25 +0000 (09:05 -0400)]
mips: au1x00: Remove support for these SoCs

The only platform left for the AU1x00 SoCs was the pb1x00 platform, an
apparent clone of the dbau1x00 platform.  As pb1x00 had no listed
maintainer I am assuming that it is also orphaned.  Remove this platform
and then remove the unused SoC support.

Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
6 years agomips: dbau1x00: Remove this board
Tom Rini [Mon, 9 Jul 2018 19:09:55 +0000 (15:09 -0400)]
mips: dbau1x00: Remove this board

This platform has been marked as orphan since June of 2016 and should
have been removed some time ago.  Do so now.

Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
6 years agoconfigs: Resync with savedefconfig
Tom Rini [Wed, 8 Aug 2018 01:40:14 +0000 (21:40 -0400)]
configs: Resync with savedefconfig

Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
6 years agoMerge branch 'master' of git://git.denx.de/u-boot-samsung
Tom Rini [Wed, 8 Aug 2018 01:36:20 +0000 (21:36 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-samsung

6 years agozynqmp: Add avnet_ultra96_rev1_defconfig to the lits of boards
Tom Rini [Tue, 7 Aug 2018 15:36:39 +0000 (11:36 -0400)]
zynqmp: Add avnet_ultra96_rev1_defconfig to the lits of boards

Signed-off-by: Tom Rini <trini@konsulko.com>
6 years agoMerge tag 'xilinx-for-v2018.09-rc2' of git://git.denx.de/u-boot-microblaze
Tom Rini [Tue, 7 Aug 2018 15:32:50 +0000 (11:32 -0400)]
Merge tag 'xilinx-for-v2018.09-rc2' of git://git.denx.de/u-boot-microblaze

Xilinx fixes for v2018.09-rc2

xilinx:
- Add support for zybo z7 and ultra96
- Tune zynq and zynqmp mini configurations
- Move SYS_MALLOC_LEN to Kconfig

fdt
 - make static funcs

gpio:
- Fix soft gpio driver
- Fix Zynq gpio driver by using platdata

microblaze:
- Fix Kconfig entry

spi
- Move ISSI to Kconfig

6 years agoMerge git://git.denx.de/u-boot-marvell
Tom Rini [Tue, 7 Aug 2018 15:32:34 +0000 (11:32 -0400)]
Merge git://git.denx.de/u-boot-marvell

6 years agoMerge branch 'master' of git://git.denx.de/u-boot-video
Tom Rini [Tue, 7 Aug 2018 11:15:20 +0000 (07:15 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-video

6 years agoMerge branch 'agust@denx.de' of git://git.denx.de/u-boot-staging
Tom Rini [Tue, 7 Aug 2018 11:15:11 +0000 (07:15 -0400)]
Merge branch 'agust@denx.de' of git://git.denx.de/u-boot-staging

6 years agoarm: zynq: dts: add spi flash node to zedboard
Luis Araneda [Fri, 27 Jul 2018 08:43:42 +0000 (04:43 -0400)]
arm: zynq: dts: add spi flash node to zedboard

Add a flash node to fix the detection of the memory IC.
With the changes introduced with commit 8fee8845e754
("enf_sf: reuse setup_flash_device instead of open coding it")
the SPI speed is now read from device-tree or a default value
is applied. This replaced the old behavior of setting the
SPI speed to CONFIG_ENV_SPI_MAX_HZ.

As this board didn't have a flash node, the default value
was applied to the SPI speed, producing an error when probing
the flash memory (speed too slow).

Signed-off-by: Luis Araneda <luaraneda@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agogpio: xilinx: Add support for using label property
Michal Simek [Thu, 2 Aug 2018 10:58:54 +0000 (12:58 +0200)]
gpio: xilinx: Add support for using label property

Add support for reading label property from DT and set up bank name
based on that. If label property is not present full device node name is
used.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net>
6 years agogpio: xilinx: Return 0 from xilinx_gpio_set_value
Michal Simek [Mon, 6 Aug 2018 05:42:40 +0000 (07:42 +0200)]
gpio: xilinx: Return 0 from xilinx_gpio_set_value

.set_value functions have no specified return value and gpio_uclass is
not working with it too. But this patch is returning 0 to be in sync
with others DM gpio drivers.

Reported-by: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net>
6 years agogpio: xilinx: Not read output values via regs
Michal Simek [Mon, 23 Jul 2018 10:40:36 +0000 (12:40 +0200)]
gpio: xilinx: Not read output values via regs

Reading registers for finding out output value is not working because
input value is read instead in case of tristate.

Reported-by: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net>
6 years agocommon: fdt: Make fdt_del_subnodes/fdt_del_partition static
Michal Simek [Tue, 31 Jul 2018 12:31:04 +0000 (14:31 +0200)]
common: fdt: Make fdt_del_subnodes/fdt_del_partition static

These functions are only called in this file that's why make them static
to keep static analysers happy.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agogpio: xilinx: Simplify logic in xilinx_gpio_set_value
Michal Simek [Mon, 30 Jul 2018 12:29:27 +0000 (14:29 +0200)]
gpio: xilinx: Simplify logic in xilinx_gpio_set_value

There is no reason to do read/write for if/else separately.

Reported-by: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net>
6 years agogpio: xilinx: Set value before changing direction
Michal Simek [Mon, 30 Jul 2018 08:02:53 +0000 (10:02 +0200)]
gpio: xilinx: Set value before changing direction

Set a value before changing gpio direction. This will ensure that the
old value is not propagated when direction has changed but new value is
not written yet.

Reported-by: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net>
6 years agogpio: xilinx: Remove !DM driver
Michal Simek [Mon, 23 Jul 2018 11:40:01 +0000 (13:40 +0200)]
gpio: xilinx: Remove !DM driver

There is no user for !DM driver that's why remove it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agogpio: xilinx: Find out bank before use in xilinx_gpio_get_function()
Michal Simek [Mon, 23 Jul 2018 10:08:49 +0000 (12:08 +0200)]
gpio: xilinx: Find out bank before use in xilinx_gpio_get_function()

Call xilinx_gpio_get_bank_pin() before use.

Reported-by: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net>
6 years agoarm64: a37xx: add CONFIG_MTD_DEVICE and CONFIG_MTD_PARTITIONS
Vladimir Vid [Fri, 13 Jul 2018 09:56:00 +0000 (11:56 +0200)]
arm64: a37xx: add CONFIG_MTD_DEVICE and CONFIG_MTD_PARTITIONS

CONFIG_MTD_DEVICE is required for the mtdparts command and but it is missing from the mvebu_armada-37xx.h
CONFIG_MTD_PARTITIONS is needed for the ubi support. Some of the Marvell based devices may require this as well.

Signed-off-by: Vladimir Vid <vladimir.vid@sartura.hr>
Signed-off-by: Luka Perkov <luka.perkov@sartura.hr>
Signed-off-by: Stefan Roese <sr@denx.de>