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4 years agoarch: arm: use dt and UCLASS_SYSCON to get gic lpi details
Rayagonda Kokatanur [Sun, 26 Jul 2020 17:07:33 +0000 (22:37 +0530)]
arch: arm: use dt and UCLASS_SYSCON to get gic lpi details

Use device tree and UCLASS_SYSCON driver to get
Generic Interrupt Controller (GIC) lpi address and
maximum GIC redistributors count.

Also update Kconfig to select REGMAP and SYSCON when
GIC_V3_ITS is enabled.

Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agoarch: arm: use dt and UCLASS_IRQ to get gic details
Rayagonda Kokatanur [Sun, 26 Jul 2020 17:07:32 +0000 (22:37 +0530)]
arch: arm: use dt and UCLASS_IRQ to get gic details

Use device tree and UCLASS_IRQ driver to get following
Generic Interrupt Controller (GIC) details,

-GIC Distributor interface (GICD) base address and
-GIC Redistributors (GICR) base address.

Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agoconfigs: ns3: enable tee and optee driver
Rayagonda Kokatanur [Wed, 15 Jul 2020 17:27:20 +0000 (22:57 +0530)]
configs: ns3: enable tee and optee driver

Enable tee and optee drivers.

Signed-off-by: Vikas Gupta <vikas.gupta@broadcom.com>
Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agodrivers: tee: broadcom: add optee based bnxt fw load driver
Vikas Gupta [Wed, 15 Jul 2020 17:27:19 +0000 (22:57 +0530)]
drivers: tee: broadcom: add optee based bnxt fw load driver

Add optee based bnxt fw load driver.
bnxt is Broadcom NetXtreme controller Ethernet card.
This driver is used to load bnxt firmware binary using OpTEE.

Signed-off-by: Vikas Gupta <vikas.gupta@broadcom.com>
Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agoboard: ns3: add development keys used in FIT
Pramod Kumar [Wed, 15 Jul 2020 17:25:41 +0000 (22:55 +0530)]
board: ns3: add development keys used in FIT

Add development keys used in FIT.

Signed-off-by: Pramod Kumar <pramod.kumar@broadcom.com>
Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agoboard: ns3: add FIT image its file
Pramod Kumar [Wed, 15 Jul 2020 17:25:40 +0000 (22:55 +0530)]
board: ns3: add FIT image its file

Add FIT image its file.

Signed-off-by: Pramod Kumar <pramod.kumar@broadcom.com>
Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agoconfigs: ns3: enable FIT config
Rayagonda Kokatanur [Wed, 15 Jul 2020 17:25:39 +0000 (22:55 +0530)]
configs: ns3: enable FIT config

Enable FIT config for NS3.

Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agoconfigs: ns3: enable sp805 watchdog driver
Rayagonda Kokatanur [Wed, 15 Jul 2020 17:23:07 +0000 (22:53 +0530)]
configs: ns3: enable sp805 watchdog driver

Enable sp805 watchdog driver for ns3.

Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agoconfigs: ns3: enable EXT4 and FAT fs support
Rayagonda Kokatanur [Wed, 15 Jul 2020 17:23:06 +0000 (22:53 +0530)]
configs: ns3: enable EXT4 and FAT fs support

Enable EXT4 and FAT fs support for ns3.

Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agoconfigs: ns3: enable gpt commands
Rayagonda Kokatanur [Wed, 15 Jul 2020 17:23:05 +0000 (22:53 +0530)]
configs: ns3: enable gpt commands

Enable gpt commands for ns3.

Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agoconfigs: ns3: enable mmc commands
Rayagonda Kokatanur [Wed, 15 Jul 2020 17:23:04 +0000 (22:53 +0530)]
configs: ns3: enable mmc commands

Enable mmc commands for NS3.

Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agoconfigs: ns3: enable BCM IPROC mmc driver
Rayagonda Kokatanur [Wed, 15 Jul 2020 17:23:03 +0000 (22:53 +0530)]
configs: ns3: enable BCM IPROC mmc driver

Enable BCM IPROC mmc driver ns3.
Enable DMA for MMC Host to have better reads and writes.

Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agodt-bindings: pinctrl: add ns3 pads definition
Rayagonda Kokatanur [Wed, 15 Jul 2020 17:23:02 +0000 (22:53 +0530)]
dt-bindings: pinctrl: add ns3 pads definition

Add NS3 pads definitions.

Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agoconfigs: ns3: enable pinctrl driver
Rayagonda Kokatanur [Wed, 15 Jul 2020 17:23:01 +0000 (22:53 +0530)]
configs: ns3: enable pinctrl driver

Enable pinctrl driver for ns3.

Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agogpio: do not include <asm/arch/gpio.h> on TARGET_BCMNS3
Rayagonda Kokatanur [Tue, 5 May 2020 17:56:47 +0000 (23:26 +0530)]
gpio: do not include <asm/arch/gpio.h> on TARGET_BCMNS3

As no gpio.h is defined for this architecture, to avoid
compilation failure, do not include <asm/arch/gpio.h> for
arch bcmns3.

Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agodrivers: gpio: add broadcom iproc gpio driver support
Rayagonda Kokatanur [Tue, 5 May 2020 17:56:46 +0000 (23:26 +0530)]
drivers: gpio: add broadcom iproc gpio driver support

Add gpio driver support for Broadcom iproc-based socs.

Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Signed-off-by: Sheetal Tigadoli <sheetal.tigadoli@broadcom.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agoMAINTAINERS: update maintainers for broadcom ns3 platform
Rayagonda Kokatanur [Wed, 15 Jul 2020 17:19:09 +0000 (22:49 +0530)]
MAINTAINERS: update maintainers for broadcom ns3 platform

Update MAINTAINERS for broadcom ns3 platform (TARGET_NS3).

Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agodoc: add README doc for bcmns3 platform
Rayagonda Kokatanur [Wed, 15 Jul 2020 17:19:08 +0000 (22:49 +0530)]
doc: add README doc for bcmns3 platform

Add README doc for bcmns3 platform.

Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agoinclude/configs: ns3: add support for flashing images
Bharat Gooty [Wed, 15 Jul 2020 17:19:07 +0000 (22:49 +0530)]
include/configs: ns3: add support for flashing images

Add support for flashing images into QSPI and eMMC.

Signed-off-by: Bharat Gooty <bharat.gooty@broadcom.com>
Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agoinclude/configs: ns3: add env variables for Linux boot
Bharat Gooty [Wed, 15 Jul 2020 17:19:06 +0000 (22:49 +0530)]
include/configs: ns3: add env variables for Linux boot

Add env variables and commands for booting Linux.

Signed-off-by: Bharat Gooty <bharat.gooty@broadcom.com>
Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agoboard: ns3: limit U-boot relocation within 16MB memory
Bharat Kumar Reddy Gooty [Wed, 15 Jul 2020 17:19:05 +0000 (22:49 +0530)]
board: ns3: limit U-boot relocation within 16MB memory

By default relocation happens to a higher address of DDR,
i.e, DDR start + DDR size.

U-Boot shall be used to collect the ramdump.
Restrict U-Boot to use only the 16MB memory, so that this
memory can be reserved. Limit relocation to happen within
16MB memory, start 0xFF00_0000 and end 0x1_0000_0000

Signed-off-by: Bharat Kumar Reddy Gooty <bharat.gooty@broadcom.com>
Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agoboard: ns3: define ddr memory layout
Rayagonda Kokatanur [Wed, 15 Jul 2020 17:19:04 +0000 (22:49 +0530)]
board: ns3: define ddr memory layout

Add both DRAM banks memory information and
the corresponding MMU page table mappings.

Signed-off-by: Bharat Kumar Reddy Gooty <bharat.gooty@broadcom.com>
Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agodt-bindings: memory: ns3: add ddr memory definition
Rayagonda Kokatanur [Wed, 15 Jul 2020 17:19:03 +0000 (22:49 +0530)]
dt-bindings: memory: ns3: add ddr memory definition

Add ddr memory definitions.

Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agoconfigs: ns3: enable GIC_V3 ITS
Rayagonda Kokatanur [Wed, 15 Jul 2020 17:19:02 +0000 (22:49 +0530)]
configs: ns3: enable GIC_V3 ITS

Enables the Generic Interrupt Controller (GIC) V3
Interrupt Translation Service (ITS) Locality-specific Peripheral
Interrupts (LPI) configuration table and LPI table.

Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Signed-off-by: Bharat Kumar Reddy Gooty <bharat.gooty@broadcom.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agoboard: ns3: program GIC LPI tables
Rayagonda Kokatanur [Wed, 15 Jul 2020 17:19:01 +0000 (22:49 +0530)]
board: ns3: program GIC LPI tables

U-boot programs the GIC LPI configuration tables and enables
the LPI table.

Signed-off-by: Bharat Kumar Reddy Gooty <bharat.gooty@broadcom.com>
Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agoboard: ns3: default reset type to L3
Rayagonda Kokatanur [Wed, 15 Jul 2020 17:19:00 +0000 (22:49 +0530)]
board: ns3: default reset type to L3

Default "reset" from U-Boot to L3 reset.
"reset" command with argument will trigger L1 reset.

Signed-off-by: Rajesh Ravi <rajesh.ravi@broadcom.com>
Signed-off-by: Bharat Kumar Reddy Gooty <bharat.gooty@broadcom.com>
Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agoboard: ns3: add api to save boot parameters passed from BL31
Abhishek Shah [Wed, 15 Jul 2020 17:18:59 +0000 (22:48 +0530)]
board: ns3: add api to save boot parameters passed from BL31

Add API to save boot parameters passed from BL31

Use assembly implementation of save_boot_params instead of c function.
Because generally ATF does not set up SP_EL2 on exiting.
Thus, usage of a C function immediately after exiting with no stack
setup done by ATF explicitly, may cause SP_EL2 to be not sane,
which in turn causes a crash if this boot was not lucky to get
an SP_EL2 in valid range. Replace C implementation with assembly one
which does not use stack this early, and let u-boot to set up its stack
later.

Signed-off-by: Abhishek Shah <abhishek.shah@broadcom.com>
Signed-off-by: Rajesh Ravi <rajesh.ravi@broadcom.com>
Signed-off-by: Vladimir Olovyannikov <vladimir.olovyannikov@broadcom.com>
Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agodt-bindings: memory: ns3: add memory definitions
Rayagonda Kokatanur [Wed, 15 Jul 2020 17:18:58 +0000 (22:48 +0530)]
dt-bindings: memory: ns3: add memory definitions

Add NS3 memory definitions.

Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agoconfigs: ns3: enable clock subsystem
Rayagonda Kokatanur [Wed, 15 Jul 2020 17:18:57 +0000 (22:48 +0530)]
configs: ns3: enable clock subsystem

Enable clock subsystem for ns3.

Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agoarm: cpu: armv8: add L3 memory flush support
Rayagonda Kokatanur [Wed, 15 Jul 2020 17:18:56 +0000 (22:48 +0530)]
arm: cpu: armv8: add L3 memory flush support

Add L3 memory flush support for NS3.

Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agoboard: ns3: add support for Broadcom Northstar 3
Rayagonda Kokatanur [Wed, 15 Jul 2020 17:18:55 +0000 (22:48 +0530)]
board: ns3: add support for Broadcom Northstar 3

Add support for Broadcom Northstar 3 SoC.
NS3 is a octo-core 64-bit ARMv8 Cortex-A72 processors
targeting a broad range of networking applications.

Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agoMerge branch '2020-07-28-misc-soc-improvements'
Tom Rini [Wed, 29 Jul 2020 13:26:11 +0000 (09:26 -0400)]
Merge branch '2020-07-28-misc-soc-improvements'

- Assorted MediaTek improvements
- s5p4418 support
- QEMU ARM platform improvements
- Qualcomm IPQ40xx support

4 years agoboard: mediatek: Add support for UniElec U7623 board
David Woodhouse [Sun, 12 Jul 2020 22:33:03 +0000 (23:33 +0100)]
board: mediatek: Add support for UniElec U7623 board

This is an MT7623A-based board, very similar to the Banana Pi R2.

http://www.unielecinc.com/q/news/cn/p/product/detail.html?qd_guid=OjXwKCaRlN

Signed-off-by: David Woodhouse <dwmw2@infradead.org>
4 years agoboard: mediatek: Use CONFIG_DEFAULT_FDT_FILE for default environment
David Woodhouse [Sun, 12 Jul 2020 22:33:02 +0000 (23:33 +0100)]
board: mediatek: Use CONFIG_DEFAULT_FDT_FILE for default environment

Rather than hard-coding it to the Banana Pi R2.

Signed-off-by: David Woodhouse <dwmw2@infradead.org>
4 years agoboard: mediatek: fix mmc_get_boot_dev() for platforms without external SD
David Woodhouse [Sun, 12 Jul 2020 22:33:01 +0000 (23:33 +0100)]
board: mediatek: fix mmc_get_boot_dev() for platforms without external SD

On the UniElec U7623 board there is no external SD slot and the preloader
doesn't fill in the magic field at 0x81dffff0 to indicate that it was
booted from eMMC.

Signed-off-by: David Woodhouse <dwmw2@infradead.org>
4 years agoarm: add (default) config for nanopi2 board
Stefan Bosch [Fri, 10 Jul 2020 17:07:38 +0000 (19:07 +0200)]
arm: add (default) config for nanopi2 board

Changes in relation to FriendlyARM's U-Boot nanopi2-v2016.01:
- Configuration changed, mainly several "CONFIG_..." moved from
  s5p4418_nanopi2.h to s5p4418_nanopi2_defconfig and USB related
  configs removed because USB is not supported yet.
- s5p4418_nanopi2.h: "CONFIG_" removed from several s5p4418/nanopi2
  specific defines because the appropriate values do not need to be
  configurable.
- pinctrl is supported now, therefore "CONFIG_PINCTRL=y" added to
  s5p4418_nanopi2_defconfig.

Signed-off-by: Stefan Bosch <stefan_b@posteo.net>
4 years agoarm: add support for SoC s5p4418 (cpu) / nanopi2 board
Stefan Bosch [Fri, 10 Jul 2020 17:07:37 +0000 (19:07 +0200)]
arm: add support for SoC s5p4418 (cpu) / nanopi2 board

Changes in relation to FriendlyARM's U-Boot nanopi2-v2016.01:
- SPL not supported yet --> no spl-dir in arch/arm/cpu/armv7/s5p4418/.
  Appropriate line in Makefile removed.
- cpu.c: '#include <cpu_func.h>' added.
- arch/arm/cpu/armv7/s5p4418/u-boot.lds removed, is not required
  anylonger.
- "obj-$(CONFIG_ARCH_NEXELL) += s5p-common/" added to
  arch/arm/cpu/armv7/Makefile since s5p-common/pwm.c is used instead
  of drivers/pwm/pwm-nexell.c.
- s5p4418.dtsi: '#include "../../../include/generated/autoconf.h"'
  removed, is not necessary, error at out-of-tree building.
  '#ifdef CONFIG_CPU_NXP4330'-blocks (2x) removed. Some minor changes
  regarding mmc. 'u-boot,dm-pre-reloc' added to dp0 because of added
  DM_VIDEO support.
- board/s5p4418/ renamed to board/friendlyarm/
- All s5p4418-boards except nanopi2 removed because there is no
  possibility to test the other boards.
- Kconfig: Changes to have a structure like mach-bcm283x (RaspberryPi),
  e.g. "config ..." entries moved from/to other Kconfig.
- "CONFIG_" removed from several s5p4418/nanopi2 specific defines
  because the appropriate values do not need to be configurable.
- nanopi2/board.c: All getenv(), getenv_ulong(), setenv() and saveenv()
  renamed to env_get(), env_get_ulong(), env_set() and env_save(),
  respectively. MACH_TYPE_S5P4418 is not defined anymore, therefore
  appropriate code removed (not necessary for DT-kernels).
- nanopi2/onewire.c: All crc8() renamed to crc8_ow() because crc8() is
  already defined in lib/crc8.c (with different parameters).
- dts: "nexell,s5pxx18-i2c" used instead of "i2c-gpio", i2c0 and
  i2c1 added. gmac-, ehci- and dwc2otg-entries removed because the
  appropriate functionality is not supported yet. New mmc-property
  "mmcboost" added.
  s5p4418-pinctrl.dtsi: gmac-entries removed, mmc- and i2c-entries
  added.
- '#ifdef CONFIG...' changed to 'if (IS_ENABLED(CONFIG...))' where
  possible (and similar).

Signed-off-by: Stefan Bosch <stefan_b@posteo.net>
4 years agovideo: add nexell video driver (display/video driver)
Stefan Bosch [Fri, 10 Jul 2020 17:07:36 +0000 (19:07 +0200)]
video: add nexell video driver (display/video driver)

Changes in relation to FriendlyARM's U-Boot nanopi2-v2016.01:
- nexell_display.c: Changed to DM, CONFIG_FB_ADDR can not be used
  anymore because framebuffer is allocated by video_reserve() in
  video-uclass.c. Therefore code changed appropriately.
- '#ifdef CONFIG...' changed to 'if (IS_ENABLED(CONFIG...))' where
  possible (and similar).
- livetree API (dev_read_...) is used instead of fdt one (fdt...).

Signed-off-by: Stefan Bosch <stefan_b@posteo.net>
4 years agovideo: add nexell video driver (soc: dpc, makefile)
Stefan Bosch [Fri, 10 Jul 2020 17:07:35 +0000 (19:07 +0200)]
video: add nexell video driver (soc: dpc, makefile)

Low level functions for DPC (Display Controller) and Makefile for all
nexell video low level functions.

Signed-off-by: Stefan Bosch <stefan_b@posteo.net>
4 years agovideo: add nexell video driver (soc: lvds, hdmi)
Stefan Bosch [Fri, 10 Jul 2020 17:07:34 +0000 (19:07 +0200)]
video: add nexell video driver (soc: lvds, hdmi)

Low level functions for LVDS and HDMI display interfaces.

Signed-off-by: Stefan Bosch <stefan_b@posteo.net>
4 years agovideo: add nexell video driver (soc: mlc, mipi)
Stefan Bosch [Fri, 10 Jul 2020 17:07:33 +0000 (19:07 +0200)]
video: add nexell video driver (soc: mlc, mipi)

Low level functions for MLC (Multi Layer Control) and MIPI (Mobile
Industry Processor Interface).

Signed-off-by: Stefan Bosch <stefan_b@posteo.net>
4 years agovideo: add nexell video driver (soc: displaytop)
Stefan Bosch [Fri, 10 Jul 2020 17:07:32 +0000 (19:07 +0200)]
video: add nexell video driver (soc: displaytop)

Low level functions for DisplayTop (Display Topology).

Signed-off-by: Stefan Bosch <stefan_b@posteo.net>
4 years agopwm: add driver for nexell
Stefan Bosch [Fri, 10 Jul 2020 17:07:31 +0000 (19:07 +0200)]
pwm: add driver for nexell

Changes in relation to FriendlyARM's U-Boot nanopi2-v2016.01:
- Since drivers/pwm/pwm-nexell.c is an adapted version of
  s5p-common/pwm.c an appropriately changed version of s5p-common/pwm.c
  is used instead. Therefore arch/arm/mach-s5pc1xx/include/mach/pwm.h
  copied to arch/arm/mach-nexell/include/mach and s5p-common/Makefile
  changed appropriately.
- '#ifdef CONFIG...' changed to 'if (IS_ENABLED(CONFIG...))' where
  possible (and similar).

Signed-off-by: Stefan Bosch <stefan_b@posteo.net>
4 years agopinctrl: add nexell driver
Stefan Bosch [Fri, 10 Jul 2020 17:07:30 +0000 (19:07 +0200)]
pinctrl: add nexell driver

Changes in relation to FriendlyARM's U-Boot nanopi2-v2016.01:
- livetree API (dev_read_...) is used instead of fdt one (fdt...).
- doc/device-tree-bindings/pinctrl/nexell,s5pxx18-pinctrl.txt added.

Signed-off-by: Stefan Bosch <stefan_b@posteo.net>
4 years agommc: add nexell driver
Stefan Bosch [Fri, 10 Jul 2020 17:07:29 +0000 (19:07 +0200)]
mmc: add nexell driver

Changes in relation to FriendlyARM's U-Boot nanopi2-v2016.01:
- driver changed to DM.
- pinctrl-driver/dt is used now instead of configuring the mmc I/O-pins
  in the mmc-driver.
- nexell_dwmmc_ofdata_to_platdata() reworked, i.e. valid default values
  are used now (where possible) and the appropriate if-blocks have
  been removed.
- new dt-property "mmcboost" is used now instead of "CONFIG_BOOST_MMC"
  which was not defined anywhere.

Signed-off-by: Stefan Bosch <stefan_b@posteo.net>
4 years agoi2c: add nexell driver
Stefan Bosch [Fri, 10 Jul 2020 17:07:28 +0000 (19:07 +0200)]
i2c: add nexell driver

Changes in relation to FriendlyARM's U-Boot nanopi2-v2016.01:
- i2c/nx_i2c.c: Some adaptions mainly because of changes in
  "struct udevice".
- several Bugfixes in nx_i2c.c.
- the driver has been for s5p6818 only. Code extended appropriately
  in order s5p4418 is also working.
- "probe_chip" added.
- pinctrl-driver/dt is used instead of configuring the i2c I/O-pins
  in the i2c-driver.
- '#ifdef CONFIG...' changed to 'if (IS_ENABLED(CONFIG...))' where
  possible (and similar).
- livetree API (dev_read_...) is used instead of fdt one (fdt...).

Signed-off-by: Stefan Bosch <stefan_b@posteo.net>
4 years agogpio: add nexell driver
Stefan Bosch [Fri, 10 Jul 2020 17:07:27 +0000 (19:07 +0200)]
gpio: add nexell driver

Changes in relation to FriendlyARM's U-Boot nanopi2-v2016.01:
- livetree API (dev_read_...) is used instead of fdt one (fdt...).

Signed-off-by: Stefan Bosch <stefan_b@posteo.net>
4 years agoarm: add mach-nexell (all files except header files)
Stefan Bosch [Fri, 10 Jul 2020 17:07:26 +0000 (19:07 +0200)]
arm: add mach-nexell (all files except header files)

Changes in relation to FriendlyARM's U-Boot nanopi2-v2016.01:
- SPL not supported yet --> no spl-directory in arch/arm/mach-nexell.
  Appropriate line in Makefile removed.
- clock.c: 'section(".data")' added to declaration of clk_periphs[] and
  core_hz.
- Kconfig: Changes to have a structure like in mach-bcm283x/Kconfig,
  e.g. "config ..." entries moved from other Kconfig.
- timer.c: 'section(".data")' added to declaration of timestamp and
  lastdec.
- arch/arm/mach-nexell/serial.c removed because this is for the UARTs
  of the S5P6818 SoC which is not supported yet. S5P4418 UARTs are
  different, here the (existing) PL011-code is used.
- '#ifdef CONFIG...' changed to 'if (IS_ENABLED(CONFIG...))' where
  possible (and similar).

Signed-off-by: Stefan Bosch <stefan_b@posteo.net>
4 years agoarm: add mach-nexell (header files)
Stefan Bosch [Fri, 10 Jul 2020 17:07:25 +0000 (19:07 +0200)]
arm: add mach-nexell (header files)

Changes in relation to FriendlyARM's U-Boot nanopi2-v2016.01:
- DM_VIDEO support (display_dev.h).
- boot0.h added, handles NSIH --> tools/nexell obsolete.
- gpio.h: Include-path to errno.h changed.

Signed-off-by: Stefan Bosch <stefan_b@posteo.net>
4 years agoarm: qemu: override flash accessors to use virtualizable instructions
Ard Biesheuvel [Tue, 7 Jul 2020 10:07:11 +0000 (12:07 +0200)]
arm: qemu: override flash accessors to use virtualizable instructions

Some instructions in the ARM ISA have multiple output registers, such
as ldrd/ldp (load pair), where two registers are loaded from memory,
but also ldr with indexing, where the memory base register is incremented
as well when the value is loaded to the destination register.

MMIO emulation under KVM is based on using the architecturally defined
syndrome information that is provided when an exception is taken to the
hypervisor. This syndrome information describes whether the instruction
that triggered the exception is a load or a store, what the faulting
address was, and which register was the destination register.

This syndrome information can only describe one destination register, and
when the trapping instruction is one with multiple outputs, KVM throws an
error like

  kvm [615929]: Data abort outside memslots with no valid syndrome info

on the host and kills the QEMU process with the following error:

  U-Boot 2020.07-rc3-00208-g88bd5b179360-dirty (Jun 06 2020 - 11:59:22 +0200)

  DRAM:  1 GiB
  Flash: error: kvm run failed Function not implemented
  R00=00000001 R01=00000040 R02=7ee0ce20 R03=00000000
  R04=7ffd9eec R05=00000004 R06=7ffda3f8 R07=00000055
  R08=7ffd9eec R09=7ef0ded0 R10=7ee0ce20 R11=00000000
  R12=00000004 R13=7ee0cdf8 R14=00000000 R15=7ff72d08
  PSR=200001d3 --C- A svc32
  QEMU: Terminated

This means that, in order to run U-Boot in QEMU under KVM, we need to
avoid such instructions when accessing emulated devices. For the flash
in particular, which is a hybrid between a ROM (backed by a read-only
KVM memslot) when in array mode, and an emulated MMIO device (when in
write mode), we need to take care to only use instructions that KVM can
deal with when they trap.

So override the flash read accessors that are used when running on QEMU
under KVM. Note that the the 64-bit wide read and write accessors have
been omitted: they are never used when running under QEMU given that it
does not emulate CFI flash that supports it.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
4 years agoarm: qemu: disable the EFI workaround for older GRUB
Ard Biesheuvel [Tue, 7 Jul 2020 10:07:10 +0000 (12:07 +0200)]
arm: qemu: disable the EFI workaround for older GRUB

The QEMU/mach-virt targeted port of u-boot currently only runs on
QEMU under TCG emulation, which does not model the caches at all,
and so no users can exist that are relying on the GRUB hack for
EFI boot.

We will shortly enable support for running under KVM, but the GRUB
hack (which disables all caches without doing cache cleaning by VA
during ExitBootServices()) is likely to cause more problems than it
solves, given that KVM hosts require correct maintenance if they
incorporate non-architected system caches.

So let's disable the GRUB hack by default on the QEMU/mach-virt
port.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
4 years agoarm: qemu: implement enable_caches()
Ard Biesheuvel [Tue, 7 Jul 2020 10:07:09 +0000 (12:07 +0200)]
arm: qemu: implement enable_caches()

Add an override for enable_caches to enable the I and D caches, along
with the cached 1:1 mapping of all of DRAM. This is needed for running
U-Boot under virtualization with QEMU/kvm.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
4 years agoarm: qemu: enable LPAE on 32-bit
Ard Biesheuvel [Tue, 7 Jul 2020 10:07:08 +0000 (12:07 +0200)]
arm: qemu: enable LPAE on 32-bit

QEMU's mach-virt machine only supports selecting CPU models that
implement the virtualization extensions, and are therefore guaranteed
to support LPAE as well.

Initially, QEMU would not allow emulating these CPUs running in HYP
mode (or EL2, for AArch64), but today, it also contains a complete
implementation of the virtualization extensions themselves.

This means we could be running U-Boot in HYP mode, in which case the
LPAE long descriptor page table format is the only format that is
supported. If we are not running in HYP mode, we can use either.

So let's enable CONFIG_ARMV7_LPAE for qemu_arm_defconfig so that we
get the best support for running with the MMU and caches enabled at
any privilege level.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Acked-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
4 years agoarm: enable allocate-on-read for LPAE's DCACHE_WRITEBACK/_WRITETHROUGH
Ard Biesheuvel [Tue, 7 Jul 2020 10:07:07 +0000 (12:07 +0200)]
arm: enable allocate-on-read for LPAE's DCACHE_WRITEBACK/_WRITETHROUGH

The LPAE versions of DCACHE_WRITEBACK and DCACHE_WRITETHROUGH are currently
defined as no-allocate for both reads and writes, which deviates from the
non-LPAE definition, and mostly defeats the purpose of enabling the caches
in the first place.

So align LPAE with !LPAE, and enable allocate-on-read for both. And while
at it, add some clarification about the meaning of the chosen values.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
4 years agomsm_gpio: Add support for Qualcomm IPQ40xx
Robert Marko [Mon, 6 Jul 2020 08:37:56 +0000 (10:37 +0200)]
msm_gpio: Add support for Qualcomm IPQ40xx

Snapdragon SoCs and IPQ40xx use common TLMM IP,
so existing driver supports IPQ40xx as well.

So lets simply add a compatible for IPQ40xx.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Reviewed-By: Ramon Fried <rfried.dev@gmail.com>
4 years agomsm_serial: Read bit rate register value from DT
Robert Marko [Mon, 6 Jul 2020 08:37:55 +0000 (10:37 +0200)]
msm_serial: Read bit rate register value from DT

IPQ40xx and currently supported Snapdragon boards don't use the same one
so enable reading it from DT, if no DT property is found default value
is the same as the previous define.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Reviewed-By: Ramon Fried <rfried.dev@gmail.com>
4 years agoarm: Add support for Qualcomm IPQ40xx family
Robert Marko [Mon, 6 Jul 2020 08:37:54 +0000 (10:37 +0200)]
arm: Add support for Qualcomm IPQ40xx family

This introduces initial support for the popular Qualcomm
IPQ40x8 and IPQ40x9 WiSoC series.

IPQ40xx series have 4x Cortex A7 ARM-v7A cores.
Supported are: IPQ4018, IPQ4019, IPQ4028 and IPQ4029.

IPQ40x8 and IPQ40x9 use the same cores, but differ in
addressable RAM size (1GB for IPQ40x9 and 256MB for IPQ40x8)
and supported peripherals (IPQ40x8 lacks RGMII, LCD controller
and EMMC/SDHCI controllers).

IQP4028/IPQ4029 models differ from IPQ4018/IPQ4019 only
by their rated temperatures rates with IPQ402X models being
rated for wider temperature ranges.

Initially this supports:
* Simple clock driver (Only for UART1 now, will be extended)
* Pinctrl driver (Supports UARTX and GPIO now, will be extended)
* GPIOs already supported by msm_gpio driver with updates
* UARTs already supported by serial_msm driver with updates

Further peripherals will come in later patches.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
4 years agopinctrl: mediatek: add PUPD/R0/R1 support for MT7623
David Woodhouse [Fri, 19 Jun 2020 11:40:20 +0000 (12:40 +0100)]
pinctrl: mediatek: add PUPD/R0/R1 support for MT7623

The pins for the MMC controller weren't being set up correctly because the
pinctrl driver only sets the GPIO pullup/pulldown config and doesn't
handle the special cases with PUPD/R0/R1 control.

Signed-off-by: David Woodhouse <dwmw2@infradead.org>
Tested-by: Frank Wunderlich <frank-w@public-files.de>
4 years agoarm: dts: mediatek: enable sgmii mode and mt7531 switch for mt7629
MarkLee [Fri, 19 Jun 2020 11:17:17 +0000 (19:17 +0800)]
arm: dts: mediatek: enable sgmii mode and mt7531 switch for mt7629

This patch enable sgmii mode and mt7531 switch support in mt7629
ethernet dts node

Signed-off-by: MarkLee <Mark-MC.Lee@mediatek.com>
4 years agoeth: mtk-eth: enable mt7629 sgmii mode support in mediatek eth driver
MarkLee [Fri, 19 Jun 2020 11:17:16 +0000 (19:17 +0800)]
eth: mtk-eth: enable mt7629 sgmii mode support in mediatek eth driver

The sgmii mode init flow is almost the same for all mediatek SoC, the
only difference is the register offset(SGMSYS_GEN2_SPEED) is 0x2028
in the old chip(mt7622) but changed to 0x128 for the newer chip(mt7629
and the following chips).

Signed-off-by: MarkLee <Mark-MC.Lee@mediatek.com>
4 years agoMerge branch '2020-07-28-Kconfig-migrations'
Tom Rini [Tue, 28 Jul 2020 22:27:34 +0000 (18:27 -0400)]
Merge branch '2020-07-28-Kconfig-migrations'

- Migration of more symbols to Kconfig

4 years agoconfigs: migrate CONFIG_SPL_LOAD_FIT_ADDRESS to defconfigs
Peng Fan [Mon, 6 Jul 2020 07:35:01 +0000 (15:35 +0800)]
configs: migrate CONFIG_SPL_LOAD_FIT_ADDRESS to defconfigs

Done with:
./tools/moveconfig.py -S SPL_LOAD_FIT_ADDRESS
./tools/moveconfig.py -S SPL_LOAD_FIT_ADDRESS -H

Signed-off-by: Peng Fan <peng.fan@nxp.com>
[trini: A few more migrations]
Signed-off-by: Tom Rini <trini@konsulko.com>
4 years agoKconfig: add SPL_LOAD_FIT_ADDRESS
Peng Fan [Mon, 6 Jul 2020 07:35:00 +0000 (15:35 +0800)]
Kconfig: add SPL_LOAD_FIT_ADDRESS

Add SPL_LOAD_FIT_ADDRESS to make user could add it in defconfig

Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agoConvert CONFIG_SYS_MMCSD_FS_BOOT_PARTITION to Kconfig
Adam Ford [Fri, 3 Jul 2020 15:17:30 +0000 (10:17 -0500)]
Convert CONFIG_SYS_MMCSD_FS_BOOT_PARTITION to Kconfig

This converts the following to Kconfig:
   CONFIG_SYS_MMCSD_FS_BOOT_PARTITION

Signed-off-by: Adam Ford <aford173@gmail.com>
4 years agoconfigs: Remove dead CONFIG options
Adam Ford [Fri, 3 Jul 2020 14:06:36 +0000 (09:06 -0500)]
configs: Remove dead CONFIG options

BOOTP_DEFAULT is defined in several boards, but this config
option is never checked or used.

This patch removes this config option from config files and
the whitelist.txt

Signed-off-by: Adam Ford <aford173@gmail.com>
4 years agoConvert CONFIG_BOOTP_SEND_HOSTNAME to Kconfig
Adam Ford [Fri, 3 Jul 2020 14:00:14 +0000 (09:00 -0500)]
Convert CONFIG_BOOTP_SEND_HOSTNAME to Kconfig

This converts the following to Kconfig:
   CONFIG_BOOTP_SEND_HOSTNAME

Signed-off-by: Adam Ford <aford173@gmail.com>
4 years agoConvert CONFIG_DRIVER_TI_EMAC_USE_RMII to Kconfig
Adam Ford [Fri, 3 Jul 2020 13:27:12 +0000 (08:27 -0500)]
Convert CONFIG_DRIVER_TI_EMAC_USE_RMII to Kconfig

This converts the following to Kconfig:
   CONFIG_DRIVER_TI_EMAC_USE_RMII

Signed-off-by: Adam Ford <aford173@gmail.com>
4 years agoConvert CONFIG_SPL_NAND_BASE et al to Kconfig
Adam Ford [Fri, 3 Jul 2020 13:09:45 +0000 (08:09 -0500)]
Convert CONFIG_SPL_NAND_BASE et al to Kconfig

This converts the following to Kconfig:
   CONFIG_SPL_NAND_BASE
   CONFIG_SPL_NAND_IDENT

Signed-off-by: Adam Ford <aford173@gmail.com>
4 years agoConvert CONFIG_SPL_NAND_DRIVERS et al to Kconfig
Adam Ford [Fri, 3 Jul 2020 13:09:44 +0000 (08:09 -0500)]
Convert CONFIG_SPL_NAND_DRIVERS et al to Kconfig

This converts the following to Kconfig:
   CONFIG_SPL_NAND_DRIVERS
   CONFIG_SPL_NAND_ECC
   CONFIG_SPL_NAND_SIMPLE

Signed-off-by: Adam Ford <aford173@gmail.com>
4 years agoConvert CONFIG_ENV_OVERWRITE to Kconfig
Adam Ford [Fri, 3 Jul 2020 11:48:56 +0000 (06:48 -0500)]
Convert CONFIG_ENV_OVERWRITE to Kconfig

This converts the following to Kconfig:
   CONFIG_ENV_OVERWRITE

Signed-off-by: Adam Ford <aford173@gmail.com>
[trini: Rerun migration, remove some comments]
Signed-off-by: Tom Rini <trini@konsulko.com>
4 years agoMerge branch '2020-07-28-update-azure-tests'
Tom Rini [Tue, 28 Jul 2020 12:49:42 +0000 (08:49 -0400)]
Merge branch '2020-07-28-update-azure-tests'

- Update Azure to fix some recent issues with Windows host tool builds

4 years agoconfigs: Resync with savedefconfig
Tom Rini [Tue, 28 Jul 2020 12:46:52 +0000 (08:46 -0400)]
configs: Resync with savedefconfig

Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
4 years agoazure: Switch to use the MSYS2 official installer as the CI base
Bin Meng [Tue, 28 Jul 2020 09:06:44 +0000 (02:06 -0700)]
azure: Switch to use the MSYS2 official installer as the CI base

Recent CI failures were seen [1] when building MSYS2 Windows host
tools. The error messages are something like:

  downloading mingw32.db...
  downloading mingw32.db.sig...
  error: mingw32: key "4A6129F4E4B84AE46ED7F635628F528CF3053E04" is unknown
  error: mingw32: signature from "David Macek <david.macek.0@gmail.com>" is unknown trust
  error: failed to update mingw32 (invalid or corrupted database (PGP signature))

Per the MSYS2 official news [2], this was caused by a packager
switch and several solutions were suggested, e.g.: a new package
of msys2-keyring and a new msys2 installer that includes them are
released. However right now we have been using the MSYS2 github
CI base repo [3] for the MSYS2 build in U-Boot, but per the project
information on the github webpage, it says: "This repository is
unused/deprecated and will be remove after 2021-01-01". Since it is
unmaintained it's unlikely the new PGP keys will be included in the
git repo, and the only choice is to switch to use the MSYS2 official
installer as the CI base instead.

[1] https://dev.azure.com/u-boot/u-boot/_build/results?buildId=975
[2] https://www.msys2.org/news/#2020-06-29-new-packagers
[3] https://github.com/msys2/msys2-ci-base

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
4 years agoazure: Add the missing build dependency for MSYS2 build
Bin Meng [Tue, 28 Jul 2020 09:06:43 +0000 (02:06 -0700)]
azure: Add the missing build dependency for MSYS2 build

Package 'flex' is needed when building the U-Boot host tool, but
is currently missing in the build dependency in the CI pipeline.

This is to prepare switching to an installer based CI build.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
4 years agoazure: Drop 32-bit MSYS2 build
Bin Meng [Tue, 28 Jul 2020 09:06:42 +0000 (02:06 -0700)]
azure: Drop 32-bit MSYS2 build

As of 2020-05-17, 32-bit MSYS2 is no longer actively supported by
the upstream [1]. Let's drop the 32-bit Windows host tool build.

[1] https://www.msys2.org/news/#2020-05-17-32-bit-msys2-no-longer-actively-supported

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
4 years agoazure: Use a login shell everywhere for MSYS2 build
Bin Meng [Tue, 28 Jul 2020 09:06:41 +0000 (02:06 -0700)]
azure: Use a login shell everywhere for MSYS2 build

This simplifies things a bit to just use a login shell everywhere.

This keeps in sync with MSYS2 upstream commit:
9d11b7f0aa93 ("azure-pipelines: simplify things a bit").

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
4 years agoPrepare v2020.10-rc1
Tom Rini [Tue, 28 Jul 2020 02:46:03 +0000 (22:46 -0400)]
Prepare v2020.10-rc1

Signed-off-by: Tom Rini <trini@konsulko.com>
4 years agoMerge tag 'u-boot-amlogic-20200727' of https://gitlab.denx.de/u-boot/custodians/u...
Tom Rini [Tue, 28 Jul 2020 01:40:26 +0000 (21:40 -0400)]
Merge tag 'u-boot-amlogic-20200727' of https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic

- Handle errors in Meson serial driver
- Enable HDMI, keyboard and ADC for Odroid-C2

4 years agoMerge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq
Tom Rini [Mon, 27 Jul 2020 19:18:15 +0000 (15:18 -0400)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq

- Bug fixes and updates on ls2088a,ls1028a, ls1046a, ls1043a, ls1012a
- lx2-watchdog support
- layerscape: pci-endpoint support, spin table relocation fixes and
  cleanups
- fsl-crypto: RNG support and bug fixes

4 years agotravis: Install pyelftools via pip
Tom Rini [Mon, 27 Jul 2020 15:11:27 +0000 (11:11 -0400)]
travis: Install pyelftools via pip

With the migration to python3 for all of our tests, we need to install
pyelftools via pip now rather than the system tools as they will
otherwise not be present in our virtualenv.

Signed-off-by: Tom Rini <trini@konsulko.com>
---
Changes in v2: Switch to pip

4 years agoMerge tag 'dm-pull-20jul20-take2a' of https://gitlab.denx.de/u-boot/custodians/u...
Tom Rini [Mon, 27 Jul 2020 15:15:37 +0000 (11:15 -0400)]
Merge tag 'dm-pull-20jul20-take2a' of https://gitlab.denx.de/u-boot/custodians/u-boot-dm

binman support for FIT
new UCLASS_SOC
patman switch 'test' command
minor fdt fixes
patman usability improvements

4 years agoconfigs: odroid-c2: update for HDMI output, ADC & USB keyboard
Anand Moon [Thu, 23 Jul 2020 08:06:35 +0000 (08:06 +0000)]
configs: odroid-c2: update for HDMI output, ADC & USB keyboard

Enable options to permit HDMI output on Odroid-C2 GXBB boards.
Enable VPU Power Domain.
Enable ADC and USB_KERBOARD.

Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Anand Moon <linux.amoon@gmail.com>
4 years agoserial: meson: handle RX errors
Neil Armstrong [Tue, 21 Jul 2020 11:41:14 +0000 (13:41 +0200)]
serial: meson: handle RX errors

This checks and handles RX errors on the Amlogic UART controller
after experiencing errors on the Khadas VIM3 & VIM3L when UART AO A
lines are not connected.

When the RX line is not connected, the first byte is erroneous and breaks
the U-Boot autoboot, breaking automatic boot.

This checks and drops any erroneous RX byte on pending and getc callbacks
to avoid returning true to pending when an error byte is in the FIFO.

Fixes: bfcef28ae4 ("arm: add initial support for Amlogic Meson and ODROID-C2")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Guillaume La Roque <glaroque@baylibre.com>
4 years agoMerge https://gitlab.denx.de/u-boot/custodians/u-boot-sh
Tom Rini [Mon, 27 Jul 2020 13:41:18 +0000 (09:41 -0400)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-sh

- R8A774A1 / Beacon EmbeddedWorks RZG2M Dev Kit support

4 years agoMerge branch 'net' of https://gitlab.denx.de/u-boot/custodians/u-boot-sh
Tom Rini [Mon, 27 Jul 2020 13:40:06 +0000 (09:40 -0400)]
Merge branch 'net' of https://gitlab.denx.de/u-boot/custodians/u-boot-sh

- Convert dc2114x driver to DM.

4 years agoMerge branch '2020-07-27-misc-env-improvements'
Tom Rini [Mon, 27 Jul 2020 13:25:53 +0000 (09:25 -0400)]
Merge branch '2020-07-27-misc-env-improvements'

- Assorted environment fixes.
- Enhance environment in MMC and controlled via OF_CONTROL
- Allow for environment in FAT to use the same device we boot from
  rather than be hard-coded.

4 years agoconfigs: ls2088a: Restore CONFIG_ENV_ADDR to IFC-NOR
Kuldeep Singh [Wed, 22 Jul 2020 09:35:44 +0000 (15:05 +0530)]
configs: ls2088a: Restore CONFIG_ENV_ADDR to IFC-NOR

Restore CONFIG_ENV_ADDR value to fix boot hang with IFC-NOR
which is default boot source.

Signed-off-by: Ashish Kumar <ashish.kumar@nxp.com>
Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
4 years agoarm: dts: ls1028a: Add dspi flash device node to qds
Zhao Qiang [Tue, 14 Jul 2020 05:53:36 +0000 (13:53 +0800)]
arm: dts: ls1028a: Add dspi flash device node to qds

Add dspi flash device node to fsl-ls1028a-qds.dtsi

Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
4 years agoconfigs: lx2160a: Enable Watchdog support
Zhao Qiang [Fri, 10 Jul 2020 08:55:20 +0000 (16:55 +0800)]
configs: lx2160a: Enable Watchdog support

Enable support to compile SBSA driver.

Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
4 years agoarm64: lx2160a: dts: Add watchdog node
Zhao Qiang [Fri, 10 Jul 2020 08:55:19 +0000 (16:55 +0800)]
arm64: lx2160a: dts: Add watchdog node

Add watchdog node which is sbsa into lx2160a dtsi

Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
4 years agoWatchdog: introduce ARM SBSA watchdog driver
Zhao Qiang [Fri, 10 Jul 2020 08:55:18 +0000 (16:55 +0800)]
Watchdog: introduce ARM SBSA watchdog driver

According to Server Base System Architecture (SBSA) specification,
the SBSA Generic Watchdog has two stage timeouts: the first signal
(WS0) is for alerting the system by interrupt, the second one (WS1) is a
real hardware reset.
More details about the hardware specification of this device:
ARM DEN0029B - Server Base System Architecture (SBSA)

This driver can operate ARM SBSA Generic Watchdog as a single stage
In the single stage mode, when the timeout is reached, your system
will be reset by WS1. The first signal (WS0) is ignored.

Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
4 years agopci: layerscape: Add specific config entry for RC and EP mode driver
Hou Zhiqiang [Thu, 9 Jul 2020 15:31:42 +0000 (23:31 +0800)]
pci: layerscape: Add specific config entry for RC and EP mode driver

Add Root Complex and Endpoint mode specific config entries, such that
it's feasible to enable the RC and/or EP mode driver indepently.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
4 years agopci_ep: layerscape: Add the PCIe EP mode support for lx2160a-v2
Xiaowei Bao [Thu, 9 Jul 2020 15:31:41 +0000 (23:31 +0800)]
pci_ep: layerscape: Add the PCIe EP mode support for lx2160a-v2

Add the PCIe EP mode support for lx2160a-v2 platform.

Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
4 years agopci: layerscape: Modify the ls_pcie_dump_atu function
Xiaowei Bao [Thu, 9 Jul 2020 15:31:40 +0000 (23:31 +0800)]
pci: layerscape: Modify the ls_pcie_dump_atu function

Modify the ls_pcie_dump_atu function, make it can print the INBOUND
windows registers.

Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
4 years agopci_ep: layerscape: Add the SRIOV VFs of PF support
Xiaowei Bao [Thu, 9 Jul 2020 15:31:39 +0000 (23:31 +0800)]
pci_ep: layerscape: Add the SRIOV VFs of PF support

Add the INBOUND configuration for VFs of PF.

Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
4 years agopci_ep: layerscape: Add Support for ls2085a and ls2080a EP mode
Xiaowei Bao [Thu, 9 Jul 2020 15:31:38 +0000 (23:31 +0800)]
pci_ep: layerscape: Add Support for ls2085a and ls2080a EP mode

Due to the ls2085a and ls2080a use different way to set the BAR size,
so add the BAR size init code here.

Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
4 years agopci_ep: layerscape: Add the workaround for errata A-009460
Xiaowei Bao [Thu, 9 Jul 2020 15:31:37 +0000 (23:31 +0800)]
pci_ep: layerscape: Add the workaround for errata A-009460

The VF_BARn_REG register's Prefetchable and Type bit fields
are overwritten by a write to VF's BAR Mask register.
workaround: Before writing to the VF_BARn_MASK_REG register,
write 0b to the PCIE_MISC_CONTROL_1_OFF register.

Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
4 years agopcie_ep: layerscape: Add the multiple function support
Xiaowei Bao [Thu, 9 Jul 2020 15:31:36 +0000 (23:31 +0800)]
pcie_ep: layerscape: Add the multiple function support

Add the multiple function support for Layerscape platform, some PEXs
of Layerscaple platform have more than one PF.

Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
4 years agoarmv8: dts: ls1046a: Add the PCIe EP node
Xiaowei Bao [Thu, 9 Jul 2020 15:31:35 +0000 (23:31 +0800)]
armv8: dts: ls1046a: Add the PCIe EP node

Add the PCIe EP node for ls1046a.

Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
4 years agopci_ep: Add the init function
Xiaowei Bao [Thu, 9 Jul 2020 15:31:34 +0000 (23:31 +0800)]
pci_ep: Add the init function

Some EP deivces need to initialize before RC scan it, e.g. NXP
layerscape platform, so add the init function in pci_ep uclass.

Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>