Jagan Teki [Mon, 30 Dec 2019 14:29:09 +0000 (19:59 +0530)]
doc: fix opensbi build steps for AX25-AE350
OpenSBI build steps are marked as normal text in
AX25-AE350 documentation.
Move them into code-block so-that it can show it
as build steps.
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
Sean Anderson [Wed, 25 Dec 2019 05:27:44 +0000 (00:27 -0500)]
riscv: Add option to print registers on exception
When debugging, it can be helpful to see more information about an
unhandled exception. This patch adds an option to view the registers at
the time of the trap, similar to the linux output on a kernel panic.
Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
Sean Anderson [Wed, 18 Dec 2019 02:35:32 +0000 (21:35 -0500)]
riscv: Fix breakage caused by linker relaxation
Due to the two-instruction sequence needed to access arbitrary memory
locations, the RISC-V linker aggressively optimises memory accesses and
jumps at link-time. This is called "linker relaxation," and is discussed
in this SiFive article
<https://www.sifive.com/blog/all-aboard-part-3-linker-relaxation-in-riscv-toolchain>.
One of the optimizations in place is to assume that the __global_pointer
symbol is placed in the gp register. To quote the article:
"...The magic __global_pointer$ symbol is defined to point 0x800 bytes
past the start of the .sdata section. The 0x800 magic number allows
signed 12-bit offsets from __global_pointer$ to address symbols at the
start of the .sdata section. The linker assumes that if this symbol is
defined, then the gp register contains that value, which it can then use
to relax accesses to global symbols within that 12-bit range. The
compiler treats the gp register as a constant so it doesn't need to be
saved or restored, which means it is generally only written by _start,
the ELF entry point."
However, U-Boot instead keeps the global data pointer in gp. This causes
memory accesses and jumps optimized to use the gp pointer to fail. To
fix this problem, we undefine the __global_pointer symbol.
Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com>
Tom Rini [Sat, 8 Feb 2020 00:04:23 +0000 (19:04 -0500)]
Merge branch '2020-02-07-master-imports'
- 2 FAT fixes.
- MediaTek ethernet support improvement.
- Initial Cortina Access CAxxxx family support.
- Correct return value of do_gpio() and so gpio shell command.
Jason Li [Thu, 30 Jan 2020 20:34:58 +0000 (12:34 -0800)]
serial: serial_cortina: add UART DM driver for CAxxxx SoCs
Add serial UART driver support for all Cortina Access
CAxxxx family of SoCs.
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Signed-off-by: Jason Li <jason.li@cortina-access.com> Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com>
Jason Li [Thu, 30 Jan 2020 20:34:57 +0000 (12:34 -0800)]
watchdog: cortina_wdt: add support for HW WDT on CAxxxx SoCs
Add support for hardware watchdog timer on all Cortina Access
CAxxxx family of SoCs.
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Jason Li <jason.li@cortina-access.com> Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com>
Jason Li [Thu, 30 Jan 2020 20:34:56 +0000 (12:34 -0800)]
gpio: cortina_gpio: add DM_GPIO driver for CAxxxx SoCs
DM_GPIO based GPIO controller driver for CAxxxx SoCs.
This driver support multiple CPU architectures and
Cortina Access SoC platforms.
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Signed-off-by: Jason Li <jason.li@cortina-access.com> Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com>
Jason Li [Thu, 30 Jan 2020 20:34:55 +0000 (12:34 -0800)]
gpio: do not include <asm/arch/gpio.h> for Cortina CAxxxx SoCs
The Cortina CAxxxx GPIO driver maintains DM_GPIO support
across different CPU ISA in the CAxxxx Soc Family; Not just ARM.
Therefore, it is not desirable to split out and maintain separete
gpio header file for each CPU architecture.
Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Jason Li <jason.li@cortina-access.com> Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com>
Tom Rini [Wed, 29 Jan 2020 16:03:34 +0000 (11:03 -0500)]
cmd/elf.c: Add SPDX tag
Based on reading the text of the license comment this appears to be
the BSD-2-Clause license but with an imperfect word match as
BSD-2-Clause was not (as far as I recall) a common license choice at the
time the code was written.
Cc: Wolfgang Denk <wd@denx.de> Signed-off-by: Tom Rini <trini@konsulko.com>
fat: write: adjust data written in each partial write
The code for handing file overwrite incorrectly calculated the amount of
data to write when writing to the last non-cluster aligned chunk. Fix
this by ensuring that no more data than the 'filesize' is written to disk.
While touching min()-based calculations, change it to type-safe min_t()
function.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
This patch finally fixes the issue revealed by the test script from the
previous patch. The correctness of the change has been also verified by
the following additional test scripts:
The code for handing file overwrite incorrectly assumed that the file on
disk is always contiguous. This resulted in corrupting disk structure
every time when write to existing fragmented file happened. Fix this
by adding proper check for cluster discontinuity and adjust chunk size
on each partial write.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
This patch partially fixes the issue revealed by the following test
script:
Overwritting a discontiguous test file (file0007.raw) no longer causes
corruption to file0003.raw, which's data lies between the chunks of the
test file. The amount of data written to disk is still incorrect, what
causes damage to the file (file0005.raw), which's data lies next to the
test file. This will be fixed by the next patch.
Feel free to prepare a proper sandbox/py_test based tests based on the
provided test scripts.
video: enable VIDEO_ANSI and all VIDEO_BBP options
This partially reverts changes by commit 2cc393f32fd9
("video: make BPP and ANSI configs optional") since it
caused issues with other boards (missing LCD console
output on pinebook, x86 platform or sandbox). Enable
all disabled options again and opt out of not supported
color depth in board defconfigs.
Tom Rini [Wed, 5 Feb 2020 12:18:12 +0000 (07:18 -0500)]
Merge tag 'rpi-next-2020.04' of https://gitlab.denx.de/u-boot/custodians/u-boot-raspberrypi
- DFU support file operations lager then the default max size
- add dfu support to dwc2 for bcm2835
- enable DFU for RPi4
- Fix RPi4 memory map to include the genet device
- add driver for the genet ethernet device
- enable network support in RPi4 config
Marek Vasut [Thu, 17 Oct 2019 22:22:31 +0000 (00:22 +0200)]
ddr: altera: Add DDR2 support to Gen5 driver
Add DDR2 support to Gen5 DRAM driver. As the DDR2 macro names generated
by Quartus are named differently than the DDR3 ones, use anon unions to
store them in the same structures, without growing their size.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Ley Foon Tan <ley.foon.tan@intel.com> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Marek Vasut [Thu, 3 Oct 2019 12:47:07 +0000 (14:47 +0200)]
watchdog: designware: Optionally fetch clock and reset from DT
Add optional support for fetching watchdog clock rate from DT
and ungating reset via reset framework. This is optional as not
all platforms using DW WDT support the clock and reset frameworks
yet.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dalon Westergreen <dwesterg@gmail.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Ley Foon Tan <ley.foon.tan@intel.com> Cc: Philipp Tomisch <philipp.tomisch@theobroma-systems.com> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Cc: Tien Fong Chee <tien.fong.chee@intel.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # roc-rk3399-pc
Marek Vasut [Wed, 26 Jun 2019 23:19:23 +0000 (01:19 +0200)]
watchdog: designware: Convert to DM and DT probing
Convert the designware watchdog timer driver to DM and add DT probing
support. Perform minor coding style clean up, like drop superfluous
braces. These ought to be no functional change.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dalon Westergreen <dwesterg@gmail.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Ley Foon Tan <ley.foon.tan@intel.com> Cc: Philipp Tomisch <philipp.tomisch@theobroma-systems.com> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Cc: Tien Fong Chee <tien.fong.chee@intel.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # roc-rk3399-pc
- Various minor fixes for x86
- Switch to ACPI mode on Intel edison
- Support run-time configuration for NS16550 driver
- Update coreboot and slimbootloader serial drivers to use NS16550
run-time configuration
- ICH SPI driver fixes to hardware sequencing erase case
- Move ITSS from Apollo Lake to a more generic location
- Intel GPIO driver bug fixes
- Move to vs2017-win2016 platform build host for Azure pipelines
Alison Wang [Tue, 21 Jan 2020 07:33:01 +0000 (07:33 +0000)]
configs: ls1021a: Reserve low memory for CMA
The default reserved memory for CMA is high memory. If LPAE is enabled,
highmem pages are non-remapped and can not be used with
dma_alloc_coherent. This patch will reserve low memory for CMA and fix
the issue on LS1021A.
Signed-off-by: Peng Ma <peng.ma@nxp.com> Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com> Signed-off-by: Alison Wang <alison.wang@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Biwen Li [Tue, 31 Dec 2019 07:33:38 +0000 (15:33 +0800)]
armv8: fsl-layerscape: spl: fix build error when DM_I2C is enabled
Fix below SPL build error when DM_I2C is enabled,
- arch/arm/cpu/armv8/built-in.o: In function `board_init_f:
arch/arm/cpu/armv8/fsl-layerscape/spl.c:74: undefined reference to `i2c_init_all'
arch/arm/cpu/armv8/fsl-layerscape/spl.c:74:(.text.board_init_f+0x30):
relocation truncated to fit: R_AARCH64_CALL26 against undefined symbol
`i2c_init_all'
make[2]: *** [spl/u-boot-spl] Error 1
make[1]: *** [spl/u-boot-spl] Error 2
make: *** [sub-make] Error 2
arch/arm/cpu/armv8/fsl-layerscape/spl.c: In function 'board_init_f':
arch/arm/cpu/armv8/fsl-layerscape/spl.c:74:2: warning: implicit
declaration of function 'i2c_init_all'; did you mean 'misc_init_r'?
[-Wimplicit-function-declaration]`
Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Michael Walle [Tue, 17 Dec 2019 23:10:00 +0000 (00:10 +0100)]
arm: dts: ls1028a: fix interrupt properties
Sync the interrupt properties with the ones from Linux. Also use the
constants provided by the dt-bindings header. Please note, that there
are actual changes/fixes in the irq flags. U-Boot won't use the
interrupt properties anyway. It's just to be consistent with the Linux
device tree.
Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Tom Rini [Mon, 27 Jan 2020 21:23:29 +0000 (16:23 -0500)]
azure: Move to vs2017-win2016 platform build host
Azure is moving to remove the vs2015-win2012r2 platform build host. The
two suggested new platforms to use are vs2017-win2016 and windows-2019.
For now, move up to vs2017-win2016.
Cc: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
* The value of the register is contained in the variable 'reg', not in
'mode'. The variable 'mode' contains only the configuration whether
the gpio is currently an input or an output.
* The correct bitmasks for the input and output value are
PAD_CFG0_RX_STATE and PAD_CFG0_TX_STATE.
Use them instead of the currently used PAD_CFG0_RX_STATE_BIT and
PAD_CFG0_TX_STATE_BIT.
Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
gpio: intel_gpio: Clear tx state bit when setting output
Add missing 'PAD_CFG0_TX_STATE' to the clear mask for pcr_clrsetbits32().
Otherwise this bit cannot be cleared again after it has been set once.
Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
gpio: intel_gpio: Pass pinctrl device to pcr_clrsetbits32()
The function pcr_clrsetbits32() expects a device with a P2SB parent
device. In intel_gpio_direction_output() and intel_gpio_set_value()
the device 'dev' is passed to pcr_clrsetbits32(), which is a
gpio-controller with a device 'pinctrl' as parent. This does not match
the expectations of pcr_clrsetbits32(). But the 'pinctrl' device has a
P2SB as parent.
Pass the 'pinctrl' device instead of the 'dev' device to
pcr_clrsetbits32().
Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Wolfgang Wallner [Wed, 22 Jan 2020 15:01:47 +0000 (16:01 +0100)]
x86: itss: Remove apl-prefix
The Interrupt Timer Subsystem (ITSS) is not specific to Apollo Lake, so
remove the apl-prefix of the implemented functions/structures/...
Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
x86: itss: Add a Kconfig option to enable/disable ITSS driver
Add a Kconfig option to support enabling/disabling the inclusion of
the ITSS driver depending on the platform.
Atuomatically select the ITSS driver when building for Apollo Lake.
Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: squashed in http://patchwork.ozlabs.org/patch/1232761/] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Wolfgang Wallner [Wed, 22 Jan 2020 15:01:46 +0000 (16:01 +0100)]
x86: Move itss.c from Apollo Lake to a more generic location
The Interrupt Timer Subsystem (ITSS) is not specific to Apollo Lake, so
move it to a common location within arch/x86.
Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: conditionally build itss.c] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Marek Vasut [Fri, 24 Jan 2020 04:44:24 +0000 (05:44 +0100)]
watchdog: omap_wdt: Fix WDT reloading
The watchdog timer value was never updated in the hardware by this
driver, so the watchdog triggered on some random stale value that
was left in the hardware. The TI SPRUH37C says, quote:
20.4.3.9 Modifying Timer Count/Load Values and Prescaler Setting
...
After a write access, the load register value and prescaler ratio
registers are updated immediately, but new values are considered
only after the next consecutive counter overflow or after a new
trigger command (the WDT_WTGR register).
This means at least one trigger must happen. The driver probably
depended on someone calling it's .reset() callback, however that
is not guaranteed e.g. if the WDT operates without servicing.
Marek Vasut [Fri, 24 Jan 2020 04:44:23 +0000 (05:44 +0100)]
watchdog: omap_wdt: Fix WDT timeout configuration
The timeout parameter of omap3_wdt_start() is in miliseconds, while
GET_WLDR_VAL() expects parameter in seconds. Fix this so the WDT
driver is actually usable.
drivers/gpio/da8xx_gpio.c: In function ‘davinci_get_gpio_bank’:
drivers/gpio/da8xx_gpio.c:446:9: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
return (struct davinci_gpio *)addr;
arm: mach-k3: sysfw-loader: Add support to download SYSFW via DFU
Add support to download SYSFW into internal RAM via DFU in DFU boot
mode. Prepare a DFU config entity entry dynamically using buffer address
allocated for SYSFW and start DFU gadget to get SYSFW.
arm: mach-k3: j721e: Rename BOOT_DEVICE_USB to BOOT_DEVICE_DFU
J721e does not support USB Host MSC boot, but only supports DFU boot.
Since BOOT_DEVICE_USB is often used for host boot mode and
BOOT_DEVICE_DFU is used for DFU boot, rename BOOT_DEVICE_USB macro to
BOOT_DEVICE_DFU
The current environment offset overlaps with the sysfw area and whenever
environment is saved in the redundant slot, it overwrites sysfw.itb. Fix
the offset to prevent this.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Sam Protsenko [Fri, 24 Jan 2020 15:53:48 +0000 (17:53 +0200)]
env: ti: boot: Boot Android with dynamic partitions
Changes:
- use boot.img instead of boot_fit.img
- use .dtb from boot.img v2
- implement recovery boot
- always boot ramdisk from boot.img, we can't mount system as root
now, as system is a logical partition inside of super partition
- don't add "skip_initramfs" to cmdline anymore
- to boot into recovery, use boot image from recovery partition
- prepare partition table:
- A/B scheme
- use 'super' partition instead of 'system' and 'vendor'
- add dtbo partitions
- introduce metadata partition
Not implemented: reading and applying dtbo blobs from dtbo partition.
Signed-off-by: Sam Protsenko <joe.skb7@gmail.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Sam Protsenko [Fri, 24 Jan 2020 15:53:44 +0000 (17:53 +0200)]
doc: android: Convert to Sphinx format
Convert Android documentation from regular txt format to Sphinx (RST).
Also add Android index.rst file and reference it in root index.rst, so
that Android documentation is visible.
Test:
$ make htmldocs
$ xdg-open doc/output/index.html
Signed-off-by: Sam Protsenko <joe.skb7@gmail.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Sam Protsenko [Fri, 24 Jan 2020 15:53:42 +0000 (17:53 +0200)]
cmd: abootimg: Add abootimg command
This command can be used to extract fields and image payloads from
Android Boot Image. It can be used for example to implement boot flow
where dtb is taken from boot.img (as v2 incorporated dtb inside of
boot.img). Using this command, one can obtain needed dtb blob from
boot.img in scripting manner, and then apply needed dtbo's (from "dtbo"
partition) on top of that, providing then the resulting image to bootm
command in order to boot the Android.
Also right now this command has the sub-command to get an address and
size of recovery dtbo from recovery image (for non-A/B devices only,
see [1,2] for details).
It can be tested like this:
=> mmc dev 1
=> part start mmc 1 boot_a boot_start
=> part size mmc 1 boot_a boot_size
=> mmc read $loadaddr $boot_start $boot_size
=> abootimg get ver
=> abootimg dump dtb
Sam Protsenko [Fri, 24 Jan 2020 15:53:41 +0000 (17:53 +0200)]
image: android: Add routine to get dtbo params
Android Boot Image v1 adds "Recovery DTB" field in image header and
associate payload in boot image itself [1]. Payload should be in
Android DTB/DTBO format [2]. That "Recovery DTB" area should be only
populated for non-A/B devices, and only in recovery image.
Add function to get an address and size of that payload. That function
can be further used e.g. in 'abootimg' command to provide the user a way
to get the address of recovery dtbo from U-Boot shell, which can be
further parsed using 'adtimg' command.
Sam Protsenko [Fri, 24 Jan 2020 15:53:40 +0000 (17:53 +0200)]
image: android: Add functions for handling dtb field
Android Boot Image v2 adds "DTB" payload (and corresponding field in the
image header). Provide functions for its handling:
- android_image_get_dtb_by_index(): Obtain DTB blob from "DTB" part of
boot image, by blob's index
- android_image_print_dtb_contents(): Iterate over all DTB blobs in
"DTB" part of boot image and print those blobs info
"DTB" payload might be in one of the following formats:
1. concatenated DTB blobs
2. Android DTBO format
The latter requires "android-image-dt.c" functionality, so this commit
selects that file for building for CONFIG_ANDROID_BOOT_IMAGE option.
Right now this new functionality isn't used, but it can be used further.
As it's required to apply some specific dtbo blob(s) from "dtbo"
partition, we can't automate this process inside of "bootm" command. But
we can do next:
- come up with some new command like "abootimg" to extract dtb blob
from boot image (using functions from this patch)
- extract desired dtbo blobs from "dtbo" partition using "adtimg"
command
- merge dtbo blobs into dtb blob using "fdt apply" command
- pass resulting dtb blob into bootm command in order to boot the
Android kernel with Android ramdisk from boot image
Signed-off-by: Sam Protsenko <joe.skb7@gmail.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Wolfgang Wallner [Wed, 22 Jan 2020 15:01:45 +0000 (16:01 +0100)]
x86: Move itss.h from Apollo Lake to the generic x86 include directory
The code in this file is not specific to Apollo Lake. According to
coreboot sources (where this code comes from), it is common to at least:
* Apollo Lake
* Cannon Lake
* Ice Lake
* Skylake
Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Wolfgang Wallner [Wed, 22 Jan 2020 15:01:44 +0000 (16:01 +0100)]
x86: apl: Add the term "Interrupt Timer Subsystem" to ITSS files
ITSS stands for "Interrupt Timer Subsystem", so add that term to the
description of the relevant files.
Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Wolfgang Wallner [Tue, 14 Jan 2020 13:05:48 +0000 (14:05 +0100)]
spi: ich: Drop while loop in hardware sequencing erase case
When ich_spi_exec_op_hwseq() is called to erase a 4k block
(opcode = SPINOR_OP_BE_4K), it expects to find a length value in
op->data.nbytes, but that value is always 0. As a result, the while loop
is never executed and no erase is carried out.
Fix this by dropping the loop code entirely, only keeping the relevant
parts of the loop body.
See http://patchwork.ozlabs.org/patch/1222779/ for more detailed
background information and discussion.
Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Andy Shevchenko [Thu, 9 Jan 2020 21:12:35 +0000 (23:12 +0200)]
x86: edison: Switch to ACPI mode
SFI is quite poor and useless resource provider. Moreover it makes hard
to develop and extend functionality in the Linux kernel.
Enable a necessary minimum to use ACPI on Intel Edison.
Linux kernel have been prepared for this change since v5.4, where the last
crucial driver, i.e. for Basin Cove PMIC, has been submitted.
Note, that stock image won't suffer by this change since it doesn't have
ACPI enabled on the kernel level.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>